Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements #25789

tehampson · 2023-03-22T18:54:31Z

Changes to RR_1.1:
This bring code in line to what is actually written in the RR_1.1 spec. There was a bug in add_all_groups that wrote all wrote all the groups to each of the endpoints instead, leading to writing more then the maximum of supported groups per fabric. This also incorporates test spec changes from https://github.com/CHIP-Specifications/chip-test-plans/pull/2503

Changes outside of RR_1.1:

Changes required to bring all clusters up to compliance with minimum spec based on it having 3 Groups clusters
Changes to yaml test run against all clusters app in CI now that there are more groups per fabric

github-actions · 2023-03-22T19:03:40Z

PR #25789: Size comparison from 2ea6746 to 5d40ed1

Increases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`5d40ed1`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_info	20251230	20251231	1	0.0

Full report (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`5d40ed1`	change
cc32xx	lock	CC3235SF_LAUNCHXL		0	0	0
			(read only)	645825	645825	0
			(read/write)	203848	203848	0
			.ARM.attributes	44	44	0
			.ARM.exidx	8	8	0
			.bss	197248	197248	0
			.comment	194	194	0
			.data	1480	1480	0
			.debug_abbrev	930286	930286	0
			.debug_aranges	87400	87400	0
			.debug_frame	300336	300336	0
			.debug_info	20251230	20251231	1
			.debug_line	2661959	2661959	0
			.debug_loc	2806733	2806733	0
			.debug_ranges	283424	283424	0
			.debug_str	3027534	3027534	0
			.ramVecs	780	780	0
			.resetVecs	64	64	0
			.rodata	105993	105993	0
			.shstrtab	232	232	0
			.stab	204	204	0
			.stabstr	441	441	0
			.stack	2048	2048	0
			.strtab	380469	380469	0
			.symtab	257408	257408	0
			.text	537712	537712	0

github-actions · 2023-03-22T20:15:26Z

PR #25789: Size comparison from 2ea6746 to c2eb315

Increases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`c2eb315`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_info	20251230	20251231	1	0.0

Full report (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`c2eb315`	change
cc32xx	lock	CC3235SF_LAUNCHXL		0	0	0
			(read only)	645825	645825	0
			(read/write)	203848	203848	0
			.ARM.attributes	44	44	0
			.ARM.exidx	8	8	0
			.bss	197248	197248	0
			.comment	194	194	0
			.data	1480	1480	0
			.debug_abbrev	930286	930286	0
			.debug_aranges	87400	87400	0
			.debug_frame	300336	300336	0
			.debug_info	20251230	20251231	1
			.debug_line	2661959	2661959	0
			.debug_loc	2806733	2806733	0
			.debug_ranges	283424	283424	0
			.debug_str	3027534	3027534	0
			.ramVecs	780	780	0
			.resetVecs	64	64	0
			.rodata	105993	105993	0
			.shstrtab	232	232	0
			.stab	204	204	0
			.stabstr	441	441	0
			.stack	2048	2048	0
			.strtab	380469	380469	0
			.symtab	257408	257408	0
			.text	537712	537712	0

github-actions · 2023-03-22T20:28:27Z

PR #25789: Size comparison from 2ea6746 to c243280

Full report (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`c243280`
cc32xx	lock	CC3235SF_LAUNCHXL		0	0
			(read only)	645825	645825
			(read/write)	203848	203848
			.ARM.attributes	44	44
			.ARM.exidx	8	8
			.bss	197248	197248
			.comment	194	194
			.data	1480	1480
			.debug_abbrev	930286	930286
			.debug_aranges	87400	87400
			.debug_frame	300336	300336
			.debug_info	20251230	20251230
			.debug_line	2661959	2661959
			.debug_loc	2806733	2806733
			.debug_ranges	283424	283424
			.debug_str	3027534	3027534
			.ramVecs	780	780
			.resetVecs	64	64
			.rodata	105993	105993
			.shstrtab	232	232
			.stab	204	204
			.stabstr	441	441
			.stack	2048	2048
			.strtab	380469	380469
			.symtab	257408	257408
			.text	537712	537712

github-actions · 2023-03-23T00:31:11Z

PR #25789: Size comparison from 2ea6746 to 6894824

Increases (1 build for linux)

platform	target	config	section	`2ea6746`	`6894824`	change	% change
linux	chip-tool-ipv6only	arm64	(read only)	12132580	12132884	304	0.0
			.text	9784676	`9784980`	304	0.0

Full report (5 builds for cc32xx, linux, qpg)

platform	target	config	section	`2ea6746`	`6894824`	change
cc32xx	lock	CC3235SF_LAUNCHXL		0	0	0
			(read only)	645825	645825	0
			(read/write)	203848	203848	0
			.ARM.attributes	44	44	0
			.ARM.exidx	8	8	0
			.bss	197248	197248	0
			.comment	194	194	0
			.data	1480	1480	0
			.debug_abbrev	930286	930286	0
			.debug_aranges	87400	87400	0
			.debug_frame	300336	300336	0
			.debug_info	20251230	20251230	0
			.debug_line	2661959	2661959	0
			.debug_loc	2806733	2806733	0
			.debug_ranges	283424	283424	0
			.debug_str	3027534	3027534	0
			.ramVecs	780	780	0
			.resetVecs	64	64	0
			.rodata	105993	105993	0
			.shstrtab	232	232	0
			.stab	204	204	0
			.stabstr	441	441	0
			.stack	2048	2048	0
			.strtab	380469	380469	0
			.symtab	257408	257408	0
			.text	537712	537712	0
linux	chip-tool-ipv6only	arm64	(read only)	12132580	12132884	304
			(read/write)	742648	742648	0
			.bss	34392	34392	0
			.data	3008	3008	0
			.data.rel.ro	684520	684520	0
			.dynamic	560	560	0
			.got	15512	15512	0
			.init	24	24	0
			.init_array	216	216	0
			.rodata	585588	585588	0
			.text	9784676	`9784980`	304
	thermostat-no-ble	arm64	(read only)	`2524524`	`2524524`	0
			(read/write)	145240	145240	0
			.bss	56344	56344	0
			.data	1784	1784	0
			.data.rel.ro	77696	77696	0
			.dynamic	560	560	0
			.got	5368	5368	0
			.init	24	24	0
			.init_array	432	432	0
			.rodata	150904	150904	0
			.text	2111232	2111232	0
qpg	lighting-app	qpg6105+debug	(read/write)	1152888	1152888	0
			.bss	96036	96036	0
			.data	852	852	0
			.text	599984	599984	0
	lock-app	qpg6105+debug	(read/write)	1121448	1121448	0
			.bss	91172	91172	0
			.data	856	856	0
			.text	568548	568548	0

github-actions · 2023-03-23T13:55:51Z

PR #25789: Size comparison from 2ea6746 to a69e428

Increases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a69e428`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_str	3027534	`3027815`	281	0.0

Decreases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a69e428`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_info	20251230	20239634	-11596	-0.1
			.debug_line	2661959	2661958	-1	-0.0
			.debug_loc	2806733	`2806731`	-2	-0.0

Full report (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a69e428`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL		0	0	0	0.0
			(read only)	645825	645825	0	0.0
			(read/write)	203848	203848	0	0.0
			.ARM.attributes	44	44	0	0.0
			.ARM.exidx	8	8	0	0.0
			.bss	197248	197248	0	0.0
			.comment	194	194	0	0.0
			.data	1480	1480	0	0.0
			.debug_abbrev	930286	930286	0	0.0
			.debug_aranges	87400	87400	0	0.0
			.debug_frame	300336	300336	0	0.0
			.debug_info	20251230	20239634	-11596	-0.1
			.debug_line	2661959	2661958	-1	-0.0
			.debug_loc	2806733	`2806731`	-2	-0.0
			.debug_ranges	283424	283424	0	0.0
			.debug_str	3027534	`3027815`	281	0.0
			.ramVecs	780	780	0	0.0
			.resetVecs	64	64	0	0.0
			.rodata	105993	105993	0	0.0
			.shstrtab	232	232	0	0.0
			.stab	204	204	0	0.0
			.stabstr	441	441	0	0.0
			.stack	2048	2048	0	0.0
			.strtab	380469	380469	0	0.0
			.symtab	257408	257408	0	0.0
			.text	537712	537712	0	0.0

github-actions · 2023-03-23T14:14:37Z

PR #25789: Size comparison from 2ea6746 to a1f802b

Increases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a1f802b`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_str	3027534	`3027815`	281	0.0

Decreases (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a1f802b`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL	.debug_info	20251230	20239634	-11596	-0.1
			.debug_line	2661959	2661958	-1	-0.0
			.debug_loc	2806733	`2806731`	-2	-0.0

Full report (1 build for cc32xx)

platform	target	config	section	`2ea6746`	`a1f802b`	change	% change
cc32xx	lock	CC3235SF_LAUNCHXL		0	0	0	0.0
			(read only)	645825	645825	0	0.0
			(read/write)	203848	203848	0	0.0
			.ARM.attributes	44	44	0	0.0
			.ARM.exidx	8	8	0	0.0
			.bss	197248	197248	0	0.0
			.comment	194	194	0	0.0
			.data	1480	1480	0	0.0
			.debug_abbrev	930286	930286	0	0.0
			.debug_aranges	87400	87400	0	0.0
			.debug_frame	300336	300336	0	0.0
			.debug_info	20251230	20239634	-11596	-0.1
			.debug_line	2661959	2661958	-1	-0.0
			.debug_loc	2806733	`2806731`	-2	-0.0
			.debug_ranges	283424	283424	0	0.0
			.debug_str	3027534	`3027815`	281	0.0
			.ramVecs	780	780	0	0.0
			.resetVecs	64	64	0	0.0
			.rodata	105993	105993	0	0.0
			.shstrtab	232	232	0	0.0
			.stab	204	204	0	0.0
			.stabstr	441	441	0	0.0
			.stack	2048	2048	0	0.0
			.strtab	380469	380469	0	0.0
			.symtab	257408	257408	0	0.0
			.text	537712	537712	0	0.0

src/python_testing/TC_RR_1_1.py

examples/all-clusters-app/cc13x2x7_26x2x7/main/include/CHIPProjectConfig.h

doublemis1 · 2023-03-27T08:40:18Z

src/python_testing/TC_RR_1_1.py

-        # Step 10: Count all group cluster instances
+        # Step 10: Reconfig ACL to allow test runner access to Groups clusters on all endpoints.
+        logging.info("Step 10: Reconfiguring ACL to allow access to Groups Clusters")
+        self.send_acl(test_step=10, client_by_name=client_by_name, enable_access_to_group_cluster=False, fabric_table=fabric_table)


enable_access_to_group_cluster shall be True?

Ops... that is correct

I've created separate PR to fix that: #25845

doublemis1 · 2023-03-27T08:55:49Z

src/python_testing/TC_RR_1_1.py

        admin_targets = [
            Clusters.AccessControl.Structs.Target(endpoint=0),
-            Clusters.AccessControl.Structs.Target(cluster=0xFFF1_FC00, deviceType=0xFFF1_BC30),
+            admin_target_field_2,
            Clusters.AccessControl.Structs.Target(cluster=0xFFF1_FC01, deviceType=0xFFF1_BC31)


If we wanna be precise regarding Master test plan the Targets shall be
Clusters.AccessControl.Structs.Target(cluster=0xFFF1_FC00, deviceType=0xFFF1_FC31)

doublemis1 · 2023-03-27T08:58:14Z

src/python_testing/TC_RR_1_1.py

@@ -747,9 +759,13 @@ def build_acl(self):
        # Administer ACL entry
        admin_subjects = [0xFFFF_FFFD_0001_0001, 0x2000_0000_0000_0001, 0x2000_0000_0000_0002, 0x2000_0000_0000_0003]

+        admin_target_field_2 = Clusters.AccessControl.Structs.Target(cluster=0xFFF1_FC00, deviceType=0xFFF1_BC30)


Based on Master test plan RR-1.1 definition it should be Clusters.AccessControl.Structs.Target(cluster=0xFFF1_FC00, deviceType=0xFFF1_FC30)

Fix RR_1_1 to latest understanding

5d40ed1

github-actions bot added the examples label Mar 22, 2023

Fix yaml test

176a2a5

github-actions bot added app tests labels Mar 22, 2023

Restyle

c2eb315

Fix CI

c243280

tehampson mentioned this pull request Mar 22, 2023

[BUG] TC_RR_1_1 group sub-test not run if Groups cluster endpoint is not 0 #25532

Closed

Fix CI

6894824

tehampson added 2 commits March 23, 2023 13:35

Test intent of the spec

a6bb829

Quickfix

a69e428

tehampson marked this pull request as ready for review March 23, 2023 13:40

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pullapprove bot added the review - pending label Mar 23, 2023

Update comments to be a little more helpful

a1f802b

This was referenced Mar 23, 2023

DNS Update RR-1.1 to use right ACL before attempting to read Groups Cluster #25596

Closed

Fix RR_1.1 to add_all_groups to add right amount of groups per endpoint #25767

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tehampson changed the title ~~Fix RR_1_1 to latest understanding~~ Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements Mar 23, 2023

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tehampson commented Mar 24, 2023

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tehampson merged commit 7326cf8 into project-chip:master Mar 24, 2023

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Fix RR-1.1 python test case, enable group testing #25845

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Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements #25789

Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements #25789

tehampson commented Mar 22, 2023 •

edited

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doublemis1 Mar 27, 2023

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doublemis1 Mar 27, 2023

Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements #25789

Fix RR_1_1 to match spec and bring all-clusters app inline with minimums requirements #25789

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tehampson commented Mar 22, 2023 •

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