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bugfix(uart + i2c): fix signal glitch on tx , i2c sda and i2c scl pin #1065
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…lly version- bugfix(i2c): fix signal glitch on sda and scl pin -optional for actually version-
@ESP32DE look at my comments in your pull request on my repo stickbreaker/arduino-esp32 Pull 19. If you make the same changes to this pull, it will solve the I2C begin Glitch also. Chuck. |
Good find. Is this something worth pushing to the IDF folks in case it has not been addressed there? |
@lonerzzz I looked at the IDF code, maybe here? gpio_set_direction(scl_io, GPIO_MODE_OUTPUT_OD);
gpio_set_direction(sda_io, GPIO_MODE_OUTPUT_OD); Maybe mode should be: I can't test it because I don't use IDF directly. Chuck. |
I don't use the IDF directly either so it may be just a matter of creating an issue and telling them how it is solved in Arduino I2C based on your findings. They should be back next week so you could tag @me-no-dev to get his input on passing it along. |
@stickbreaker i did optional order the setup for digitalWrite (edit not pinMode), cause in older version interesting is the second found, to setup the open drain as "OPEN_DRAIN" instead "OUTPUT_OPEN_DRAIN" nice found! i will check this in the esp-idf too |
cross thinking i think for sda we need "OPEN_DRAIN" best wishes |
@stickbreaker @ESP32DE no I don't think that is a problem in IDF driver/i2c.c because that is inside bus clear function and at the end i2c_set_pin gets called which sets GPIO_MODE_INPUT_OUTPUT_OD |
The glitch seems to be created when the output driver is assigned to the pin. Inside cores/esp32/esp32-hal-gpio.c the OPEN_DRAIN option is the last configuration set. I think this ordering is causing the problem. But, I do not understand the thought process/functional sequence for configuring the pin/port mux hardware on the ESP32. I am very Leary about changing something that is so fundamental. I do not know why that OPEN_DRAIN is configured as the last step. Another unexplored issue: What are the ramifications of assigning a pin that has been previously configured? This sequence works from a reset condition. I have not tried setting either pin to another mode(input/output/adc) before assigning it to the I2C peripheral. I do not yet have a functional SLAVE mode ESP32 operational yet, so I haven't done any testing as a slave. Both SCL and SDA are input/output. SCL can be driven by Slave I2c devices to pause communications. (SCL clock Stretching). I do not see any benefit using OUTPUT_OPEN_DRAIN on SCL. The OUTPUT option causes the glitch. Chuck. |
yes let's fix this in the source instead. @stickbreaker there is no logic behind why OPEN_DRAIN is last step. I did not expect the order to actually cause an issue. Different bits in different registers are set, so unless the ESP somehow overwrites certain registers on change, the order should not matter. @ESP32DE I will close this request and move towards fixing in the pinMode source :) |
@me-no-dev Where can I find documentation of the GPIO matrix?
is the only thing I can find. Chuck. |
see #1061