Fix HMAC leakage

src/ecc/config/ecc_montgomerymultiplier_tb.vf

@@ -47,15 +47,15 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v
 ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv
-${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv
+${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv
 ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv
-${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv

src/ecc/config/ecc_top.vf

@@ -45,15 +45,15 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v
 ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv
-${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv
+${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv
 ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv
-${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv

src/ecc/config/ecc_top_tb.vf

@@ -50,15 +50,15 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v
 ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv
-${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv
+${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv
 ${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg.sv
-${CALIPTRA_ROOT}/src/hmac_drbg/rtl/hmac_drbg_lfsr.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/ecc/rtl/ecc_params_pkg.sv

src/ecc/rtl/ecc_hmac_drbg_interface.sv

@@ -39,7 +39,7 @@
 module ecc_hmac_drbg_interface#(
     parameter                  REG_SIZE       = 384,
     parameter [REG_SIZE-1 : 0] GROUP_ORDER    = 384'hffffffffffffffffffffffffffffffffffffffffffffffffc7634d81f4372ddf581a0db248b0a77aecec196accc52973,
-    parameter [147 : 0]        LFSR_INIT_SEED = 148'h6_04E7_A407_54F1_4487_A021_11AC_D0DF_8C55_57A0   // a random value
+    parameter [REG_SIZE-1 : 0] LFSR_INIT_SEED = 384'hc48555929cd58779f4819c1e6570c2ef20bccd503284e2d366f3273a66e9719b07ac999c80740d6277af88ceb4c3029c   // a random value
     )
     (
     // Clock and reset.
@@ -66,8 +66,8 @@ module ecc_hmac_drbg_interface#(
     //----------------------------------------------------------------
     // Registers including update variables and write enable.
     //----------------------------------------------------------------
-    logic [147 : 0]         lfsr_seed_reg;
-    logic [147 : 0]         hmac_lfsr_seed;
+    logic [REG_SIZE-1 : 0]  lfsr_seed_reg;
+    logic [REG_SIZE-1 : 0]  hmac_lfsr_seed;
 
     logic                   hmac_mode;
     logic                   hmac_drbg_init;
@@ -210,7 +210,7 @@ module ecc_hmac_drbg_interface#(
         else
             if (hmac_done_edge) begin
                 unique case (state_reg) inside
-                    LFSR_ST:        lfsr_seed_reg   <= hmac_drbg_result[147 : 0];
+                    LFSR_ST:        lfsr_seed_reg   <= hmac_drbg_result;
                     LAMBDA_ST:      lambda_reg      <= hmac_drbg_result;
                     SCALAR_RND_ST:  scalar_rnd_reg  <= hmac_drbg_result;
                     MASKING_RND_ST: masking_rnd_reg <= hmac_drbg_result;
@@ -278,9 +278,8 @@ module ecc_hmac_drbg_interface#(
         end
     end // counter_nonce_update
 
-    always_comb counter_nonce[REG_SIZE-1 : 64] = '0;
-    always_comb counter_nonce[63 : 0] = counter_reg;
-    always_comb hmac_lfsr_seed = lfsr_seed_reg ^ counter_nonce[147 : 0];
+    always_comb counter_nonce = {counter_reg, counter_reg, counter_reg, counter_reg, counter_reg, counter_reg};
+    always_comb hmac_lfsr_seed = lfsr_seed_reg ^ counter_nonce;
 
     //----------------------------------------------------------------
     // FSM_flow

src/hmac/config/compile.yml

@@ -15,6 +15,7 @@ targets:
       - $COMPILE_ROOT/rtl/hmac.sv
       - $COMPILE_ROOT/rtl/hmac_core.v
       - $COMPILE_ROOT/rtl/hmac_reg.sv
+      - $COMPILE_ROOT/rtl/hmac_lfsr.sv
     tops: [hmac_ctrl]
   rtl_lint:
     directories: []

src/hmac/config/hmac_ctrl.vf

@@ -43,10 +43,11 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v
 ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv
-${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv
+${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v
-${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv

src/hmac/config/hmac_ctrl_tb.vf

@@ -48,10 +48,11 @@ ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_w_mem.v
 ${CALIPTRA_ROOT}/src/sha512/rtl/sha512_reg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_defines_pkg.sv
 ${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_core.sv
-${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_lfsr.sv
+${CALIPTRA_ROOT}/src/sha512_masked/rtl/sha512_masked_w_mem.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_param_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg_pkg.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_ctrl.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac.sv
 ${CALIPTRA_ROOT}/src/hmac/rtl/hmac_core.v
-${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_reg.sv
+${CALIPTRA_ROOT}/src/hmac/rtl/hmac_lfsr.sv

src/hmac/rtl/hmac.sv

@@ -69,15 +69,15 @@ module hmac
   localparam BLOCK_SIZE       = 1024;
   localparam KEY_SIZE         = 384;
   localparam TAG_SIZE         = KEY_SIZE;
-  localparam LFSR_SEED_SIZE   = 148;  // 2 * 74_bit lfsr_seed for each SHA512 core
+  localparam LFSR_SEED_SIZE   = 384;
   localparam BLOCK_NUM_DWORDS = BLOCK_SIZE / DATA_WIDTH;
   localparam KEY_NUM_DWORDS   = KEY_SIZE / DATA_WIDTH;
   localparam TAG_NUM_DWORDS   = TAG_SIZE / DATA_WIDTH;
   localparam SEED_NUM_DWORDS  = ((LFSR_SEED_SIZE - 1) / DATA_WIDTH) + 1; 
 
-  reg [KEY_NUM_DWORDS - 1 : 0][DATA_WIDTH - 1 : 0]    key_reg;
-  reg [BLOCK_NUM_DWORDS - 1 : 0][DATA_WIDTH - 1 : 0]  block_reg;
-  reg [SEED_NUM_DWORDS- 1 : 0][DATA_WIDTH - 1 : 0]    lfsr_seed_reg;
+  reg [KEY_NUM_DWORDS - 1   : 0][DATA_WIDTH - 1 : 0]    key_reg;
+  reg [BLOCK_NUM_DWORDS - 1 : 0][DATA_WIDTH - 1 : 0]    block_reg;
+  reg [SEED_NUM_DWORDS- 1   : 0][DATA_WIDTH - 1 : 0]    lfsr_seed_reg;
 
   logic zeroize_reg;
 
@@ -132,7 +132,8 @@ module hmac
   assign core_key = {key_reg[00], key_reg[01], key_reg[02], key_reg[03], key_reg[04], key_reg[05],
                      key_reg[06], key_reg[07], key_reg[08], key_reg[09], key_reg[10], key_reg[11]};
 
-  assign core_lfsr_seed = {lfsr_seed_reg[00][19 : 0], lfsr_seed_reg[01], lfsr_seed_reg[02], lfsr_seed_reg[03], lfsr_seed_reg[04]};
+  assign core_lfsr_seed = {lfsr_seed_reg[00], lfsr_seed_reg[01], lfsr_seed_reg[02], lfsr_seed_reg[03], lfsr_seed_reg[04], lfsr_seed_reg[05],
+                           lfsr_seed_reg[06], lfsr_seed_reg[07], lfsr_seed_reg[08], lfsr_seed_reg[09], lfsr_seed_reg[10], lfsr_seed_reg[11]};
 
   //rising edge detect on core tag valid
   assign core_tag_we = core_tag_valid & ~tag_valid_reg;

src/hmac/rtl/hmac_core.v

@@ -23,7 +23,7 @@
 
 module hmac_core
 #(
-      parameter [147 : 0]   LFSR_INIT_SEED  = 148'h5_60DE_54E3_6AC0_807B_2396_8E54_5475_3CAB_FFB0 // a random value
+      parameter [383 : 0]   LFSR_INIT_SEED  = 384'hc48555929cd58779f4819c1e6570c2ef20bccd503284e2d366f3273a66e9719b07ac999c80740d6277af88ceb4c3029c // a random value
 )
 (
       // Clock and reset.
@@ -38,7 +38,7 @@ module hmac_core
       output wire           tag_valid,
 
       // Data ports.
-      input wire [147 : 0]  lfsr_seed,
+      input wire [383 : 0]  lfsr_seed,
 
       input wire [383 : 0]  key,
       input wire [1023 : 0] block_msg,
@@ -59,8 +59,6 @@ module hmac_core
   localparam [2 : 0] CTRL_HMAC   = 3'd3;
   localparam [2 : 0] CTRL_DONE   = 3'd4;
 
-  localparam [73 : 0] LFSR_INIT_SEED0 = LFSR_INIT_SEED[73  :  0];
-  localparam [73 : 0] LFSR_INIT_SEED1 = LFSR_INIT_SEED[147 : 74];
   //----------------------------------------------------------------
   // Registers including update variables and write enable.
   //----------------------------------------------------------------
@@ -101,6 +99,8 @@ module hmac_core
   wire            H2_digest_valid;
   wire [127:0]    garbage_bit_vector1,garbage_bit_vector2;
 
+  wire [383 : 0]  entropy;
+
   //----------------------------------------------------------------
   // Concurrent connectivity for ports etc.
   //----------------------------------------------------------------
@@ -110,10 +110,7 @@ module hmac_core
   //----------------------------------------------------------------
   // core instantiation.
   //----------------------------------------------------------------
-  sha512_masked_core #(
-                     .LFSR_INIT_SEED(LFSR_INIT_SEED0)
-                     )
-                     u_sha512_core_h1 
+  sha512_masked_core u_sha512_core_h1 
                      (
                      .clk(clk),
                      .reset_n(reset_n),
@@ -123,7 +120,7 @@ module hmac_core
                      .next_cmd(H1_next),
                      .mode(2'h2),
 
-                     .lfsr_seed(lfsr_seed[73 : 0]),
+                     .entropy(entropy[191 : 0]),
 
                      .block_msg(H1_block),
 
@@ -132,10 +129,7 @@ module hmac_core
                      .digest_valid(H1_digest_valid)
                     );
 
-  sha512_masked_core #(
-                     .LFSR_INIT_SEED(LFSR_INIT_SEED1)
-                     )
-                     u_sha512_core_h2 
+  sha512_masked_core u_sha512_core_h2 
                      (
                      .clk(clk),
                      .reset_n(reset_n),
@@ -145,7 +139,7 @@ module hmac_core
                      .next_cmd(H2_next),
                      .mode(2'h2),
 
-                     .lfsr_seed(lfsr_seed[147 : 74]),
+                     .entropy(entropy[383 : 192]),
 
                      .block_msg(H2_block),
 
@@ -154,6 +148,24 @@ module hmac_core
                      .digest_valid(H2_digest_valid)
                     );
 
+  genvar i;
+  generate 
+      for (i=0; i < 12; i++) begin : gen_lfsr
+          hmac_lfsr #(
+              .REG_SIZE(32),
+              .INIT_SEED(LFSR_INIT_SEED[i*32 +: 32])
+              )
+              lfsr_inst_i
+              (
+              .clk(clk),
+              .reset_n(reset_n),
+              .zeroize(zeroize),
+              .en(init_cmd),
+              .seed(lfsr_seed[i*32 +: 32]),
+              .rnd(entropy[i*32 +: 32])
+              );
+      end
+  endgenerate
   //----------------------------------------------------------------
   // reg_update
   //

src/hmac_drbg/rtl/hmac_drbg_lfsr.sv → src/hmac/rtl/hmac_lfsr.sv

@@ -14,16 +14,16 @@
 //
 //======================================================================
 //
-// hmac_drbg_lfsr.sv
+// hmac_lfsr.sv
 // ------
-// 148-bit LFSR
+// 32-bit LFSR
 // 
 //======================================================================
 
-module hmac_drbg_lfsr
+module hmac_lfsr
 #(
-   parameter                    REG_SIZE  = 148,
-   parameter [REG_SIZE-1 : 0]   INIT_SEED = 148'h5_60DE_54E3_6AC0_807B_2396_8E54_5475_3CAB_FFB0 // a random value
+   parameter                    REG_SIZE  = 32,
+   parameter [REG_SIZE-1 : 0]   INIT_SEED = 32'h3CAB_FFB0 // a random value
 )
 (
   // Clock and reset.
@@ -52,10 +52,10 @@ module hmac_drbg_lfsr
   // Update functionality for all registers in the core.
   //----------------------------------------------------------------
 
-   // TAPs are: 148, 121 based on Xilinx doc: https://docs.xilinx.com/v/u/en-US/xapp052
-   always_comb feedback = rnd_reg[147] ^ rnd_reg[120];
+   // TAPs are: 32,22,2,1 based on Xilinx doc: https://docs.xilinx.com/v/u/en-US/xapp052
+   always_comb feedback = rnd_reg[31] ^ rnd_reg[21] ^ rnd_reg[1] ^ rnd_reg[0];
 
-   always_comb rnd_next = {rnd_reg[REG_SIZE-2 : 0], feedback};
+   always_comb rnd_next = {rnd_reg[REG_SIZE-2 : 0], !feedback};
 
    always_ff @ (posedge clk or negedge reset_n) 
    begin

src/hmac/rtl/hmac_reg.rdl

@@ -158,16 +158,16 @@ addrmap hmac_reg {
     /* ---- HMAC384 Component Input LFSR Seed ---- */
     reg {
         name = "HMAC384 component lfsr seed register type definition";
-        desc = "5 32-bit registers storing the 160-bit lfsr seed input.
+        desc = "12 32-bit registers storing the 384-bit lfsr seed input.
                 These registers are located at HMAC384_base_address + 
-                0x0000_0130 to 0x0000_0140 in big-endian representation.";
+                0x0000_0130 to 0x0000_015C in big-endian representation.";
 
         default sw = w;
         default hw = r;
         default resetsignal = reset_b;
         field {desc = "Input lfsr seed field";} LFSR_SEED[32] = 32'h3CAB_FFB0; // a random value
 
-    } HMAC384_LFSR_SEED[5] @0x00000130;
+    } HMAC384_LFSR_SEED[12] @0x00000130;
 
     /* ---- HMAC Key Vault Control Reg ---- */
     kv_read_ctrl_reg HMAC384_KV_RD_KEY_CTRL @0x00000600;

src/hmac/rtl/hmac_reg.sv

@@ -71,7 +71,7 @@ module hmac_reg (
         logic [12-1:0]HMAC384_KEY;
         logic [32-1:0]HMAC384_BLOCK;
         logic [12-1:0]HMAC384_TAG;
-        logic [5-1:0]HMAC384_LFSR_SEED;
+        logic [12-1:0]HMAC384_LFSR_SEED;
         logic HMAC384_KV_RD_KEY_CTRL;
         logic HMAC384_KV_RD_KEY_STATUS;
         logic HMAC384_KV_RD_BLOCK_CTRL;
@@ -124,7 +124,7 @@ module hmac_reg (
         for(int i0=0; i0<12; i0++) begin
             decoded_reg_strb.HMAC384_TAG[i0] = cpuif_req_masked & (cpuif_addr == 'h100 + i0*'h4);
         end
-        for(int i0=0; i0<5; i0++) begin
+        for(int i0=0; i0<12; i0++) begin
             decoded_reg_strb.HMAC384_LFSR_SEED[i0] = cpuif_req_masked & (cpuif_addr == 'h130 + i0*'h4);
         end
         decoded_reg_strb.HMAC384_KV_RD_KEY_CTRL = cpuif_req_masked & (cpuif_addr == 'h600);
@@ -205,7 +205,7 @@ module hmac_reg (
                 logic [31:0] next;
                 logic load_next;
             } LFSR_SEED;
-        } [5-1:0]HMAC384_LFSR_SEED;
+        } [12-1:0]HMAC384_LFSR_SEED;
         struct packed{
             struct packed{
                 logic next;
@@ -504,7 +504,7 @@ module hmac_reg (
             struct packed{
                 logic [31:0] value;
             } LFSR_SEED;
-        } [5-1:0]HMAC384_LFSR_SEED;
+        } [12-1:0]HMAC384_LFSR_SEED;
         struct packed{
             struct packed{
                 logic value;
@@ -847,7 +847,7 @@ module hmac_reg (
             end
         end
     end
-    for(genvar i0=0; i0<5; i0++) begin
+    for(genvar i0=0; i0<12; i0++) begin
         // Field: hmac_reg.HMAC384_LFSR_SEED[].LFSR_SEED
         always_comb begin
             automatic logic [31:0] next_c = field_storage.HMAC384_LFSR_SEED[i0].LFSR_SEED.value;

src/hmac/rtl/hmac_reg_pkg.sv

@@ -284,7 +284,7 @@ package hmac_reg_pkg;
         hmac_reg__HMAC384_CTRL__out_t HMAC384_CTRL;
         hmac_reg__HMAC384_KEY__out_t [12-1:0]HMAC384_KEY;
         hmac_reg__HMAC384_BLOCK__out_t [32-1:0]HMAC384_BLOCK;
-        hmac_reg__HMAC384_LFSR_SEED__out_t [5-1:0]HMAC384_LFSR_SEED;
+        hmac_reg__HMAC384_LFSR_SEED__out_t [12-1:0]HMAC384_LFSR_SEED;
         __kv_read_ctrl_reg__out_t HMAC384_KV_RD_KEY_CTRL;
         __kv_read_ctrl_reg__out_t HMAC384_KV_RD_BLOCK_CTRL;
         __kv_write_ctrl_reg__out_t HMAC384_KV_WR_CTRL;

src/hmac/rtl/hmac_reg_uvm.sv

@@ -1164,7 +1164,7 @@ package hmac_reg_uvm;
         rand hmac_reg__HMAC384_KEY HMAC384_KEY[12];
         rand hmac_reg__HMAC384_BLOCK HMAC384_BLOCK[32];
         rand hmac_reg__HMAC384_TAG HMAC384_TAG[12];
-        rand hmac_reg__HMAC384_LFSR_SEED HMAC384_LFSR_SEED[5];
+        rand hmac_reg__HMAC384_LFSR_SEED HMAC384_LFSR_SEED[12];
         rand kv_read_ctrl_reg HMAC384_KV_RD_KEY_CTRL;
         rand kv_status_reg HMAC384_KV_RD_KEY_STATUS;
         rand kv_read_ctrl_reg HMAC384_KV_RD_BLOCK_CTRL;

src/hmac_drbg/config/compile.yml

@@ -9,7 +9,6 @@ targets:
     directories: [$COMPILE_ROOT/rtl]
     files:
       - $COMPILE_ROOT/rtl/hmac_drbg.sv
-      - $COMPILE_ROOT/rtl/hmac_drbg_lfsr.sv
     tops: [hmac_drbg]
 ---
 provides: [hmac_drbg_tb]