start of tap mailbox changes

src/integration/rtl/caliptra_reg.h

@@ -5073,6 +5073,10 @@
 #define MBOX_CSR_MBOX_UNLOCK                                                                        (0x20)
 #define MBOX_CSR_MBOX_UNLOCK_UNLOCK_LOW                                                             (0)
 #define MBOX_CSR_MBOX_UNLOCK_UNLOCK_MASK                                                            (0x1)
+#define CLP_MBOX_CSR_TAP_MODE                                                                       (0x30020024)
+#define MBOX_CSR_TAP_MODE                                                                           (0x24)
+#define MBOX_CSR_TAP_MODE_ENABLED_LOW                                                               (0)
+#define MBOX_CSR_TAP_MODE_ENABLED_MASK                                                              (0x1)
 #define CLP_SHA512_ACC_CSR_BASE_ADDR                                                                (0x30021000)
 #define CLP_SHA512_ACC_CSR_LOCK                                                                     (0x30021000)
 #define SHA512_ACC_CSR_LOCK                                                                         (0x0)

src/integration/rtl/caliptra_reg_defines.svh

@@ -5073,6 +5073,10 @@
 `define MBOX_CSR_MBOX_UNLOCK                                                                        (32'h20)
 `define MBOX_CSR_MBOX_UNLOCK_UNLOCK_LOW                                                             (0)
 `define MBOX_CSR_MBOX_UNLOCK_UNLOCK_MASK                                                            (32'h1)
+`define CLP_MBOX_CSR_TAP_MODE                                                                       (32'h30020024)
+`define MBOX_CSR_TAP_MODE                                                                           (32'h24)
+`define MBOX_CSR_TAP_MODE_ENABLED_LOW                                                               (0)
+`define MBOX_CSR_TAP_MODE_ENABLED_MASK                                                              (32'h1)
 `define CLP_SHA512_ACC_CSR_BASE_ADDR                                                                (32'h30021000)
 `define CLP_SHA512_ACC_CSR_LOCK                                                                     (32'h30021000)
 `define SHA512_ACC_CSR_LOCK                                                                         (32'h0)

src/soc_ifc/rtl/caliptra_top_reg.h

@@ -54,6 +54,10 @@
 #define MBOX_CSR_MBOX_UNLOCK                                                                        (0x20)
 #define MBOX_CSR_MBOX_UNLOCK_UNLOCK_LOW                                                             (0)
 #define MBOX_CSR_MBOX_UNLOCK_UNLOCK_MASK                                                            (0x1)
+#define CALIPTRA_TOP_REG_MBOX_CSR_TAP_MODE                                                          (0x30020024)
+#define MBOX_CSR_TAP_MODE                                                                           (0x24)
+#define MBOX_CSR_TAP_MODE_ENABLED_LOW                                                               (0)
+#define MBOX_CSR_TAP_MODE_ENABLED_MASK                                                              (0x1)
 #define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_BASE_ADDR                                             (0x30030000)
 #define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_CPTRA_HW_ERROR_FATAL                                  (0x30030000)
 #define GENERIC_AND_FUSE_REG_CPTRA_HW_ERROR_FATAL                                                   (0x0)

src/soc_ifc/rtl/caliptra_top_reg_defines.svh

@@ -54,6 +54,10 @@
 `define MBOX_CSR_MBOX_UNLOCK                                                                        (32'h20)
 `define MBOX_CSR_MBOX_UNLOCK_UNLOCK_LOW                                                             (0)
 `define MBOX_CSR_MBOX_UNLOCK_UNLOCK_MASK                                                            (32'h1)
+`define CALIPTRA_TOP_REG_MBOX_CSR_TAP_MODE                                                          (32'h30020024)
+`define MBOX_CSR_TAP_MODE                                                                           (32'h24)
+`define MBOX_CSR_TAP_MODE_ENABLED_LOW                                                               (0)
+`define MBOX_CSR_TAP_MODE_ENABLED_MASK                                                              (32'h1)
 `define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_BASE_ADDR                                             (32'h30030000)
 `define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_CPTRA_HW_ERROR_FATAL                                  (32'h30030000)
 `define GENERIC_AND_FUSE_REG_CPTRA_HW_ERROR_FATAL                                                   (32'h0)

src/soc_ifc/rtl/mbox.sv

@@ -144,6 +144,8 @@ logic wrptr_inc_valid;
 
 mbox_protocol_error_t mbox_protocol_error_nxt;
 
+logic tap_mode;
+
 //csr
 logic [DATA_W-1:0] csr_rdata;
 logic read_error;
@@ -154,6 +156,8 @@ mbox_csr__out_t hwif_out;
 
 assign mbox_error = read_error | write_error;
 
+assign tap_mode = hwif_out.tap_mode.enabled.value;
+
 //Determine if this is a valid request from the requester side
 //1) uC requests are valid if uc has lock
 //2) SoC requests are valid if soc has lock and it's the AXI ID that locked it 
@@ -189,6 +193,7 @@ always_comb arc_MBOX_RDY_FOR_DATA_MBOX_EXECUTE_SOC = (mbox_fsm_ps == MBOX_RDY_FO
 //move from rdy to execute to idle when uc resets execute
 always_comb arc_MBOX_EXECUTE_UC_MBOX_IDLE = (mbox_fsm_ps == MBOX_EXECUTE_UC) & ~hwif_out.mbox_execute.execute.value;
 always_comb arc_MBOX_EXECUTE_UC_MBOX_EXECUTE_SOC = (mbox_fsm_ps == MBOX_EXECUTE_UC) & soc_has_lock & (hwif_out.mbox_status.status.value != CMD_BUSY);
+always_comb arc_MBOX_EXECUTE_UC_MBOX_EXECUTE_TAP = (mbox_fsm_ps == MBOX_EXECUTE_UC) & soc_has_lock & (hwif_out.mbox_status.status.value != CMD_BUSY);
 //move from rdy to execute to idle when SoC resets execute
 always_comb arc_MBOX_EXECUTE_SOC_MBOX_IDLE = (mbox_fsm_ps == MBOX_EXECUTE_SOC) & ~hwif_out.mbox_execute.execute.value;
 always_comb arc_MBOX_EXECUTE_SOC_MBOX_EXECUTE_UC = (mbox_fsm_ps == MBOX_EXECUTE_SOC) & ~soc_has_lock & (hwif_out.mbox_status.status.value != CMD_BUSY);

src/soc_ifc/rtl/mbox_csr.rdl

@@ -194,6 +194,14 @@ addrmap mbox_csr {
         field {sw=rw; hw=r; singlepulse; swwel = soc_req;} unlock=0;
     } mbox_unlock;
 
+    reg {
+        name="Mailbox TAP Mode";
+        desc="Capability for uC to enable TAP logic to respond to mailbox commands.
+              [br]Caliptra Access: RW
+              [br]SOC Access:      RO";
+        field {sw=rw; hw=r; swwel = soc_req;} enabled=0;
+    } tap_mode;
+
     // This will auto clear the status register whenever a mailbox transfer
     // is not in progress. 1-cycle delayed from when the Receiver clears
     // the execute field.

src/soc_ifc/rtl/mbox_csr.sv

@@ -75,6 +75,7 @@ module mbox_csr (
         logic mbox_execute;
         logic mbox_status;
         logic mbox_unlock;
+        logic tap_mode;
     } decoded_reg_strb_t;
     decoded_reg_strb_t decoded_reg_strb;
     logic decoded_req;
@@ -92,6 +93,7 @@ module mbox_csr (
         decoded_reg_strb.mbox_execute = cpuif_req_masked & (cpuif_addr == 6'h18);
         decoded_reg_strb.mbox_status = cpuif_req_masked & (cpuif_addr == 6'h1c);
         decoded_reg_strb.mbox_unlock = cpuif_req_masked & (cpuif_addr == 6'h20);
+        decoded_reg_strb.tap_mode = cpuif_req_masked & (cpuif_addr == 6'h24);
     end
 
     // Pass down signals to next stage
@@ -178,6 +180,12 @@ module mbox_csr (
                 logic load_next;
             } unlock;
         } mbox_unlock;
+        struct packed{
+            struct packed{
+                logic next;
+                logic load_next;
+            } enabled;
+        } tap_mode;
     } field_combo_t;
     field_combo_t field_combo;
 
@@ -242,6 +250,11 @@ module mbox_csr (
                 logic value;
             } unlock;
         } mbox_unlock;
+        struct packed{
+            struct packed{
+                logic value;
+            } enabled;
+        } tap_mode;
     } field_storage_t;
     field_storage_t field_storage;
 
@@ -565,6 +578,27 @@ module mbox_csr (
         end
     end
     assign hwif_out.mbox_unlock.unlock.value = field_storage.mbox_unlock.unlock.value;
+    // Field: mbox_csr.tap_mode.enabled
+    always_comb begin
+        automatic logic [0:0] next_c;
+        automatic logic load_next_c;
+        next_c = field_storage.tap_mode.enabled.value;
+        load_next_c = '0;
+        if(decoded_reg_strb.tap_mode && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write
+            next_c = (field_storage.tap_mode.enabled.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]);
+            load_next_c = '1;
+        end
+        field_combo.tap_mode.enabled.next = next_c;
+        field_combo.tap_mode.enabled.load_next = load_next_c;
+    end
+    always_ff @(posedge clk or negedge hwif_in.cptra_rst_b) begin
+        if(~hwif_in.cptra_rst_b) begin
+            field_storage.tap_mode.enabled.value <= 1'h0;
+        end else if(field_combo.tap_mode.enabled.load_next) begin
+            field_storage.tap_mode.enabled.value <= field_combo.tap_mode.enabled.next;
+        end
+    end
+    assign hwif_out.tap_mode.enabled.value = field_storage.tap_mode.enabled.value;
 
     //--------------------------------------------------------------------------
     // Write response
@@ -582,7 +616,7 @@ module mbox_csr (
     logic [31:0] readback_data;
 
     // Assign readback values to a flattened array
-    logic [9-1:0][31:0] readback_array;
+    logic [10-1:0][31:0] readback_array;
     assign readback_array[0][0:0] = (decoded_reg_strb.mbox_lock && !decoded_req_is_wr) ? field_storage.mbox_lock.lock.value : '0;
     assign readback_array[0][31:1] = '0;
     assign readback_array[1][31:0] = (decoded_reg_strb.mbox_id && !decoded_req_is_wr) ? field_storage.mbox_id.id.value : '0;
@@ -601,14 +635,16 @@ module mbox_csr (
     assign readback_array[7][31:25] = '0;
     assign readback_array[8][0:0] = (decoded_reg_strb.mbox_unlock && !decoded_req_is_wr) ? field_storage.mbox_unlock.unlock.value : '0;
     assign readback_array[8][31:1] = '0;
+    assign readback_array[9][0:0] = (decoded_reg_strb.tap_mode && !decoded_req_is_wr) ? field_storage.tap_mode.enabled.value : '0;
+    assign readback_array[9][31:1] = '0;
 
     // Reduce the array
     always_comb begin
         automatic logic [31:0] readback_data_var;
         readback_done = decoded_req & ~decoded_req_is_wr;
         readback_err = '0;
         readback_data_var = '0;
-        for(int i=0; i<9; i++) readback_data_var |= readback_array[i];
+        for(int i=0; i<10; i++) readback_data_var |= readback_array[i];
         readback_data = readback_data_var;
     end
 

src/soc_ifc/rtl/mbox_csr_pkg.sv

@@ -188,6 +188,14 @@ package mbox_csr_pkg;
         mbox_csr__mbox_unlock__unlock__out_t unlock;
     } mbox_csr__mbox_unlock__out_t;
 
+    typedef struct packed{
+        logic value;
+    } mbox_csr__tap_mode__enabled__out_t;
+
+    typedef struct packed{
+        mbox_csr__tap_mode__enabled__out_t enabled;
+    } mbox_csr__tap_mode__out_t;
+
     typedef struct packed{
         mbox_csr__mbox_lock__out_t mbox_lock;
         mbox_csr__mbox_id__out_t mbox_id;
@@ -198,6 +206,7 @@ package mbox_csr_pkg;
         mbox_csr__mbox_execute__out_t mbox_execute;
         mbox_csr__mbox_status_ecc_double_error_38cec4b0_ecc_single_error_9c62b760__out_t mbox_status;
         mbox_csr__mbox_unlock__out_t mbox_unlock;
+        mbox_csr__tap_mode__out_t tap_mode;
     } mbox_csr__out_t;
 
     typedef enum logic [31:0] {

src/soc_ifc/rtl/mbox_csr_uvm.sv

@@ -299,6 +299,36 @@ package mbox_csr_uvm;
         endfunction : build
     endclass : mbox_csr__mbox_unlock
 
+    // Reg - mbox_csr::tap_mode
+    class mbox_csr__tap_mode extends uvm_reg;
+        protected uvm_reg_data_t m_current;
+        protected uvm_reg_data_t m_data;
+        protected bit            m_is_read;
+
+        mbox_csr__tap_mode_bit_cg enabled_bit_cg[1];
+        mbox_csr__tap_mode_fld_cg fld_cg;
+        rand uvm_reg_field enabled;
+
+        function new(string name = "mbox_csr__tap_mode");
+            super.new(name, 32, build_coverage(UVM_CVR_ALL));
+        endfunction : new
+        extern virtual function void sample_values();
+        extern protected virtual function void sample(uvm_reg_data_t  data,
+                                                      uvm_reg_data_t  byte_en,
+                                                      bit             is_read,
+                                                      uvm_reg_map     map);
+
+        virtual function void build();
+            this.enabled = new("enabled");
+            this.enabled.configure(this, 1, 0, "RW", 0, 'h0, 1, 1, 0);
+            if (has_coverage(UVM_CVR_REG_BITS)) begin
+                foreach(enabled_bit_cg[bt]) enabled_bit_cg[bt] = new();
+            end
+            if (has_coverage(UVM_CVR_FIELD_VALS))
+                fld_cg = new();
+        endfunction : build
+    endclass : mbox_csr__tap_mode
+
     // Addrmap - mbox_csr
     class mbox_csr extends uvm_reg_block;
         rand mbox_csr__mbox_lock mbox_lock;
@@ -310,6 +340,7 @@ package mbox_csr_uvm;
         rand mbox_csr__mbox_execute mbox_execute;
         rand mbox_csr__mbox_status_ecc_double_error_38cec4b0_ecc_single_error_9c62b760 mbox_status;
         rand mbox_csr__mbox_unlock mbox_unlock;
+        rand mbox_csr__tap_mode tap_mode;
 
         function new(string name = "mbox_csr");
             super.new(name);
@@ -362,6 +393,11 @@ package mbox_csr_uvm;
 
             this.mbox_unlock.build();
             this.default_map.add_reg(this.mbox_unlock, 'h20);
+            this.tap_mode = new("tap_mode");
+            this.tap_mode.configure(this);
+
+            this.tap_mode.build();
+            this.default_map.add_reg(this.tap_mode, 'h24);
         endfunction : build
     endclass : mbox_csr
 

src/soc_ifc/rtl/soc_ifc_pkg.sv

@@ -103,6 +103,7 @@ package soc_ifc_pkg;
         MBOX_RDY_FOR_DATA = 3'b010,
         MBOX_EXECUTE_UC   = 3'b110,
         MBOX_EXECUTE_SOC  = 3'b100,
+        MBOX_EXECUTE_TAP  = 3'b101,
         MBOX_ERROR        = 3'b111
     } mbox_fsm_state_e;