cpu/stm32: Fix periph_gpio_ll_irq #19446

maribu · 2023-04-04T06:41:28Z

Contribution description

This fixes a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families.

Testing procedure

make BOARD=nucleo-f429zi flash test-with-config -j16 -C tests/periph_gpio_ll
[...]
TEST SUCCEEDED

Full log output


make BOARD=nucleo-f429zi flash test-with-config -j16 -C tests/periph_gpio_ll
make: Entering directory '/home/maribu/Repos/software/RIOT/tests/periph_gpio_ll'
Building application "tests_periph_gpio_ll" for "nucleo-f429zi" with MCU "stm32".

"make" -C /home/maribu/Repos/software/RIOT/boards/common/init
"make" -C /home/maribu/Repos/software/RIOT/boards/nucleo-f429zi
"make" -C /home/maribu/Repos/software/RIOT/core
"make" -C /home/maribu/Repos/software/RIOT/core/lib
"make" -C /home/maribu/Repos/software/RIOT/cpu/stm32
"make" -C /home/maribu/Repos/software/RIOT/drivers
"make" -C /home/maribu/Repos/software/RIOT/sys
"make" -C /home/maribu/Repos/software/RIOT/boards/common/nucleo
"make" -C /home/maribu/Repos/software/RIOT/drivers/periph_common
"make" -C /home/maribu/Repos/software/RIOT/sys/auto_init
"make" -C /home/maribu/Repos/software/RIOT/sys/div
"make" -C /home/maribu/Repos/software/RIOT/sys/frac
"make" -C /home/maribu/Repos/software/RIOT/sys/isrpipe
"make" -C /home/maribu/Repos/software/RIOT/cpu/cortexm_common
"make" -C /home/maribu/Repos/software/RIOT/cpu/stm32/periph
"make" -C /home/maribu/Repos/software/RIOT/cpu/stm32/stmclk
"make" -C /home/maribu/Repos/software/RIOT/cpu/stm32/vectors
"make" -C /home/maribu/Repos/software/RIOT/sys/libc
"make" -C /home/maribu/Repos/software/RIOT/sys/malloc_thread_safe
"make" -C /home/maribu/Repos/software/RIOT/sys/newlib_syscalls_default
"make" -C /home/maribu/Repos/software/RIOT/sys/pm_layered
"make" -C /home/maribu/Repos/software/RIOT/sys/preprocessor
"make" -C /home/maribu/Repos/software/RIOT/cpu/cortexm_common/periph
"make" -C /home/maribu/Repos/software/RIOT/sys/stdio_uart
"make" -C /home/maribu/Repos/software/RIOT/sys/test_utils/interactive_sync
"make" -C /home/maribu/Repos/software/RIOT/sys/test_utils/print_stack_usage
"make" -C /home/maribu/Repos/software/RIOT/sys/tsrb
"make" -C /home/maribu/Repos/software/RIOT/sys/ztimer
   text	  data	   bss	   dec	   hex	filename
  21660	   180	  2720	 24560	  5ff0	/home/maribu/Repos/software/RIOT/tests/periph_gpio_ll/bin/nucleo-f429zi/tests_periph_gpio_ll.elf
/home/maribu/Repos/software/RIOT/dist/tools/openocd/openocd.sh flash /home/maribu/Repos/software/RIOT/tests/periph_gpio_ll/bin/nucleo-f429zi/tests_periph_gpio_ll.elf
### Flashing Target ###
Open On-Chip Debugger 0.12.0+dev-snapshot (2023-03-13-08:56)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
DEPRECATED! use 'adapter serial' not 'hla_serial'
hla_swd
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : clock speed 2000 kHz
Info : STLINK V2J29M18 (API v2) VID:PID 0483:374B
Info : Target voltage: 3.246873
Info : [stm32f4x.cpu] Cortex-M4 r0p1 processor detected
Info : [stm32f4x.cpu] target has 6 breakpoints, 4 watchpoints
Info : starting gdb server for stm32f4x.cpu on 0
Info : Listening on port 36571 for gdb connections
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
 0* stm32f4x.cpu       hla_target little stm32f4x.cpu       unknown
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
[stm32f4x.cpu] halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x08001c40 msp: 0x20000200
Info : device id = 0x20016419
Info : flash size = 2048 KiB
Info : Dual Bank 2048 kiB STM32F42x/43x/469/479 found
auto erase enabled
wrote 32768 bytes from file /home/maribu/Repos/software/RIOT/tests/periph_gpio_ll/bin/nucleo-f429zi/tests_periph_gpio_ll.elf in 1.062827s (30.108 KiB/s)
verified 21840 bytes in 0.216882s (98.340 KiB/s)
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
shutdown command invoked
Done flashing
r
/home/maribu/Repos/software/RIOT/dist/tools/pyterm/pyterm -p "/dev/ttyACM1" -b "115200" --no-reconnect --noprefix --no-repeat-command-on-empty-line 
Connect to serial port /dev/ttyACM1
Welcome to pyterm!
Type '/exit' to exit.
READY
s
START
main(): This is RIOT! (Version: 2023.04-devel-776-g3bee0-cpu/stm32/periph/gpio_ll_irq_fix)
Test / Hardware Details:
========================
Cabling:
(INPUT -- OUTPUT)
  P2.8 (PC8) -- P1.8 (PB8)
  P2.9 (PC9) -- P1.9 (PB9)
Number of pull resistor values supported: 1
Number of drive strengths supported: 1
Number of slew rates supported: 3
Valid GPIO ports:
- PORT 0 (PORT A)
- PORT 1 (PORT B)
- PORT 2 (PORT C)
- PORT 3 (PORT D)
- PORT 4 (PORT E)
- PORT 5 (PORT F)
- PORT 6 (PORT G)
- PORT 7 (PORT H)
- PORT 8 (PORT I)
- PORT 9 (PORT J)
- PORT 10 (PORT K)

Testing gpio_port_pack_addr()
=============================

All OK

Testing gpip_ng_init()
======================

Testing is_gpio_port_num_valid() is true for PORT_OUT and PORT_IN:

Testing input configurations for PIN_IN_0:
Support for input with pull up: yes
state: in, pull: up, schmitt trigger: off, value: on
Support for input with pull down: yes
state: in, pull: down, schmitt trigger: off, value: off
Support for input with pull to bus level: no
Support for floating input (no pull resistors): yes
state: in, pull: none, schmitt trigger: off, value: off

Testing output configurations for PIN_OUT_0:
Support for output (push-pull) with initial value of LOW: yes
state: out-pp, slew: slowest, value: off
Output is indeed LOW: yes
state: out-pp, slew: slowest, value: on
Output can be pushed HIGH: yes
Support for output (push-pull) with initial value of HIGH: yes
state: out-pp, slew: slowest, value: on
Output is indeed HIGH: yes
Support for output (open drain with pull up) with initial value of LOW: yes
state: out-od, slew: slowest, pull: up, schmitt trigger: off, value: off
Output is indeed LOW: yes
Support for output (open drain with pull up) with initial value of HIGH: yes
state: out-od, slew: slowest, pull: up, schmitt trigger: off, value: on
Output is indeed HIGH: yes
Support for output (open drain) with initial value of LOW: yes
state: out-od, slew: slowest, pull: none, schmitt trigger: off, value: off
Output is indeed LOW: yes
Support for output (open drain) with initial value of HIGH: yes
state: out-od, slew: slowest, pull: none, schmitt trigger: off, value: on
state: in, pull: down, schmitt trigger: off, value: off
Output can indeed be pulled LOW: yes
state: in, pull: up, schmitt trigger: off, value: off
Output can indeed be pulled HIGH: yes
Support for output (open source) with initial value of LOW: no
Support for output (open source) with initial value of HIGH: no
Support for output (open source with pull up) with initial value of HIGH: no
Support for output (open source with pull up) with initial value of LOW: no
Support for disconnecting GPIO: yes
Output can indeed be pulled LOW: yes
Output can indeed be pulled HIGH: yes

Testing Reading/Writing GPIO Ports
==================================

testing initial value of 0 after init
...OK
testing setting both outputs_optional simultaneously
...OK
testing clearing both outputs_optional simultaneously
...OK
testing toggling first output (0 --> 1)
...OK
testing toggling first output (1 --> 0)
...OK
testing toggling second output (0 --> 1)
...OK
testing toggling second output (1 --> 0)
...OK
testing setting first output and clearing second with write
...OK
testing setting second output and clearing first with write
...OK
All input/output operations worked as expected

Testing External IRQs
=====================

Testing rising edge on PIN_IN_0
... OK
Testing falling edge on PIN_IN_0
... OK
Testing both edges on PIN_IN_0
... OK
Testing masking of IRQs (still both edges on PIN_IN_0)
... OK
Testing level-triggered on HIGH on PIN_IN_0 (when input is LOW when setting up IRQ)
... OK
Testing level-triggered on HIGH on PIN_IN_0 (when input is HIGH when setting up IRQ)
... OK
Testing level-triggered on LOW on PIN_IN_0 (when input is HIGH when setting up IRQ)
... OK
Testing level-triggered on LOW on PIN_IN_0 (when input is LOW when setting up IRQ)
... OK


TEST SUCCEEDED

Issues/PRs references

Introduced in #19412

MrKevinWeiss

I trust the output of @maribu and fixes right before release are always welcome. ACK.

MrKevinWeiss · 2023-04-04T06:51:35Z

bors merge

bors · 2023-04-04T06:51:38Z

🕐 Waiting for PR status (GitHub check) to be set, probably by CI. Bors will automatically try to run when all required PR statuses are set.

riot-ci · 2023-04-04T06:52:08Z

Murdock results

✔️ PASSED

8bfd74d cpu/stm32: Fix periph_gpio_ll_irq

Success	Failures	Total	Runtime
6882	0	6882	09m:49s

Artifacts

Documentation preview

19446: cpu/stm32: Fix periph_gpio_ll_irq r=MrKevinWeiss a=maribu ### Contribution description This fixes a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families. ### Testing procedure ``` make BOARD=nucleo-f429zi flash test-with-config -j16 -C tests/periph_gpio_ll [...] TEST SUCCEEDED ``` Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>

bors · 2023-04-04T07:04:18Z

Build failed:

Murdock

maribu · 2023-04-04T07:21:43Z

cpu/stm32/periph/gpio_ll_irq.c

-
-#ifdef  RCC_APBENR2_SYSCFGEN
-#  define SYSFG_ENABLE_MASK     RCC_APBENR2_SYSCFGEN
+#elif defined(RCC_APB2ENR_SYSCFGEN)


This has to be an #elif instead because for STM32F0 both are defined:

/* Old Bit definition maintained for legacy purpose */ #define RCC_APB2ENR_SYSCFGEN RCC_APB2ENR_SYSCFGCOMPEN /*!< SYSCFG clock enable */ #define RCC_APB2ENR_ADC1EN RCC_APB2ENR_ADCEN /*!< ADC1 clock enable */

maribu · 2023-04-04T10:39:44Z

@MrKevinWeiss this should now be ready again

MrKevinWeiss · 2023-04-04T11:56:06Z

bors merge

19446: cpu/stm32: Fix periph_gpio_ll_irq r=MrKevinWeiss a=maribu ### Contribution description This fixes a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families. This also adds a compile time check that prevents using `SYSFG` without having `SYSFG_CLOCK` defined to prevent future issues like this. ### Testing procedure ``` make BOARD=nucleo-f429zi flash test-with-config -j16 -C tests/periph_gpio_ll [...] TEST SUCCEEDED ``` Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>

bors · 2023-04-04T14:18:38Z

Build failed:

Murdock

maribu · 2023-04-04T14:44:22Z

/tmp/dwq.0.3855384646372234/68f1ad812c5c570e71a786aab4c30108/cpu/stm32/periph/gpio_ll_irq.c:108:6: error: #error "SYSFG_CLOCK not defined, but EXTICR reg is in SYSFG"
  108 | #    error "SYSFG_CLOCK not defined, but EXTICR reg is in SYSFG"
      |      ^~~~~

Perfect, the sanity check is working :)

Fixing a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families.

maribu · 2023-04-04T15:26:33Z

I dropped the check again. STM32WL, STM32WB and STM32MP1 don't need to enable a lock to SYSCFG in order to use it. This is consistent with what the GPIO driver (non-LL-version) does:

RIOT/cpu/stm32/periph/gpio_all.c

Lines 247 to 259 in d6dc3a1

    
               /* enable clock of the SYSCFG module for EXTI configuration */ 
        
           #if !defined(CPU_FAM_STM32WB) && !defined(CPU_FAM_STM32MP1) && \ 
        
               !defined(CPU_FAM_STM32WL) 
        
           #ifdef CPU_FAM_STM32F0 
        
               periph_clk_en(APB2, RCC_APB2ENR_SYSCFGCOMPEN); 
        
           #elif defined(CPU_FAM_STM32G0) 
        
               periph_clk_en(APB12, RCC_APBENR2_SYSCFGEN); 
        
           #elif defined(CPU_FAM_STM32U5) 
        
               periph_clk_en(APB3, RCC_APB3ENR_SYSCFGEN); 
        
           #else 
        
               periph_clk_en(APB2, RCC_APB2ENR_SYSCFGEN); 
        
           #endif 
        
           #endif

MrKevinWeiss · 2023-04-04T15:29:42Z

We don't need to super rush, RC1 is already out so it will have to be backported. The script works fine as well.

maribu · 2023-04-05T07:05:35Z

bors try

bors · 2023-04-05T09:15:53Z

try

Build succeeded:

MrKevinWeiss · 2023-04-05T11:05:38Z

OK, well then...

MrKevinWeiss · 2023-04-05T11:05:45Z

bors merge

bors · 2023-04-05T13:49:44Z

Build succeeded:

maribu · 2023-04-05T15:00:56Z

Thx :)

maribu · 2023-04-05T15:10:21Z

Sorry for the confusion, #19412 actually didn't make it into the release branch. We don't have STM32F1 GPIO LL support in the release, but we also don't have the bug that sneaked in with the GPIO LL support for STM32F1 this fixed.

MrKevinWeiss · 2023-04-13T07:28:01Z

That was an exciting one, thanks for the clarification!

maribu added Type: bug The issue reports a bug / The PR fixes a bug (including spelling errors) CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Area: cpu Area: CPU/MCU ports labels Apr 4, 2023

maribu requested review from aabadie, fjmolinas, DipSwitch and vincent-d as code owners April 4, 2023 06:41

github-actions bot added the Platform: ARM Platform: This PR/issue effects ARM-based platforms label Apr 4, 2023

MrKevinWeiss approved these changes Apr 4, 2023

View reviewed changes

MrKevinWeiss added the Process: needs backport Integration Process: The PR is required to be backported to a release or feature branch label Apr 4, 2023

maribu force-pushed the cpu/stm32/periph/gpio_ll_irq_fix branch from 3bee0ba to 1c13d3c Compare April 4, 2023 07:19

maribu commented Apr 4, 2023

View reviewed changes

cpu/stm32: Fix periph_gpio_ll_irq

8bfd74d

Fixing a high impact typo that broke GPIO LL IRQ support on a bunch of STM32 families.

maribu force-pushed the cpu/stm32/periph/gpio_ll_irq_fix branch from 1c13d3c to 8bfd74d Compare April 4, 2023 15:23

bors bot added a commit that referenced this pull request Apr 5, 2023

Try #19446:

f1c9c36

bors bot merged commit d864b8a into RIOT-OS:master Apr 5, 2023

maribu deleted the cpu/stm32/periph/gpio_ll_irq_fix branch April 5, 2023 15:00

maribu removed the Process: needs backport Integration Process: The PR is required to be backported to a release or feature branch label Apr 5, 2023

benpicco added this to the Release 2023.07 milestone Aug 2, 2023

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cpu/stm32: Fix periph_gpio_ll_irq #19446

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cpu/stm32: Fix periph_gpio_ll_irq #19446

cpu/stm32: Fix periph_gpio_ll_irq #19446

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Contribution description

Testing procedure

Issues/PRs references

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Murdock results

Artifacts

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try

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