-
Notifications
You must be signed in to change notification settings - Fork 2k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
cpu/stm32/periph: Add GPIO LL IRQ support for STM32F1 #19412
Conversation
19407: cpu/stm32/periph: Implement GPIO LL for STM32F1 without IRQ support (yet) r=gschorcht a=maribu ### Contribution description This implements GPIO LL support for the STM32F1 in the first commit. IRQ support is added with #19412. This sneaks in a second commit replacing the `expect()` calls in `tests/periph_gpio_ll` with a trivial five-liner that doesn't `panic()`, so that stdio output will still be delivered on high level stdio implementations. The tests provides a lot of useful output to aid debugging, so its a great usability improvement if the test makes sure to actually deliver that output. ### Testing procedure <details><summary><code>make -C tests/periph_gpio_ll BOARD=nucleo-f103rb flash term</code></summary> ``` 2023-03-17 18:55:09,188 # Help: Press s to start test, r to print it is ready s 2023-03-17 18:55:10,299 # START 2023-03-17 18:55:10,307 # main(): This is RIOT! (Version: 2023.04-devel-683-g9c3812-cpu/stm32/periph/gpio_ll) 2023-03-17 18:55:10,309 # Test / Hardware Details: 2023-03-17 18:55:10,310 # ======================== 2023-03-17 18:55:10,311 # Cabling: 2023-03-17 18:55:10,313 # (INPUT -- OUTPUT) 2023-03-17 18:55:10,315 # P2.10 (PC10) -- P2.2 (PC2) 2023-03-17 18:55:10,318 # P2.12 (PC12) -- P2.3 (PC3) 2023-03-17 18:55:10,322 # Number of pull resistor values supported: 1 2023-03-17 18:55:10,325 # Number of drive strengths supported: 1 2023-03-17 18:55:10,328 # Number of slew rates supported: 3 2023-03-17 18:55:10,330 # Valid GPIO ports: 2023-03-17 18:55:10,332 # - PORT 0 (PORT A) 2023-03-17 18:55:10,333 # - PORT 1 (PORT B) 2023-03-17 18:55:10,335 # - PORT 2 (PORT C) 2023-03-17 18:55:10,336 # - PORT 3 (PORT D) 2023-03-17 18:55:10,338 # - PORT 4 (PORT E) 2023-03-17 18:55:10,338 # 2023-03-17 18:55:10,341 # Testing gpio_port_pack_addr() 2023-03-17 18:55:10,343 # ============================= 2023-03-17 18:55:10,343 # 2023-03-17 18:55:10,344 # All OK 2023-03-17 18:55:10,344 # 2023-03-17 18:55:10,346 # Testing gpip_ng_init() 2023-03-17 18:55:10,348 # ====================== 2023-03-17 18:55:10,348 # 2023-03-17 18:55:10,354 # Testing is_gpio_port_num_valid() is true for PORT_OUT and PORT_IN: 2023-03-17 18:55:10,354 # 2023-03-17 18:55:10,358 # Testing input configurations for PIN_IN_0: 2023-03-17 18:55:10,361 # Support for input with pull up: yes 2023-03-17 18:55:10,366 # state: in, pull: up, schmitt trigger: off, value: on 2023-03-17 18:55:10,369 # Support for input with pull down: yes 2023-03-17 18:55:10,374 # state: in, pull: down, schmitt trigger: off, value: off 2023-03-17 18:55:10,378 # Support for input with pull to bus level: no 2023-03-17 18:55:10,383 # Support for floating input (no pull resistors): yes 2023-03-17 18:55:10,388 # state: in, pull: none, schmitt trigger: off, value: off 2023-03-17 18:55:10,388 # 2023-03-17 18:55:10,392 # Testing output configurations for PIN_OUT_0: 2023-03-17 18:55:10,397 # Support for output (push-pull) with initial value of LOW: yes 2023-03-17 18:55:10,401 # state: out-pp, slew: slowest, value: off 2023-03-17 18:55:10,404 # Output is indeed LOW: yes 2023-03-17 18:55:10,408 # state: out-pp, slew: slowest, value: on 2023-03-17 18:55:10,411 # Output can be pushed HIGH: yes 2023-03-17 18:55:10,417 # Support for output (push-pull) with initial value of HIGH: yes 2023-03-17 18:55:10,420 # state: out-pp, slew: slowest, value: on 2023-03-17 18:55:10,424 # Output is indeed HIGH: yes 2023-03-17 18:55:10,430 # Support for output (open drain with pull up) with initial value of LOW: no 2023-03-17 18:55:10,437 # Support for output (open drain with pull up) with initial value of HIGH: no 2023-03-17 18:55:10,443 # Support for output (open drain) with initial value of LOW: yes 2023-03-17 18:55:10,449 # state: out-od, slew: slowest, pull: none, schmitt trigger: off, value: off 2023-03-17 18:55:10,452 # Output is indeed LOW: yes 2023-03-17 18:55:10,458 # Support for output (open drain) with initial value of HIGH: yes 2023-03-17 18:55:10,465 # state: out-od, slew: slowest, pull: none, schmitt trigger: off, value: on 2023-03-17 18:55:10,470 # state: in, pull: down, schmitt trigger: off, value: off 2023-03-17 18:55:10,474 # Output can indeed be pulled LOW: yes 2023-03-17 18:55:10,478 # state: in, pull: up, schmitt trigger: off, value: on 2023-03-17 18:55:10,483 # Output can indeed be pulled HIGH: yes 2023-03-17 18:55:10,488 # Support for output (open source) with initial value of LOW: no 2023-03-17 18:55:10,494 # Support for output (open source) with initial value of HIGH: no 2023-03-17 18:55:10,501 # Support for output (open source with pull up) with initial value of HIGH: no 2023-03-17 18:55:10,508 # Support for output (open source with pull up) with initial value of LOW: no 2023-03-17 18:55:10,511 # Support for disconnecting GPIO: yes 2023-03-17 18:55:10,515 # Output can indeed be pulled LOW: yes 2023-03-17 18:55:10,519 # Output can indeed be pulled HIGH: yes 2023-03-17 18:55:10,519 # 2023-03-17 18:55:10,523 # Testing Reading/Writing GPIO Ports 2023-03-17 18:55:10,526 # ================================== 2023-03-17 18:55:10,526 # 2023-03-17 18:55:10,529 # testing initial value of 0 after init 2023-03-17 18:55:10,531 # ...OK 2023-03-17 18:55:10,535 # testing setting both outputs_optional simultaneously 2023-03-17 18:55:10,537 # ...OK 2023-03-17 18:55:10,541 # testing clearing both outputs_optional simultaneously 2023-03-17 18:55:10,543 # ...OK 2023-03-17 18:55:10,547 # testing toggling first output (0 --> 1) 2023-03-17 18:55:10,548 # ...OK 2023-03-17 18:55:10,552 # testing toggling first output (1 --> 0) 2023-03-17 18:55:10,553 # ...OK 2023-03-17 18:55:10,557 # testing toggling second output (0 --> 1) 2023-03-17 18:55:10,558 # ...OK 2023-03-17 18:55:10,562 # testing toggling second output (1 --> 0) 2023-03-17 18:55:10,563 # ...OK 2023-03-17 18:55:10,569 # testing setting first output and clearing second with write 2023-03-17 18:55:10,570 # ...OK 2023-03-17 18:55:10,575 # testing setting second output and clearing first with write 2023-03-17 18:55:10,576 # ...OK 2023-03-17 18:55:10,580 # All input/output operations worked as expected 2023-03-17 18:55:10,580 # 2023-03-17 18:55:10,580 # 2023-03-17 18:55:10,582 # TEST SUCCEEDED 2023-03-17 18:55:10,588 # { "threads": [{ "name": "main", "stack_size": 1536, "stack_used": 456 }]} ``` </details> <details><summary><code>make -C tests/bench_periph_gpio_ll BOARD=nucleo-f103rb flash term</code></summary> ``` 2023-03-17 18:55:42,192 # Help: Press s to start test, r to print it is ready s 2023-03-17 18:55:44,616 # START 2023-03-17 18:55:44,624 # main(): This is RIOT! (Version: 2023.04-devel-683-g9c3812-cpu/stm32/periph/gpio_ll) 2023-03-17 18:55:44,624 # 2023-03-17 18:55:44,626 # Benchmarking GPIO APIs 2023-03-17 18:55:44,628 # ====================== 2023-03-17 18:55:44,628 # 2023-03-17 18:55:44,632 # estimating loop overhead for compensation 2023-03-17 18:55:44,635 # ----------------------------------------- 2023-03-17 18:55:44,642 # 4168 us for 50000 iterations 2023-03-17 18:55:44,642 # 2023-03-17 18:55:44,647 # periph/gpio: Using 2x gpio_set() and 2x gpio_clear() 2023-03-17 18:55:44,651 # --------------------------------------------------- 2023-03-17 18:55:44,706 # 50000 iterations took 45840 us (50008 us uncompensated) 2023-03-17 18:55:44,713 # Two square waves pins at 1090750 Hz ( 999840 Hz uncompensated) 2023-03-17 18:55:44,719 # ~66 CPU cycles per square wave period (~72 cycles uncompensated) 2023-03-17 18:55:44,719 # :'-( 2023-03-17 18:55:44,719 # 2023-03-17 18:55:44,724 # periph/gpio_ll: Using gpio_ll_set() and gpio_ll_clear() 2023-03-17 18:55:44,729 # ------------------------------------------------------- 2023-03-17 18:55:44,738 # 50000 iterations took 695 us (4863 us uncompensated) 2023-03-17 18:55:44,745 # Two square waves pins at 71942446 Hz ( 10281719 Hz uncompensated) 2023-03-17 18:55:44,750 # ~1 CPU cycles per square wave period (~7 cycles uncompensated) 2023-03-17 18:55:44,751 # :-D 2023-03-17 18:55:44,751 # 2023-03-17 18:55:44,755 # periph/gpio: Using 4x gpio_toggle() 2023-03-17 18:55:44,757 # ----------------------------------- 2023-03-17 18:55:44,965 # 50000 iterations took 198646 us (202814 us uncompensated) 2023-03-17 18:55:44,972 # Two square waves pins at 251704 Hz ( 246531 Hz uncompensated) 2023-03-17 18:55:44,977 # ~286 CPU cycles per square wave period (~292 cycles uncompensated) 2023-03-17 18:55:44,978 # :'-( 2023-03-17 18:55:44,978 # 2023-03-17 18:55:44,982 # periph/gpio_ll: Using 2x gpio_ll_toggle() 2023-03-17 18:55:44,985 # ----------------------------------------- 2023-03-17 18:55:45,010 # 50000 iterations took 15972 us (20140 us uncompensated) 2023-03-17 18:55:45,017 # Two square waves pins at 3130478 Hz ( 2482621 Hz uncompensated) 2023-03-17 18:55:45,023 # ~23 CPU cycles per square wave period (~29 cycles uncompensated) 2023-03-17 18:55:45,023 # :'-( 2023-03-17 18:55:45,023 # 2023-03-17 18:55:45,026 # periph/gpio: Using 4x gpio_write() 2023-03-17 18:55:45,029 # ---------------------------------- 2023-03-17 18:55:45,097 # 50000 iterations took 58345 us (62513 us uncompensated) 2023-03-17 18:55:45,103 # Two square waves pins at 856971 Hz ( 799833 Hz uncompensated) 2023-03-17 18:55:45,109 # ~84 CPU cycles per square wave period (~90 cycles uncompensated) 2023-03-17 18:55:45,109 # :'-( 2023-03-17 18:55:45,110 # 2023-03-17 18:55:45,113 # periph/gpio_ll: Using 2x gpio_ll_write() 2023-03-17 18:55:45,117 # ---------------------------------------- 2023-03-17 18:55:45,128 # 50000 iterations took 2777 us (6945 us uncompensated) 2023-03-17 18:55:45,135 # Two square waves pins at 18005041 Hz ( 7199424 Hz uncompensated) 2023-03-17 18:55:45,141 # ~4 CPU cycles per square wave period (~10 cycles uncompensated) 2023-03-17 18:55:45,141 # :-) 2023-03-17 18:55:45,141 # 2023-03-17 18:55:45,141 # 2023-03-17 18:55:45,142 # TEST SUCCEEDED 2023-03-17 18:55:45,149 # { "threads": [{ "name": "main", "stack_size": 1536, "stack_used": 448 }]} ``` </details> ### Issues/PRs references None Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
This PR still includes PR #19407. Could you please rebase to have only the changes of this PR in diffs? |
Works as expected. |
d0d5d0d
to
0f3a9f8
Compare
Thanks for taking a look. I rebased on |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks good, nice cleanup. Works as expected.
Please fix the static test. You can squash it directly. |
0f3a9f8
to
03dfa49
Compare
bors merge |
Build succeeded: |
Thx :) |
19454: cpu/stm32/periph_gpio_ll: Fix misleading comments r=gschorcht a=maribu ### Contribution description The comments still claim STM32F1 support is missing, but this was recently added. Also, drop an empty line to fix `too many consecutive empty lines` nitpick of the CI. ### Testing procedure This since only changes comments, this won't effect the binaries. Technically, those comments would be Doxygen compatible comments. But as only Doxygen comments in headers are parsed, these are in practice regular plain comments. ### Issues/PRs references #19407 added basic GPIO LL support for STM32F1, #19412 added the IRQ support on top of that. Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Contribution description
As the title says
Testing procedure
make BOARD=nucleo-f103rb flash test-with-config -C tests/periph_gpio_ll
Issues/PRs references
Depends on #19407