fix(csr): CSRR instruction read xireg inOrder #10537
emu.yml
on: pull_request
Changes Detection
3s
Generate Verilog
1h 36m
EMU - Basics
2h 26m
EMU - CHI
52m 50s
EMU - Performance
4h 3m
EMU - MC
1h 46m
SIMV - Basics
4h 29m
Upload Artifacts
23m 49s
Check Submodules
23s
Check Format
3m 0s
Annotations
1 warning
Changes Detection
Unexpected input(s) 'predicate-quantifier', valid inputs are ['token', 'working-directory', 'ref', 'base', 'filters', 'list-files', 'initial-fetch-depth']
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Artifacts
Produced during runtime
Name | Size | |
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xs-issue-b-difftest-verilog
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12.8 MB |
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xs-issue-e-b-difftest-verilog
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12.8 MB |
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xsgen
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107 MB |
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