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ArchHelpers/Arm64: Fix loadstore mask #4358

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merged 1 commit into from
Feb 13, 2025

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This would become an issue when multiple threads are contending with the SIGBUS handler on the same code.

We were failing to mask the VR, OPC, Rm, and Option bits, resulting in a comparison below always resulting in a false result if another thread managed to backpatch.

This was just unlikely to be seen on LRCPC2 supporting hardware and since we fixed LDSTUNSCALED_MASK before, this wasn't really getting seen.

This would become an issue when multiple threads are contending with the SIGBUS handler on the same code.

We were failing to mask the VR, OPC, Rm, and Option bits, resulting in a
comparison below always resulting in a false result if another thread
managed to backpatch.

This was just unlikely to be seen on LRCPC2 supporting hardware and
since we fixed `LDSTUNSCALED_MASK` before, this wasn't really getting
seen.
@lioncash lioncash merged commit df718d5 into FEX-Emu:main Feb 13, 2025
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@Sonicadvance1 Sonicadvance1 deleted the arm64_unaligned branch February 13, 2025 10:02
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2 participants