Merge pull request #4358 from Sonicadvance1/arm64_unaligned

ArchHelpers/Arm64: Fix loadstore mask
FEX-Emu · Feb 13, 2025 · df718d5 · df718d5
2 parents 54412f1 + 41e9309
commit df718d5
Showing 1 changed file with 2 additions and 1 deletion.
diff --git a/FEXCore/Source/Utils/ArchHelpers/Arm64.cpp b/FEXCore/Source/Utils/ArchHelpers/Arm64.cpp
@@ -42,7 +42,8 @@ constexpr uint32_t STLR_INST = 0x08'9F'FC'00;
 constexpr uint32_t STLXR_MASK = 0x3F'E0'FC'00;
 constexpr uint32_t STLXR_INST = 0x08'00'FC'00;
 
-constexpr uint32_t LDSTREGISTER_MASK = 0b0011'1011'0010'0000'0000'1100'0000'0000;
+// Load/store register (register offset) (Rm encoded as xzr)
+constexpr uint32_t LDSTREGISTER_MASK = 0b0011'1111'1111'1111'1111'1100'0000'0000;
 constexpr uint32_t LDR_INST = 0b0011'1000'0111'1111'0110'1000'0000'0000;
 constexpr uint32_t STR_INST = 0b0011'1000'0011'1111'0110'1000'0000'0000;