The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy

A 256-RISC-V-core system with low-latency access into shared L1 memory.

SystemVerilog DPI "TCP/IP Shunt" (System Verilog/SystemC/Python TCP/IP socket library)

High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.

RISC-V ISA based 32-bit processor written in HLS

Linux SPI driver for Bitmain ASIC miners.

Core mapping on to NOC

A raw silicon (CMOS) implementation of a SHA256 module

Linux userspace driver for Spondoolies SP2x/SP3x miners.

A color generator with custom CPU (Color-wheel Proessing Unit) submitted for the TT08 tapeout