[setups/osflow] rework: remove board Makefiles; create subdirs 'board…

…s' and 'constraints'

setups/examples/Makefile

@@ -1,6 +1,6 @@
 OSFLOW := ../osflow
-EXAMPLES := ../../examples
-TEMPLATES := ../../../rtl/templates
+EXAMPLES := ../examples
+TEMPLATES := ../../rtl/templates
 MV := mv
 
 TASK := clean $(BITSTREAM)
@@ -13,22 +13,24 @@ endif
 
 run:
 	$(eval TASK ?= clean $(BITSTREAM))
-	$(MAKE) -C $(OSFLOW)/$(BOARD)/ \
+	$(MAKE) -C $(OSFLOW) -f common.mk \
 	  BOARD_SRC=$(EXAMPLES)/neorv32_$(BOARD)_BoardTop_$(DESIGN).vhd \
 	  TOP=neorv32_$(BOARD)_BoardTop_$(DESIGN) \
 	  ID=$(DESIGN) \
-	  $(TASK)
-	$(MV) $(OSFLOW)/$(BOARD)/$(BITSTREAM) ./
+	  $(TASK) \
+	&& $(MV) $(OSFLOW)/$(BITSTREAM) ./
+
+# Boards
 
 Fomu:
 ifeq ($(DESIGN),Minimal)
-	$(eval IMEM_SRC := ../../../rtl/core/neorv32_imem.vhd)
+	$(eval IMEM_SRC := ../../rtl/core/neorv32_imem.vhd)
 else
-	$(eval IMEM_SRC := ../devices/ice40/neorv32_imem.ice40up_spram.vhd)
+	$(eval IMEM_SRC := devices/ice40/neorv32_imem.ice40up_spram.vhd)
 endif
 	$(MAKE) \
 	  BITSTREAM=neorv32_$(BOARD)_$(FOMU_REV)_$(DESIGN).bit \
-	  NEORV32_MEM_SRC="${IMEM_SRC} ../devices/ice40/neorv32_dmem.ice40up_spram.vhd" \
+	  NEORV32_MEM_SRC="${IMEM_SRC} devices/ice40/neorv32_dmem.ice40up_spram.vhd" \
 	  run
 
 iCESugar:
@@ -41,6 +43,8 @@ UPduino_v3:
 	  BITSTREAM=neorv32_$(BOARD)_$(DESIGN).bit \
 	  run
 
+# Designs
+
 Minimal:
 	$(MAKE) \
 	  DESIGN=$@ \
@@ -63,5 +67,5 @@ MixedLanguage:
 	$(MAKE) \
 	  DESIGN=$@ \
 	  DESIGN_SRC=$(TEMPLATES)/processor/neorv32_ProcessorTop_Minimal*.vhd \
-	  NEORV32_VERILOG_SRC='../devices/ice40/sb_ice40_components.v ../../examples/neorv32_Fomu_MixedLanguage_ClkGen.v' \
+	  NEORV32_VERILOG_SRC='devices/ice40/sb_ice40_components.v ../examples/neorv32_Fomu_MixedLanguage_ClkGen.v' \
 	  $(BOARD)

setups/osflow/.gitignore

@@ -0,0 +1,6 @@
+*.asc
+*.bit
+*.dfu
+*.history
+*.json
+*-report.txt

setups/osflow/boards/Fomu.mk

@@ -0,0 +1,16 @@
+.PHONY: all
+
+# Default target: run all required targets to build the DFU image.
+all: $(IMPL).dfu
+	echo "! Built $(IMPL) for $(BOARD) $(FOMU_REV)"
+
+# Use dfu-suffix to generate the DFU image from the FPGA bitstream.
+${IMPL}.dfu: $(IMPL).bit
+	$(COPY) $< $@
+	dfu-suffix -v 1209 -p 70b1 -a $@
+
+# Use df-util to load the DFU image onto the Fomu.
+load: $(IMPL).dfu
+	dfu-util -D $<
+
+.PHONY: load

setups/osflow/boards/UPduino_v3.mk

@@ -0,0 +1,4 @@
+.PHONY: all
+
+all: bit
+	echo "! Built $(IMPL) for $(BOARD)"

setups/osflow/boards/iCESugar.mk

@@ -0,0 +1,4 @@
+.PHONY: all
+
+all: bit
+	echo "! Built $(IMPL) for $(BOARD)"

setups/osflow/Fomu/board.mk → setups/osflow/boards/index.mk

@@ -1,8 +1,14 @@
+PCF_PATH ?= constraints
+
+
+ifeq ($(BOARD),Fomu)
+
+$(info Setting constraints and implementation args for BOARD Fomu)
+
 # Different Fomu hardware revisions are wired differently and thus
 # require different configurations for yosys and nextpnr.
 # Configuration is performed by setting the environment variable FOMU_REV accordingly.
 
-PCF_PATH ?= pcf
 FOMU_REV ?= pvt
 
 ifeq ($(FOMU_REV),evt1)
@@ -28,3 +34,39 @@ CONSTRAINTS ?= $(PCF_PATH)/fomu-pvt.pcf
 else
 $(error Unrecognized FOMU_REV value. must be "evt1", "evt2", "evt3", "pvt", or "hacker")
 endif
+
+IMPL := neorv32_Fomu_$(FOMU_REV)_$(ID)
+
+endif
+
+
+ifeq ($(BOARD),iCESugar)
+$(info Setting constraints and implementation args for BOARD iCESugar)
+
+CONSTRAINTS ?= $(PCF_PATH)/iCESugar.pcf
+PNRFLAGS    ?= --up5k --package sg48 --ignore-loops --timing-allow-fail
+IMPL        ?= neorv32_iCESugar_$(ID)
+
+endif
+
+
+ifeq ($(BOARD),UPduino_v3)
+$(info Setting constraints and implementation args for BOARD UPduino)
+
+CONSTRAINTS ?= $(PCF_PATH)/UPduino_v3.pcf
+PNRFLAGS    ?= --up5k --package sg48 --ignore-loops --timing-allow-fail
+IMPL        ?= neorv32_UPduino_v3_$(ID)
+
+endif
+
+
+ifeq ($(BOARD),OrangeCrab)
+$(info Setting constraints and implementation args for BOARD OrangeCrab)
+
+DEVICE_SERIES = ecp5
+
+CONSTRAINTS ?= $(PCF_PATH)/OrangeCrab.lpf
+PNRFLAGS    ?= --um5g-85k --package CSFBGA285 --ignore-loops --timing-allow-fail
+IMPL        ?= neorv32_OrangeCrab_r02-85F_$(ID)
+
+endif

setups/osflow/common.mk

@@ -0,0 +1,35 @@
+ID ?= impl_1
+
+include boards/index.mk
+
+ifndef TOP
+$(error TOP needs to be specified!)
+endif
+
+include filesets.mk
+
+ifndef DESIGN_SRC
+ifndef BOARD_SRC
+$(error Neither DESIGN_SRC nor BOARD_SRC were set!)
+endif
+endif
+
+include tools.mk
+
+ifdef GHDL_PLUGIN_MODULE
+YOSYSFLAGS += -m $(GHDL_PLUGIN_MODULE)
+endif
+
+include synthesis.mk
+include PnR_Bit.mk
+
+.PHONY: syn impl bit clean
+
+syn: ${IMPL}.json
+impl: ${IMPL}.${PNR2BIT_EXT}
+bit: ${IMPL}.bit
+
+clean:
+	rm -rf *.{${PNR2BIT_EXT},bit,cf,dfu,history,json,o} *-report.txt
+
+include boards/$(BOARD).mk

setups/osflow/filesets.mk

@@ -1,13 +1,13 @@
-RTL_CORE_SRC := ../../../rtl/core
+RTL_CORE_SRC := ../../rtl/core
 
 NEORV32_PKG := $(RTL_CORE_SRC)/neorv32_package.vhd
 
 NEORV32_APP_SRC := \
   $(RTL_CORE_SRC)/neorv32_application_image.vhd \
 
 NEORV32_MEM_SRC := \
-  ../devices/ice40/neorv32_imem.ice40up_spram.vhd \
-  ../devices/ice40/neorv32_dmem.ice40up_spram.vhd
+  devices/ice40/neorv32_imem.ice40up_spram.vhd \
+  devices/ice40/neorv32_dmem.ice40up_spram.vhd
 
 NEORV32_CORE_SRC := \
   $(RTL_CORE_SRC)/neorv32_bootloader_image.vhd \
@@ -46,7 +46,7 @@ NEORV32_CORE_SRC := \
 NEORV32_SRC := ${NEORV32_PKG} ${NEORV32_APP_SRC} ${NEORV32_MEM_SRC} ${NEORV32_CORE_SRC}
 
 ICE40_SRC := \
-  ../devices/ice40/sb_ice40_components.vhd
+  devices/ice40/sb_ice40_components.vhd
 
 DEVICE_SRC := ${ICE40_SRC}
 

setups/osflow/tools.mk

@@ -13,15 +13,14 @@ YOSYSSYNTH    ?= $(DEVICE_SERIES)
 NEXTPNR       ?= nextpnr-$(DEVICE_SERIES)
 
 ifeq ($(DEVICE_SERIES),ice40)
-YOSYSPIPE ?= -dsp
+YOSYSPIPE          ?= -dsp
 CONSTRAINTS_FORMAT ?= pcf
-NEXTPNR_OUT ?= asc
-PNR2BIT_EXT ?= asc
-PACKTOOL ?= $(ICEPACK)
-
+NEXTPNR_OUT        ?= asc
+PNR2BIT_EXT        ?= asc
+PACKTOOL           ?= $(ICEPACK)
 else
 CONSTRAINTS_FORMAT ?= lpf
-NEXTPNR_OUT ?= textcfg
-PNR2BIT_EXT ?= cfg
-PACKTOOL ?= $(ECPPACK)
+NEXTPNR_OUT        ?= textcfg
+PNR2BIT_EXT        ?= cfg
+PACKTOOL           ?= $(ECPPACK)
 endif