You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Copy file name to clipboardexpand all lines: README.md
+3-23
Original file line number
Diff line number
Diff line change
@@ -2,6 +2,8 @@
2
2
3
3
The SoCKit Development Kit presents a robust hardware design platform built around the Altera Cyclone V System-on-Chip (SoC) FPGA, which integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with a 110K Logic Elements FPGA fabric using a high-bandwidth interconnect backbone. The SoCKit development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.
4
4
5
+
**Looking for using SoCkit as a MiSTer compatible board?** Have a look at https://github.com/sockitfpga/MiSTer_SoCkit
6
+
5
7
The folders contain the following information:
6
8
7
9
***Tutorials**: Basic tutorials for learning how to use Quartus (Block diagram editor and Verilog code editor), Platform designer (Qsys), Intel SoC EDS (Embedded Development Suite).
@@ -10,25 +12,12 @@ The folders contain the following information:
10
12
11
13
***Cores**: Some cores I've made/ported
12
14
13
-
***Beta Projects**: Work in progress projects
14
-
15
-
***Templates**: Ready made templates for your projects
16
-
17
-
***Mister**: Info about the Mister port
18
-
19
15
***Documents**: Various useful documentation (schematics, images, ...)
20
16
21
17
***Others**: Some other content
22
18
23
-
24
-
25
-
### **Contributing:**
26
19
27
-
[Contributing](https://github.com/SoCFPGA-learning/General/tree/main/Contributing) is needed to increase the amount of resources and projects available to the community. Any language can be used for documenting the projects.
28
20
29
-
### **Colaboraciones:**
30
-
31
-
Se necesita la [colaboración](https://github.com/SoCFPGA-learning/General/tree/main/Github_ayuda) para poder incrementar los recursos disponibles para la comunidad entorno esta placa de desarrollo. La documentación que acompañe los proyectos puede estar redactada en cualquier idioma.
32
21
33
22
### Other media
34
23
@@ -47,15 +36,6 @@ Se necesita la [colaboración](https://github.com/SoCFPGA-learning/General/tree/
47
36
48
37
*https://community.intel.com/
49
38
50
-
**MiSTer port**:
51
-
52
-
* Main MiSTer port site https://github.com/MiSTer-Arrow-SoCKit/Main_MiSTer/wiki
0 commit comments