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Releases: renesas/rzv-fsp

v3.1.0

11 Mar 05:10
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 3.1.0.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

Arm GNU Toolchain : 13.3.1.arm-13-24

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2025-01

Segger J-Link: 7.96e

Important Notice

  • Please do not update J-Link Firmware beyond version 7.96e, as we have only confirmed RZ/V FSP's correct functionality with v7.96e.

New Features

  • Support for new development kits:
    • RZ/V2N Evaluation Board Kit

Fixes and Improvements

  • CANFD: Fixed an issue that FIFO Depth property is not able to set to 0 stages, even if FIFO is configured to Disabled, and add 0 stages to the list of FIFO Depth properties. Then, depending on the FIFO settings, the data read by calling read function could be an uncertain value because the size of FIFO could become larger than the buffer implemented in CANFD hardware. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33), RZ/V2H(Cortex-R8) and RZ/V2N(Cortex-M33)]
  • I3C_B: Fixed an issue that initial state of the communication I/F pins may become unstable, added an internal reset assert in open process to mask the unstable period of the I/F pins. [Target device: RZ/V2H(Cortex-M33) and RZ/V2N(Cortex-M33)]
  • PinConfigurator: Corrected settings of IO buffer drive strength in accordance with the update of User's Manual. [Target device: RZ/V2H(Cortex-M33), RZ/V2H(Cortex-R8) and RZ/V2N(Cortex-M33)]

Deprecations

  • None

Known Issues

  • CANFD: In IO Registers View of e2 studio, the valid access range of CFDRFDFpn (RX FIFO Access Data Field p Register n) is from CFDRFDFp0_n0 to CFDRFDFp15_n7. Ignore those extra registers that are out of range for CFDRFDFpn (p = 0 to 15, n = 0 to 7).

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.6.1

Arm CMSIS6: v6.1.0

OpenAMP: v2018.10

SEGGER J-Link: 7.96e

Supported Components

The device support for each module is as follows:

Category Components RZ/V2L(Cortex-M33) RZ/V2H(Cortex-M33) RZ/V2H(Cortex-R8) RZ/V2N(Cortex-M33)
OS FreeRTOS
Middleware OpenAMP
Sensor(rm_hs300x, rm_hs400x, rm_comms_i2c, rm_zmod4xxx) NA NA NA
HAL Driver ADC_C(r_adc_c) NA NA NA
ADC_E(r_adc_e) NA
CANFD(r_canfd)
CMTW(r_cmtw) NA
CRC(r_crc) NA
DMAC_B(r_dmac_b)
ELC(r_elc) NA
GPT(r_gpt)
GTM(r_gtm)
I3C_B(r_i3c_b) NA NA
INTC_IRQ(r_intc_irq)
INTC_NMI(r_intc_nmi) NA
INTC_TINT(r_intc_tint) NA
MHU(r_mhu_ns, r_mhu_s, r_mhu_ns_swint_get, r_mhu_ns_swint_set) NA NA NA
MHU_B(r_mhu_b_ns, r_mhu_b_s, r_mhu_b_ns_swint_get, r_mhu_b_ns_swint_set) NA
MTU3(r_mtu3) NA NA NA
PDM(r_pdm) NA NA
POEG(r_poeg)
I2C Master(r_riic_master)
I2C Slave(r_riic_slave) NA
RSPI(r_rspi) NA NA NA
RTC(r_rtc) NA
SCIF(r_scif_uart)
SCI_B(r_sci_b_i2c, r_sci_b_spi, r_sci_b_uart) NA
SPI_B(r_spi_b) NA
TSU_B(r_tsu_b) NA NA
WDT(r_wdt) NA
xSPI_qspi(r_xspi_qspi) NA NA

Knowledge Base

Visit our knowledge base for other technical updates.

MD5 Checksums

  • RZV_FSP_Packs_v3.1.0.zip 14b476924ad52f571cbff3f69c3ac445
  • RZV_FSP_Packs_v3.1.0.exe de48fb276c432c47b9b83f9fbb1ea1df
  • fsp_documentation_v3.1.0.zip 87702286227e6ea99380cf87d011115c
  • setup_rzvfsp_v3_1_0_e2s_v2025-01.exe c6f437cbaab42c98b890a84e48115125
  • setup_rzvfsp_v3_1_0_e2s_v2025-01.xz.run dd211b24a38549c2db8b07af214e5556

v3.0.0

28 Nov 14:06
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 3.0.0.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

Arm GNU Toolchain : 13.3.1.arm-13-24

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2024-10

Segger J-Link: 7.96e

Important Notice

  • Please do not update J-Link Firmware beyond version 7.96e, as we have only confirmed RZ/V FSP's correct functionality with v7.96e.

New Features

  • New support for the following drivers:
    • r_sci_b_spi

Fixes and Improvements

  • FSP: Updated the entire RZ/V FSP to match RA FSP v5.5.0. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • FSP: Updated custom board template. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • CMSIS: Updated CMSIS to V6.1.0. [Target device: RZ/V2L(Cortex-M33) and RZ/V2H(Cortex-M33)]
  • FreeRTOS: Updated FreeRTOS to V10.6.1. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • GPT, POEG: Updated allow to link GPT and POEG drivers using their stacks on SmartConfigurator. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • GPT: Added properties to use Compare Match features on SmartConfigurator. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • RIIC_Master, SCI_B_I2C: Newly supports custom baudrate, in addition to the existing standard mode, first mode, and first mode plus. [Target device: RZ/V2L(Cortex-M33), RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • RIIC_Slave: Newly supports DMA transfer. [Target device: RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]
  • SPI_B: Updated SmartConfigurator properties to allow FIFO settings. [Target device: RZ/V2H(Cortex-M33) and RZ/V2H(Cortex-R8)]

Deprecations

  • None

Known Issues

  • None

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.6.1

Arm CMSIS6: v6.1.0

OpenAMP: v2018.10

SEGGER J-Link: 7.96e

Supported Components

The device support for each module is as follows:

Category Components RZ/V2L
(Cortex-M33)
RZ/V2H
(Cortex-M33)
RZ/V2H
(Cortex-R8)
OS FreeRTOS
Middleware OpenAMP
Sensor(rm_hs300x, rm_hs400x, rm_comms_i2c, rm_zmod4xxx) NA NA
HAL Driver ADC_C(r_adc_c) NA NA
ADC_E(r_adc_e) NA
CANFD(r_canfd)
CMTW(r_cmtw) NA
CRC(r_crc) NA
DMAC_B(r_dmac_b)
ELC(r_elc) NA
GPT(r_gpt)
GTM(r_gtm)
I3C_B(r_i3c_b) NA NA
INTC_IRQ(r_intc_irq)
INTC_NMI(r_intc_nmi) NA
INTC_TINT(r_intc_tint) NA
MHU(r_mhu_ns, r_mhu_s, r_mhu_ns_swint_get, r_mhu_ns_swint_set) NA NA
MHU_B(r_mhu_b_ns, r_mhu_b_s, r_mhu_b_ns_swint_get, r_mhu_b_ns_swint_set) NA
MTU3(r_mtu3) NA NA
PDM(r_pdm) NA NA
POEG(r_poeg)
I2C Master(r_riic_master)
I2C Slave(r_riic_slave) NA
RSPI(r_rspi) NA NA
RTC(r_rtc) NA
SCIF(r_scif_uart)
SCI_B(r_sci_b_i2c, r_sci_b_spi, r_sci_b_uart) NA
SPI_B(r_spi_b) NA
TSU_B(r_tsu_b) NA NA
WDT(r_wdt) NA
xSPI_qspi(r_xspi_qspi) NA NA

Knowledge Base

Visit our knowledge base for other technical updates.

MD5 Checksums

  • RZV_FSP_Packs_v3.0.0.zip cfbec08c874f22f2a111cee548f5d4b9
  • RZV_FSP_Packs_v3.0.0.exe 1dd394854752f1bd1e97449e10e3d14f
  • fsp_documentation_v3.0.0.zip 420eb5947f067bdc80a2194466a698be
  • ** setup_rzvfsp_v3_0_0_e2s_v2024-10.exe** 00ad506d16d3a000781aefa564a7c759

v2.0.2

15 Oct 02:49
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 2.0.2.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

Arm GNU Toolchain : 12.2.1.arm-12-24

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2024-07

Segger J-Link: 7.96e

New Features

  • None

Fixes and Improvements

  • BSP: Fixed an issue that the pending interrupt might not be executed when executing R_BSP_IrqClearPending while an interrupt was pending state in a project generated by selecting "CR8_0" or "CR8_1" for "Core" in "Device Selection". This issue was caused by executing R_BSP_IrqClearPending, which would incorrectly not only be cleared the pending state of the interrupt source specified by the argument but also the pending state of other interrupt sources. In FSP, this function is called by the initialization process of each driver and the interrupt handler of some driver. [Target device: RZ/V2H]
  • ProjectGenerator: Changed a GTM channel that registered in a project created by selecting "CR8_0" or "CR8_1" for "Core" in "Device selection" when generating the project. [Target device: RZ/V2H]
    • CR8_0 project registers GTM ch4.
    • CR8_1 project registers GTM ch5.
  • FreeRTOS: Fixed an issue where the CPU could only wake up from sleep mode via the tick timer interrupt, and fixing the performance issue by reducing wake-up latency through allowing wake-up from any enabled interrupt. [Target device: RZ/V2L, RZ/V2H]
  • FreeRTOS: Fixed an issue where one of the CR8 cores could not wake up due to incorrect interrupt settings when running FreeRTOS simultaneously on both CR8 cores. [Target device: RZ/V2H]

Deprecations

  • None

Known Issues

  • None

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.4.6

Arm CMSIS5: 5.8.0

OpenAMP: v2018.10

SEGGER J-Link: 7.96e

Supported Components

Category Components RZ/V2L(Cortex-M33) RZ/V2H(Cortex-M33) RZ/V2H(Cortex-R8)
OS FreeRTOS
Middleware OpenAMP
Sensor(rm_hs300x, rm_hs400x, rm_comms_i2c, rm_zmod4xxx) NA NA
HAL Driver ADC_C(r_adc_c) NA NA
ADC_E(r_adc_e) NA
CANFD(r_canfd)
CMTW(r_cmtw) NA
CRC(r_crc) NA
DMAC_B(r_dmac_b)
ELC(r_elc) NA
GPT(r_gpt)
GTM(r_gtm)
I3C_B(r_i3c_b) NA NA
INTC_IRQ(r_intc_irq)
INTC_NMI(r_intc_nmi) NA
INTC_TINT(r_intc_tint) NA
MHU(r_mhu_ns, r_mhu_s, r_mhu_ns_swint_get, r_mhu_ns_swint_set) NA NA
MHU_B(r_mhu_b_ns, r_mhu_b_s, r_mhu_b_ns_swint_get, r_mhu_b_ns_swint_set) NA
MTU3(r_mtu3) NA NA
PDM(r_pdm) NA NA
POEG(r_poeg)
I2C Master(r_riic_master)
I2C Slave(r_riic_slave) NA
RSPI(r_rspi) NA NA
RTC(r_rtc) NA
SCIF(r_scif_uart)
SCI_B(r_sci_b_i2c, r_sci_b_uart) NA
SPI_B(r_spi_b) NA
TSU_B(r_tsu_b) NA NA
WDT(r_wdt) NA
xSPI_qspi(r_xspi_qspi) NA NA

Knowledge Base

Visit our knowledge base for other technical updates.

MD5 Checksums

  • RZV_FSP_Packs_v2.0.2.zip 70aa8c750b9349a30c408ad3e030ef6e
  • RZV_FSP_Packs_v2.0.2.exe 1fa9b74234ff0cd69ca81a2893485018
  • fsp_documentation_v2.0.2.zip 7c27134784a885488a8b4dae6a3c481c

v2.0.1

07 Aug 11:45
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 2.0.1.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

Arm GNU Toolchain : 12.2.1.arm-12-24

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2024-07

Segger J-Link: 7.96e

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.4.6

Arm CMSIS5: 5.7.0

OpenAMP: v2018.10

SEGGER J-Link: 7.96e

Features Added

  • None

Feature Modified

Components Modified Feature RZ/V2L RZ/V2H
bsp Project templates that are not relevant to the CPU cores specified during project creation will no longer be displayed. N/A x
r_intc_irq, r_intc_tint The Interrupt detection type property has been integrated into the Trigger property. Therefore, the Interrupt detection type property in the FSP Configurator has been deleted. x x
r_dmac_b Added "External DREQ Input Pin Select" menu to properties to support DREQ pin selection. N/A x
r_dmac_b In a multi-core environment, the warning message indicating the conflict is displayed when both the same unit and the same channel is specified in the FSP Configuration for DMAC of the project generated by each core. N/A x

Feature Removed

  • None

Bug Fixes

Components Modified Feature RZ/V2L RZ/V2H
r_i3c, r_pdm Fixed an issue that the PDM and I3C which are dedicated component to Cortex-M33 core can be added in Cortex-R8 core project. N/A x
r_adc_e, r_gpt, r_mhu_b_ns, r_mhu_b_s, r_mhu_b_ns_swint_get Fixed an issue where the FSP Smart Configurator interrupt priority property could be set to greater than 16 on Cortex-R8 core project. N/A x
r_intc_irq, r_intc_tint Fixed an issue that the level was set regardless of the interrupt detection type (level/edge) specified in the SmartConfigurator on Cortex-R8 core project. N/A x
r_dmac_b Fixed an issue that recovery after a transfer error could cause a transfer on a different channel to be aborted and cleared instead of on the channel where the error occurred. x x
r_poeg Fixed an issue where an error would occur when "parameter check is enabled" and "opening valid channels 4 to 7". N/A x
r_mhu_b_s Fixed an issue where the send/receive buffer area overlapped with r_mhu_b_ns, causing memory corruption. N/A x
r_canfd Fixed an issue where ECC error on channels 2 to 5 was not notified. N/A x
r_canfd Fixed an issue where an error (FSP_ERR_BUFFER_EMPTY) would occur regardless of the state of the target buffer when RXMBx (x = 32 to 95) was specified in the R_CANFD_Read function. N/A x
r_canfd Fixed an issue where RXMBx (x = 32 to 95) information could not be obtained using the R_CANFD_InfoGet function. N/A x

Limitations

  • None

Known Issues

  • None

MD5 Checksums

  • RZV_FSP_Packs_v2.0.1.zip 3f95ca3fd631b0dc097bc52115de80d4
  • RZV_FSP_Packs_v2.0.1.exe f4add8cbcc6016980edb25e9c1ffb2db
  • fsp_documentation_v2.0.1.zip f9ae111b665d8e4874b7a4d0b75cf0ea
  • setup_rzvfsp_v2_0_1_e2s_v2024-07.exe 91025e56d93286de39c3bb235af19def

v2.0.0

07 Jun 12:30
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 2.0.0.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

Arm GNU Toolchain : 12.2.1.arm-12-24

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2024-04

Segger J-Link: 7.96e

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.4.6

Arm CMSIS5: 5.7.0

OpenAMP: v2018.10

SEGGER J-Link: 7.96e

Change to FSP License

The FSP license has been changed to BSD-3-Clause, allowing for more flexible use in open-source projects.
License terms (including exceptions) are available in the LICENSE file.

Features Added

  • Support for new devices:
    • RZ/V2H MPU
  • Support for new development kits:
    • RZ/V2H Quad-core Vision AI MPU Evaluation Kit

The newly added modules are as follows.

Modules RZ/V2L RZ/V2H(Cortex®-M33) RZ/V2H(Cortex-R8)
r_adc_c x N/A N/A
r_adc_e N/A x x
r_cmtw N/A x x
r_crc N/A x x
r_dmac_b x x x
r_elc N/A x x
r_mhu_b N/A x x
r_mtu3 x N/A N/A
r_i3c_b N/A x N/A
r_intc_nmi N/A x x
r_intc_tint N/A x x
r_pdm N/A x N/A
r_riic_slave N/A x x
r_rtc N/A x x
r_sci_b_i2c N/A x x
r_sci_b_uart N/A x x
r_spi_b N/A x x
r_tsu_b N/A x N/A
r_wdt N/A x x
r_xspi_qspi N/A x N/A

The following modules newly support DMA transfer.

  • RZ/V2L:
    • r_riic_master
    • r_rspi
    • r_scif_uart
  • RZ/V2H:
    • r_riic_master
    • r_sci_b_i2c
    • r_sci_b_uart
    • r_spi_b

Feature Modified

Components Modified Feature RZ/V2L RZ/V2H
r_gpt Supported to display an error on FSP Configurator when configuring Capture A/B Source Setting even though Capture A/B Interrupt Enable is configured is Disable. x x
r_gpt Supported the enablement and disablement of GPT related interrupts on FSP Smart Configurator. x x
r_gtm In RZ/V2L, GTM channel 0 is used by the main core (Cortex-A55). Therefore, FSP Configurator has been changed so that the channel cannot be selected in RZ/V2L. x N/A
r_mhu The storage format of communication data of the MHU driver has been changed to the following.
From: CH0 Linux, CH0 FreeRTOS, CH1 Linux, CH1 FreeRTOS,....
To: CH0 RSP, CH0 MSG, CH1 RSP, CH1 MSG,....
The Linux side application of Multi-OS package has also been updated accordingly, so please use it in combination with Multi-OS package V2.0.0.
x N/A
r_poeg Supported the enablement and disablement of POEG related interrupts on FSP Configurator. x x
r_rspi Supported the enablement and disablement of the function to keep SSL level on FSP Configurator. x N/A

Feature Removed

  • None

Bug Fixes

Components Modified Feature RZ/V2L RZ/V2H
r_gpt Fixed the issue that GPT counter period was NOT configured as expected when calling R_GPT_DutyCycleSet function to configure arbitrary duty ratio. x x
r_gpt, r_mhu_ns, r_mhu_s, r_mhu_ns_swint_get, r_mhu_ns_swint_set Fixed the issue that parameter checking won't work even if it's enabled in BSP. x x
r_gtm Changed to display an error if the wait time entered from the FSP Configurator property exceeds the upper limit of a 32-bit integer after being converted to the GTM counter register value. x x
r_rspi Fixed the issue that the function to keep SSL level was unexpectedly enabled under slave mode. x N/A
r_rspi Changed the maximum supported bitrate to 25Mbps in accordance with the specification change of UM Rev.1.30. x N/A
r_riic_master Fixed the following issues caused by the wrong setting of WAIT bit.
- When receiving by specifying 1 byte as the argument of R_RIIC_MASTER_Read function, the operation for SCL signal holding to low level could not be enabled when NACK output.
- When receiving by specifying 3 or more bytes as the argument of R_RIIC_MASTER_Read function, the operation for SCL signal holding to low level was unexpectedly enabled between each reception and the next reception.
x x

Limitations

  • None

Known Issues

  • The PDM and I3C which are dedicated component to Cortex-M33 core can be added in Cortex-R8 core project.
    Please do not use these components on Cortex-R8 core project.
  • When creating RZ/V FSP project with selecting "RZ/V2H Evaluation Board Kit" at Board:, all the project templates can be selected at Project Template Selection regardless of the CPU core selected at Core:. For example, "Bare Metal (CR8 core 0) - Blinky", "Bare Metal (CR8 core 0) - Minimal", "Bare Metal (CR8 core 1) - Blinky" and "Bare Metal (CR8 core 1) - Minimal" are selectable even if "Core6(CM33_0)" is selected at Core: in Device Selection. Please don't select the Project Template which is NOT corresponding to the CPU core to be selected.
  • On Cortex-R8 project, 16 or more can be specified for Interrupt Priority Property on FSP Smart Configurator even though the allowable value must be from 0 to 15. Thus, please don't specify 16 or more as Interrupt Priority on Cortex-R8 project.

MD5 Checksums

  • RZV_FSP_Packs_v2.0.0.zip 883dd65a9a0b130906045c9794a4110a
  • RZV_FSP_Packs_v2.0.0.exe 1213d57f16c3746a9fc343295977a2d8
  • fsp_documentation_v2.0.0.zip b2e265388930f06a7382ed000de1c46f
  • setup_rzvfsp_v2_0_0_e2s_v2024-04.exe 250e038121038854469218034605203f

v1.1.0

31 Jan 07:28
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Release Notes

Flexible Software Package (FSP) for Renesas RZ/V MPU Series, version 1.1.0.

All installers are available in the Assets section of this release.

Refer to the README.md in the FSP root folder for setup instructions, hardware details, and related links.

Tools

GCC Compiler : 9-2019-q4-major

Libgen Update for GNU ARM Embeeded Toolchains

e2 studio: 2023-01

Segger J-Link: 7.84

Features Added

  • Added Controller Area Network - Flexible Data (r_canfd) support.
  • Added Interrupt Controller (r_intc_irq) support.
  • Added API function (R_RIIC_MASTER_StatusGet) for r_riic_master
  • Added I2C Communication Device (rm_comms_i2c) support.
  • Added Temperature/Humidity Sensor HS300X (rm_hs300x, rm_hs400x) support.
  • Added Gas Sensor ZMOD4410,ZMOD4510 (rm_zmod4xxx) support.
  • Added Heart Rate, Blood Oxygen Concentration, Pulse Oximetry, Proximity, Light and Color Sensor OB1203 (rm_ob1203) support.

Third Party Software

These third party software solutions are included alongside FSP.

Amazon FreeRTOS Kernel: 10.4.3-LTS-Patch-2

Arm CMSIS5: 5.7.0

OpenAMP: v2018.10

SEGGER J-Link: 7.84a

Bug Fixes

  • r_rspi

    • Fixed the issue that transfer cannot be performed if receiving or transmitting processing is performed continuously after executing 1-byte transmission processing.
    • Fixed the issue that SSL signal level keep function is enabled when slave mode is selected. This is the feature which is not available in slave mode.
  • r_riic_master

    • Fixed the issue that communication with 10-bit address devices was failed.
    • Fixed the issue that parameter check was not performed even if parameter check setting is enabled in Smart Configurator.
  • r_gtm

    • Fixed the issue that the period calculation in interval timer mode was wrong and so, it did not work with the correct period.
    • Fixed the issue that the first interrupt wasn't fired at the specified period because the counter is not initialized when the driver is reopened.
  • r_scif_uart

    • Fixed the issue that data lack in the case of low baudrate.
  • r_gpt

    • Fixed the issue that the GPT counter period was not set correctly.
    • Fixed the issue that all channels of GPT stopped when one channel was closed while multiple channels of GPT were running.

Known Issues

  • None

MD5 Checksums

  • RZV_FSP_Packs_v1.1.0.zip 72517c1d9d75d9f71fc39ccd92a5c5e1
  • RZV_FSP_Packs_v1.1.0.exe 302a4445bec485fa474b0518d22608c7
  • fsp_documentation_v1.1.0.zip ea1aa725145ea39f3bea7d76a5e7e694