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Create linear half comparison bloqs #1408

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Oct 18, 2024
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4 changes: 4 additions & 0 deletions dev_tools/qualtran_dev_tools/notebook_specs.py
Original file line number Diff line number Diff line change
Expand Up @@ -435,6 +435,10 @@
qualtran.bloqs.arithmetic.comparison._SQ_CMP_DOC,
qualtran.bloqs.arithmetic.comparison._LEQ_DOC,
qualtran.bloqs.arithmetic.comparison._CLinearDepthGreaterThan_DOC,
qualtran.bloqs.arithmetic.comparison._LINEAR_DEPTH_HALF_GREATERTHAN_DOC,
qualtran.bloqs.arithmetic.comparison._LINEAR_DEPTH_HALF_GREATERTHANEQUAL_DOC,
qualtran.bloqs.arithmetic.comparison._LINEAR_DEPTH_HALF_LESSTHAN_DOC,
qualtran.bloqs.arithmetic.comparison._LINEAR_DEPTH_HALF_LESSTHANEQUAL_DOC,
],
),
NotebookSpecV2(
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4 changes: 4 additions & 0 deletions qualtran/bloqs/arithmetic/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,10 @@
GreaterThanConstant,
LessThanConstant,
LessThanEqual,
LinearDepthHalfGreaterThan,
LinearDepthHalfGreaterThanEqual,
LinearDepthHalfLessThan,
LinearDepthHalfLessThanEqual,
SingleQubitCompare,
)
from qualtran.bloqs.arithmetic.controlled_addition import CAdd
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6 changes: 4 additions & 2 deletions qualtran/bloqs/arithmetic/addition.ipynb
Original file line number Diff line number Diff line change
Expand Up @@ -186,12 +186,14 @@
"using $4n - 4 T$ gates. Uncomputation requires 0 T-gates.\n",
"\n",
"#### Parameters\n",
" - `bitsize`: Number of bits used to represent each input integer. The allocated output register is of size `bitsize+1` so it has enough space to hold the sum of `a+b`. \n",
" - `bitsize`: Number of bits used to represent each input integer. The allocated output register is of size `bitsize+1` so it has enough space to hold the sum of `a+b`.\n",
" - `is_adjoint`: Whether this is compute or uncompute version.\n",
" - `include_most_significant_bit`: Whether to add an extra most significant (i.e. carry) bit. \n",
"\n",
"#### Registers\n",
" - `a`: A bitsize-sized input register (register a above).\n",
" - `b`: A bitsize-sized input register (register b above).\n",
" - `c`: A bitize+1-sized LEFT/RIGHT register depending on whether the gate adjoint or not. \n",
" - `c`: The LEFT/RIGHT register depending on whether the gate adjoint or not. This register size is either bitsize or bitsize+1 depending on the value of `include_most_significant_bit`. \n",
"\n",
"#### References\n",
" - [Halving the cost of quantum addition](https://arxiv.org/abs/1709.06648). \n"
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28 changes: 22 additions & 6 deletions qualtran/bloqs/arithmetic/addition.py
Original file line number Diff line number Diff line change
Expand Up @@ -260,18 +260,27 @@ class OutOfPlaceAdder(GateWithRegisters, cirq.ArithmeticGate): # type: ignore[m
Args:
bitsize: Number of bits used to represent each input integer. The allocated output register
is of size `bitsize+1` so it has enough space to hold the sum of `a+b`.
is_adjoint: Whether this is compute or uncompute version.
include_most_significant_bit: Whether to add an extra most significant (i.e. carry) bit.

Registers:
a: A bitsize-sized input register (register a above).
b: A bitsize-sized input register (register b above).
c: A bitize+1-sized LEFT/RIGHT register depending on whether the gate adjoint or not.
c: The LEFT/RIGHT register depending on whether the gate adjoint or not.
This register size is either bitsize or bitsize+1 depending on
the value of `include_most_significant_bit`.

References:
[Halving the cost of quantum addition](https://arxiv.org/abs/1709.06648)
"""

bitsize: 'SymbolicInt'
is_adjoint: bool = False
include_most_significant_bit: bool = True

@property
def out_bitsize(self):
return self.bitsize + (1 if self.include_most_significant_bit else 0)

@property
def signature(self):
Expand All @@ -280,14 +289,14 @@ def signature(self):
[
Register('a', QUInt(self.bitsize)),
Register('b', QUInt(self.bitsize)),
Register('c', QUInt(self.bitsize + 1), side=side),
Register('c', QUInt(self.out_bitsize), side=side),
]
)

def registers(self) -> Sequence[Union[int, Sequence[int]]]:
if not isinstance(self.bitsize, int):
raise ValueError(f'Symbolic bitsize {self.bitsize} not supported')
return [2] * self.bitsize, [2] * self.bitsize, [2] * (self.bitsize + 1)
return [2] * self.bitsize, [2] * self.bitsize, [2] * self.out_bitsize

def apply(self, a: int, b: int, c: int) -> Tuple[int, int, int]:
return a, b, c + a + b
Expand All @@ -307,7 +316,7 @@ def on_classical_vals(
return {
'a': a,
'b': b,
'c': add_ints(int(a), int(b), num_bits=self.bitsize + 1, is_signed=False),
'c': add_ints(int(a), int(b), num_bits=self.out_bitsize, is_signed=False),
}

def with_registers(self, *new_registers: Union[int, Sequence[int]]):
Expand All @@ -328,12 +337,19 @@ def decompose_from_registers(
cirq.CX(a[i], c[i + 1]),
cirq.CX(b[i], c[i]),
]
for i in range(self.bitsize)
for i in range(self.out_bitsize - 1)
]
if not self.include_most_significant_bit:
# Update c[-1] as c[-1] ^= a[-1]^b[-1]
i = self.bitsize - 1
optree.append([cirq.CX(a[i], c[i]), cirq.CX(b[i], c[i])])
return cirq.inverse(optree) if self.is_adjoint else optree

def build_call_graph(self, ssa: 'SympySymbolAllocator') -> 'BloqCountDictT':
return {And(uncompute=self.is_adjoint): self.bitsize, CNOT(): 5 * self.bitsize}
return {
And(uncompute=self.is_adjoint): self.out_bitsize - 1,
CNOT(): 5 * (self.bitsize - 1) + 2 + (3 if self.include_most_significant_bit else 0),
}

def __pow__(self, power: int):
if power == 1:
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