Do not allow creating registers with bitsize 0 #6298
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Codecov ReportPatch coverage:
Additional details and impacted files@@ Coverage Diff @@
## master #6298 +/- ##
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Coverage 97.88% 97.88%
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Files 1104 1104
Lines 95863 95869 +6
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+ Hits 93840 93846 +6
Misses 2023 2023
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mpharrigan
reviewed
Sep 25, 2023
| @@ -77,7 +77,7 @@ def selection_registers(self) -> Tuple[infra.SelectionRegister, ...]: | |||
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| @cached_property | |||
| def target_registers(self) -> Tuple[infra.Register, ...]: | |||
| total_iteration_size = np.product( | |||
| total_iteration_size = np.prod( | |||
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for my edification: why this change?
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It fails mypy checks because np.product has been deprecated.
mpharrigan
approved these changes
Sep 25, 2023
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Registers with bitsize 0 are ambiguous since they you are not really passing any qubits to instantiate those registers. They also complicate the interop with Qualtran. This PR removes this workflow by adding an explicit validation that
bitsizeshould always be a positive integer.cc @mpharrigan