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During regression i found that dec bin never got hit. because missing bit width definition.
covergroup aes_ctrl_cg with function sample(
bit aes_op, //here is the error
bit [aes_pkg::AES_MODE_WIDTH-1:0] aes_mode,
bit [aes_pkg::AES_KEYLEN_WIDTH-1:0] aes_keylen,
bit aes_man_op,
bit aes_sideload,
bit [aes_pkg::AES_PRNGRESEEDRATE_WIDTH-1:0] aes_prng_reseed_rate
);
option.per_instance = 1;
option.name = "aes_ctrl_cg";
Solution :
covergroup aes_ctrl_cg with function sample(
bit [aes_pkg::AES_OP_WIDTH-1:0] aes_op, //Modification
bit [aes_pkg::AES_MODE_WIDTH-1:0] aes_mode,
bit [aes_pkg::AES_KEYLEN_WIDTH-1:0] aes_keylen,
bit aes_man_op,
bit aes_sideload,
bit [aes_pkg::AES_PRNGRESEEDRATE_WIDTH-1:0] aes_prng_reseed_rate
);
Thanks a lot to all contributor !
Edit by @vogelpi :
the file to change is: https://github.com/lowRISC/opentitan/blob/master/hw/ip/aes/dv/cov/aes_cov_if.sv
The text was updated successfully, but these errors were encountered:
vogelpi
changed the title
Error and solution in "https://github.com/lowRISC/opentitan/blob/master/hw/ip/aes/dv/cov/aes_cov_if.sv"coverage definition of AES
[aes,dv] Fix coverage definition of AES operation (enc/dec)
Jan 23, 2024
vogelpi
added a commit
to vogelpi/opentitan
that referenced
this issue
Jan 23, 2024
Thanks for reporting this issue @Alfaisal57 . I've now filed a PR to fix the sample function declaration.
This bug masked a little coverage hole that we should fix at some point. I am not worried about this as the logic is very similar to other register fields but we should do it. I've opened #20941 to track this.
During regression i found that dec bin never got hit. because missing bit width definition.
covergroup aes_ctrl_cg with function sample(
bit aes_op, //here is the error
bit [aes_pkg::AES_MODE_WIDTH-1:0] aes_mode,
bit [aes_pkg::AES_KEYLEN_WIDTH-1:0] aes_keylen,
bit aes_man_op,
bit aes_sideload,
bit [aes_pkg::AES_PRNGRESEEDRATE_WIDTH-1:0] aes_prng_reseed_rate
);
option.per_instance = 1;
option.name = "aes_ctrl_cg";
Solution :
covergroup aes_ctrl_cg with function sample(
bit [aes_pkg::AES_OP_WIDTH-1:0] aes_op, //Modification
bit [aes_pkg::AES_MODE_WIDTH-1:0] aes_mode,
bit [aes_pkg::AES_KEYLEN_WIDTH-1:0] aes_keylen,
bit aes_man_op,
bit aes_sideload,
bit [aes_pkg::AES_PRNGRESEEDRATE_WIDTH-1:0] aes_prng_reseed_rate
);
Thanks a lot to all contributor !
Edit by @vogelpi :
the file to change is:
https://github.com/lowRISC/opentitan/blob/master/hw/ip/aes/dv/cov/aes_cov_if.sv
The text was updated successfully, but these errors were encountered: