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[X86] fix combineSubSetcc to handle a large constant #66941

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Sep 20, 2023
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2 changes: 1 addition & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -54221,7 +54221,7 @@ static SDValue combineSubSetcc(SDNode *N, SelectionDAG &DAG) {
SDValue SetCC = Op1.getOperand(0);
X86::CondCode CC = (X86::CondCode)SetCC.getConstantOperandVal(0);
X86::CondCode NewCC = X86::GetOppositeBranchCondition(CC);
uint64_t NewImm = Op0C->getZExtValue() - 1;
APInt NewImm = Op0C->getAPIntValue() - 1;
SDLoc DL(Op1);
SDValue NewSetCC = getSETCC(NewCC, SetCC.getOperand(1), DL, DAG);
NewSetCC = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, NewSetCC);
Expand Down
21 changes: 21 additions & 0 deletions llvm/test/CodeGen/X86/select_const_i128.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,21 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s

define i128 @select_eq_i128(ptr %a) {
; CHECK-LABEL: select_eq_i128:
; CHECK: # %bb.0:
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: ptest %xmm0, %xmm0
; CHECK-NEXT: setne %al
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: addq $-1, %rax
; CHECK-NEXT: movabsq $9223372036854775807, %rdx # imm = 0x7FFFFFFFFFFFFFFF
; CHECK-NEXT: adcq %rcx, %rdx
; CHECK-NEXT: retq
%1 = load i128, ptr %a, align 16
%cmp = icmp eq i128 %1, 1
%cond = select i1 %cmp, i128 170141183460469231731687303715884105727, i128 -170141183460469231731687303715884105728
ret i128 %cond
}