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Starlight DTS cleanups and LED support #1

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merged 6 commits into from
May 7, 2021
Merged

Starlight DTS cleanups and LED support #1

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6417818
riscv: dts: starfive: jh7100: Remove superfluous clock-output-names
geertu May 5, 2021
5e71888
riscv: dts: starfive: jh7100: Remove unit-address from qspi-clk node
geertu May 5, 2021
1f6fca7
riscv: dts: starfive: jh7100: Add missing GPIO node properties
geertu May 7, 2021
b0bcf8c
riscv: dts: starfive: jh7100: Group tuples in reg properties
geertu May 7, 2021
d175ad9
riscv: dts: starfive: jh7100: Use generic node names
geertu May 7, 2021
0494f98
riscv: dts: starfive: jh7100-starlight: Add ack LED
geertu May 7, 2021
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13 changes: 13 additions & 0 deletions arch/riscv/boot/dts/starfive/jh7100-starlight.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
#include "jh7100.dtsi"
#include <dt-bindings/starfive_fb.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>

/ {
#address-cells = <2>;
Expand All @@ -21,6 +22,18 @@
cpus {
timebase-frequency = <6250000>;
};

leds {
compatible = "gpio-leds";

led-ack {
gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_HEARTBEAT;
linux,default-trigger = "heartbeat";
label = "ack";
};
};
};

&uart0 {
Expand Down
39 changes: 19 additions & 20 deletions arch/riscv/boot/dts/starfive/jh7100.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -79,35 +79,30 @@
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "hfclk";
};

rtcclk: rtcclk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <6250000>;
clock-output-names = "rtcclk";
};

i2c0clk: i2c0clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <49500000>;
clock-output-names = "i2c0clk";
};

i2c2clk: i2c2clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
clock-output-names = "i2c2clk";
};

axiclk: axiclk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
clock-output-names = "axiclk";
};

ahb0clk: ahb0clk {
Expand Down Expand Up @@ -152,7 +147,7 @@
clock-frequency = <25000000>;
};

qspi_clk: qspi-clk@0 {
qspi_clk: qspi-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
Expand Down Expand Up @@ -258,7 +253,8 @@
interrupt-parent = <&plic>;
interrupts = <128 131 129 130>;
/*next-level-cache = <&L40 &L36>;*/
reg = <0x0 0x2010000 0x0 0x1000 0x0 0x8000000 0x0 0x2000000>;
reg = <0x0 0x2010000 0x0 0x1000>,
<0x0 0x8000000 0x0 0x2000000>;
reg-names = "control", "sideband";
};

Expand Down Expand Up @@ -288,7 +284,7 @@
reg-names = "control";
};

plic: plic@c000000 {
plic: interrupt-controller@c000000 {
#interrupt-cells = <1>;
compatible = "riscv,plic0";
interrupt-controller;
Expand All @@ -299,7 +295,7 @@
riscv,ndev = <127>;
};

uart0: hs_serial@11870000 {
uart0: serial@11870000 {
compatible = "snps,dw-apb-uart";
interrupt-parent = <&plic>;
interrupts = <92>;
Expand All @@ -313,7 +309,7 @@
status = "disabled";
};

uart1: hs_serial@11880000 {
uart1: serial@11880000 {
compatible = "snps,dw-apb-uart";
interrupt-parent = <&plic>;
interrupts = <93>;
Expand Down Expand Up @@ -355,7 +351,7 @@
status = "disabled";
};

dma2p: sgdma2p@100b0000 {
dma2p: dma-controller@100b0000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x0 0x100b0000 0x0 0x10000>;
clocks = <&axiclk>, <&ahb0clk>;
Expand All @@ -371,7 +367,7 @@
status = "okay";
};

dma1p: sgdma1p@10500000 {
dma1p: dma-controller@10500000 {
compatible = "snps,axi-dma-1.01a";
reg = <0x0 0x10500000 0x0 0x10000>;
clocks = <&axiclk>, <&ahb0clk>;
Expand Down Expand Up @@ -410,6 +406,8 @@
reg = <0x0 0x11910000 0x0 0x10000>;
reg-names = "control";
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
};

Expand Down Expand Up @@ -489,7 +487,7 @@
snps,blen = <256 128 64 32 0 0 0>;
};

gmac: gmac@10020000 {
gmac: ethernet@10020000 {
compatible = "snps,dwmac";
reg = <0x0 0x10020000 0x0 0x10000>;
interrupt-parent = <&plic>;
Expand Down Expand Up @@ -567,7 +565,8 @@
compatible = "cadence,qspi", "cdns,qspi-nor";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x11860000 0x0 0x10000 0x0 0x20000000 0x0 0x20000000>;
reg = <0x0 0x11860000 0x0 0x10000>,
<0x0 0x20000000 0x0 0x20000000>;
interrupts = <3>;
interrupt-parent = <&plic>;
clocks = <&qspi_clk>;
Expand Down Expand Up @@ -615,10 +614,10 @@

xrp@f0000000 {
compatible = "cdns,xrp";
reg = <0x0 0xf0000000 0x0 0x01ffffff
0x10 0x72000000 0x0 0x00001000
0x10 0x72001000 0x0 0x00fff000
0x0 0x124b0000 0x0 0x00010000>;
reg = <0x0 0xf0000000 0x0 0x01ffffff>,
<0x10 0x72000000 0x0 0x00001000>,
<0x10 0x72001000 0x0 0x00fff000>,
<0x0 0x124b0000 0x0 0x00010000>;
clocks = <&hfclk>;
interrupt-parent = <&plic>;
firmware-name = "vp6_elf";
Expand All @@ -635,7 +634,7 @@
};
};

sdio0: sdio0@10000000 {
sdio0: mmc@10000000 {
compatible = "snps,dw-mshc";
reg = <0x0 0x10000000 0x0 0x10000>;
interrupts = <4>;
Expand All @@ -655,7 +654,7 @@
post-power-on-delay-ms = <200>;
};

sdio1: sdio1@10010000 {
sdio1: mmc@10010000 {
compatible = "snps,dw-mshc";
reg = <0x0 0x10010000 0x0 0x10000>;
interrupts = <5>;
Expand Down