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Prefer "mov reg, wzr" over "mov reg, #0" #64740

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merged 1 commit into from
Feb 3, 2022

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@EgorBo EgorBo commented Feb 3, 2022

it's slightly more efficient.

int Test() => 0;
; Assembly listing for method Runtime:Test():int:this

-    mov     w0, #0
+    mov     w0, wzr

@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Feb 3, 2022
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it's slightly more efficient.

int Test() => 0;
; Assembly listing for method Runtime:Test():int:this

-    mov     w0, #0
+    mov     w0, wzr
Author: EgorBo
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area-CodeGen-coreclr

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@EgorBo EgorBo force-pushed the jit-arm64-prefer-wzr branch from 15d7abc to 4c9b17d Compare February 3, 2022 12:12
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EgorBo commented Feb 3, 2022

@dotnet/jit-contrib simple change, no size diffs, quite a few text diffs

@EgorBo EgorBo merged commit c7d57a1 into dotnet:main Feb 3, 2022
GetEmitter()->emitIns_R_I(INS_mov, size, reg, 0 ARM_ARG(flags));
#elif defined(TARGET_ARM64)
GetEmitter()->emitIns_Mov(INS_mov, size, reg, REG_ZR, /* canSkip */ true);
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This seems like a more general optimization (there are many Arm64 instructions that support ZR or Immediate). Is there something we can/should be doing in emit instead to automatically recognize I == 0 and convert it to REG_ZR to ensure that this optimization always lights up and that devs don't need to remember to specially handle it in every scenario?

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@tannergooding I think we already do it (e.g. #52269), just not sure how this one was skipped.

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@EgorBo EgorBo Feb 3, 2022

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I'll take a look at r2r dump corelib to find #0

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That's just handling containment in lowering which isn't quite the same as something like this (which is the result of we need zero and can't contain)

I was referring to doing basically a peephole in emit that says "you're passing #0 but this instruction also supports REG_ZR, so fix it up there.

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By that PR I meant that we already do it since a simple change that just enabled containing resulted in ZR everywhere and huge diffs

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I've just checked all functions in R2R'd corelib - we only use #0 for cmp and movn now.
There are some cases where cmp reg, #0 is followed by a branch which most likely can be folded to "branch if zero" instructions but it's not related

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movn reg, #0 is interesting though

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