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Tensor primitives divide int32#111505

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alexcovington wants to merge 27 commits intodotnet:maindotnet/runtime:mainfrom alexcovington:tensor-primitives-divide-int32alexcovington/runtime:tensor-primitives-divide-int32Copy head branch name to clipboard

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Commits

Commits on Jan 16, 2025

• Add vectorized path for Int32 type in TensorPrimitives.Divide

  

  Alex Covington (Advanced Micro Devices

  committed
  dfa44fa

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• Add ISA guards and Debug.Assert

  

  Alex Covington (Advanced Micro Devices

  committed
  37afdd2

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• Simplify vectorizable check, simplify preprocessor guard

  

  Alex Covington (Advanced Micro Devices

  committed
  0cc3b79

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Commits on Jan 21, 2025

• Use XPlat intrinsics, use x86 intrinsics just for conversion

  

  Alex Covington (Advanced Micro Devices

  committed
  b8965ae

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Commits on Jan 31, 2025

• Get Vector128<int> operator/ working

  

  Alex Covington (Advanced Micro Devices

  committed
  d5ebf81

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• Working for Vector256<int> operator/

  

  Alex Covington (Advanced Micro Devices

  committed
  ef596d9

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• Works for operator/ where op2 is scalar int

  

  Alex Covington (Advanced Micro Devices

  committed
  1da230f

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• Consolidate to one path

  

  Alex Covington (Advanced Micro Devices

  committed
  c8b913e

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Commits on Feb 7, 2025

• Move logic from importer to gentree

  

  Alex Covington (Advanced Micro Devices

  committed
  6ac02b3

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• Add support to vectorize Vector512<int> operator /

  

  Alex Covington (Advanced Micro Devices

  committed
  2bc816b

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Commits on Feb 11, 2025

• Working GenTreeSIMDDivByZeroCheck node

  

  Alex Covington (Advanced Micro Devices

  committed
  77842e4

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• Make GenTreeSIMDDivByZeroCheck a unary op

  

  Alex Covington (Advanced Micro Devices

  committed
  16a5178

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• Remove empty lower functions, remove leftover gtGetOp2

  

  Alex Covington (Advanced Micro Devices

  committed
  1ca404f

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• JIT formatting

  

  Alex Covington (Advanced Micro Devices

  committed
  d9b18a0

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• Only use low SIMD registers for ptest

  

  Alex Covington (Advanced Micro Devices

  committed
  34329ad

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Commits on Feb 12, 2025

• Merge branch 'main' into tensor-primitives-divide-int32

  alexcovington

  authored
  65d2f8c

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Commits on Feb 17, 2025

• Merge branch 'main' into tensor-primitives-divide-int32

  alexcovington

  authored
  839baa9

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Commits on Feb 18, 2025

• Use gtNewSimdCmpOpAnyNode for div-by-zero check

  

  Alex Covington (Advanced Micro Devices

  committed
  c6e18e6

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• Add spill for op1

  

  Alex Covington (Advanced Micro Devices

  committed
  078aff6

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• Jit formatting

  

  Alex Covington (Advanced Micro Devices

  committed
  f994b09

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Commits on Feb 20, 2025

• Rework to use NI_Vector*_op_Division

  

  Alex Covington (Advanced Micro Devices

  committed
  6767384

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• Remove GT_SIMD_DIV_BY_ZERO_CHECK and related class/functions

  

  Alex Covington (Advanced Micro Devices

  committed
  e61e97f

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Commits on Feb 21, 2025

• Re-use tmp reg for converts

  

  Alex Covington (Advanced Micro Devices

  committed
  08e0d7c

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• Comments, jit formatting

  

  Alex Covington (Advanced Micro Devices

  committed
  66580e1

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• Remove leftover SIMDDivByZero

  

  Alex Covington (Advanced Micro Devices

  committed
  3feb91b

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• Don't flag with GTF_OVERFLOW since it conflicts with GTF_HW_EM_OP

  

  Alex Covington (Advanced Micro Devices

  committed
  1807a4c

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Commits on Feb 24, 2025

• Use correct INT_MIN / -1, simplify vec const generation, add assert to verify base type is TYP_INT

  

  Alex Covington (Advanced Micro Devices

  committed
  4929106

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