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Merge pull request torvalds#156 in PROCESSOR-SDK/processor-sdk-linux …
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…from plsdk-2729-v6 to processor-sdk-linux-4.19.y

* commit '8bb5766b8f065c3142ec2c6ae5bfdb82ce175d17':
  net: phy: dp83867: add workaround for incorrect default FLD threshold
  net: ethernet: ti: icssg_prueth: disable ptp for dual icssg
  arm64: dts: k3-am654-idk: add an overlay to support interposer card
  net: ti: icssg_prueth: Enhance the driver to support an icssg pair
  dt-bindings: net: ti,icssg-prueth: update for using icssg pair
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Muralidharan Karicheri committed May 22, 2019
2 parents a4125aa + 8bb5766 commit 41ee856
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Showing 7 changed files with 686 additions and 149 deletions.
6 changes: 6 additions & 0 deletions Documentation/devicetree/bindings/net/ti,icssg-prueth.txt
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Expand Up @@ -3,6 +3,8 @@ Texas Instruments ICSSG PRUSS Ethernet

Required properties:
- compatible : Should be "ti,am654-icssg-prueth" for AM65x Family SoCs
Should be "ti,am654-dualicssg-prueth" for AM65x Family
SoCs when ICSSG0 and ICSSG1 are paired.
- prus : list of pHandles to the PRU and RTU nodes
- firmware-name : should contain the name of the firmware image
file located in the firmware search path
Expand All @@ -14,7 +16,11 @@ Required properties:
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1", "rxmgm0", "rxmgm1"
- mii-g-rt : phandle to MII_G_RT module's syscon regmap.
- mii-g-rt-paired : phandle to paired ICSSG's MII_G_RT module's syscon
regmap.
- mii-rt : phandle to MII_RT module's syscon regmap.
- mii-rt-paired : phandle to paired ICSSG's MII_RT module's syscon
regmap.

Must contain children, one for each of the MAC ports.
Children must be named ethernet-mii0 and ethernet-mii1.
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3 changes: 2 additions & 1 deletion arch/arm64/boot/dts/ti/Makefile
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Expand Up @@ -17,7 +17,8 @@ dtb-$(CONFIG_ARCH_K3_AM6_SOC) += k3-am654-base-board.dtb \
k3-am654-pcie-usb2.dtbo \
k3-am654-evm-csi2-ov490.dtbo \
k3-am654-evm-csi2-ov5640.dtbo \
k3-am654-idk.dtbo
k3-am654-idk.dtbo \
k3-am654-idk-interposer.dtbo

$(obj)/%.dtbo: $(src)/%.dtso FORCE
$(call if_changed_dep,dtc)
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250 changes: 250 additions & 0 deletions arch/arm64/boot/dts/ti/k3-am654-idk-interposer.dtso
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Original file line number Diff line number Diff line change
@@ -0,0 +1,250 @@
// SPDX-License-Identifier: GPL-2.0
/**
* DT overlay for IDK application board with interposer card on AM654 EVM
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
*/

/dts-v1/;
/plugin/;
#include <dt-bindings/dma/k3-udma.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/pinctrl/k3.h>

/ {
fragment@101 {
target-path = "/";

__overlay__ {
aliases {
ethernet3 = "/pruss0_eth/ethernet-mii0";
ethernet4 = "/pruss0_eth/ethernet-mii1";
};

/* Dual Ethernet application node on PRU-ICSSG0 */
pruss0_eth {
compatible = "ti,am654-dualicssg-prueth";
pinctrl-names = "default";
pinctrl-0 = <&icssg01_rgmii_pins_default>;
sram = <&msmc_ram>;
interrupt-parent = <&main_udmass_inta>;

/* port-1, rx pru/rtu followed by port-2 tx pru/rtu, then port-1 rx and so forth */
prus = <&pru0_0>, <&rtu0_0>, <&pru0_1>, <&rtu0_1>, <&pru1_0>, <&rtu1_0>, <&pru1_1>, <&rtu1_1>;
firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf",
"ti-pruss/am65x-rtu0-prueth-fw.elf",
"ti-pruss/am65x-pru1-prueth-fw.elf",
"ti-pruss/am65x-rtu1-prueth-fw.elf",
"ti-pruss/am65x-pru0-prueth-fw.elf",
"ti-pruss/am65x-rtu0-prueth-fw.elf",
"ti-pruss/am65x-pru1-prueth-fw.elf",
"ti-pruss/am65x-rtu1-prueth-fw.elf";
mii-g-rt = <&icssg0_mii_g_rt>;
mii-g-rt-paired = <&icssg1_mii_g_rt>;
mii-rt = <&icssg0_mii_rt>;
mii-rt-paired = <&icssg1_mii_rt>;

dma-coherent;
dmas = <&main_udmap &icssg0 4 UDMA_DIR_TX>, /* egress icssg0 slice 1 */
<&main_udmap &icssg0 5 UDMA_DIR_TX>, /* egress icssg0 slice 1 */
<&main_udmap &icssg0 6 UDMA_DIR_TX>, /* egress icssg0 slice 1 */
<&main_udmap &icssg0 7 UDMA_DIR_TX>, /* mgmnt cmd icssg0 slice 1 */

<&main_udmap &icssg0 0 UDMA_DIR_RX>, /* ingress icssg0 slice 0 */
<&main_udmap &icssg0 2 UDMA_DIR_RX>, /* ingress mgmnt rsp icssg0 slice 0 */

<&main_udmap &icssg1 4 UDMA_DIR_TX>, /* egress icssg1 slice 1 */
<&main_udmap &icssg1 5 UDMA_DIR_TX>, /* egress icssg1 slice 1 */
<&main_udmap &icssg1 6 UDMA_DIR_TX>, /* egress icssg1 slice 1 */
<&main_udmap &icssg1 7 UDMA_DIR_TX>, /* mgmnt cmd icssg1 slice 1 */

<&main_udmap &icssg1 0 UDMA_DIR_RX>, /* ingress icssg1 slice 0 */
<&main_udmap &icssg1 2 UDMA_DIR_RX>; /* mgmnt rsp icssg1 slice 0 */

/* 0-0 : icssg0, thread offset 0, 1-0, icssg1, thread offset 0 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"rx0", "rxmgm0",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx1", "rxmgm1";

pruss0_emac0: ethernet-mii0 {
phy-handle = <&pruss0_eth0_phy>;
phy-mode = "rgmii-id";
syscon-rgmii-delay = <&scm_conf 0x4114>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};

pruss0_emac1: ethernet-mii1 {
phy-handle = <&pruss0_eth1_phy>;
phy-mode = "rgmii-id";
syscon-rgmii-delay = <&scm_conf 0x4104>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};

gpio-decoder {
compatible = "gpio-decoder";
gpios = <&pca9536 3 GPIO_ACTIVE_HIGH>,
<&pca9536 2 GPIO_ACTIVE_HIGH>,
<&pca9536 1 GPIO_ACTIVE_HIGH>,
<&pca9536 0 GPIO_ACTIVE_HIGH>;
linux,axis = <0>; /* ABS_X */
decoder-max-value = <9>;
};
};
};
};

&main_pmx0 {
icssg0_mdio_pins_default: icssg0_mdio_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
>;
};

icssg01_rgmii_pins_default: icssg01_rgmii_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */

AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */

AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */

AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */
>;
};

mcan0_gpio_pins_default: mcan0_gpio_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x023c, PIN_INPUT, 7) /* (V25) PRG0_PRU0_GPIO18:GPIO1_47 */
>;
};

mcan1_gpio_pins_default: mcan1_gpio_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x028c, PIN_INPUT, 7) /* (Y26) PRG0_PRU1_GPIO18.GPIO1_67 */
>;
};
};

&wkup_pmx0 {

mcu_mcan0_pins_default: mcu_mcan0_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT_PULLUP, 0) /* (W2) MCU_MCAN0_RX */
AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT_PULLUP, 0) /* (W1) MCU_MCAN0_TX */
>;
};

mcu_mcan1_pins_default: mcu_mcan1_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00c4, PIN_INPUT_PULLUP, 1) /* (AD3) WKUP_GPIO0_5.MCU_MCAN1_RX */
AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT_PULLUP, 1) /* (AC3) WKUP_GPIO0_4.MCU_MCAN1_TX */
>;
};
};

&icssg0_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&icssg0_mdio_pins_default>;
#address-cells = <1>;
#size-cells = <0>;

pruss0_eth0_phy: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};

pruss0_eth1_phy: ethernet-phy@3 {
reg = <3>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};

&m_can0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan0_pins_default &mcan0_gpio_pins_default>;
stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
can-transceiver {
max-bitrate = <5000000>;
};
};

&m_can1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan1_pins_default &mcan1_gpio_pins_default>;
stb-gpios = <&main_gpio1 67 GPIO_ACTIVE_HIGH>;
can-transceiver {
max-bitrate = <5000000>;
};
};

&main_i2c0 {
status = "okay";
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;

pca9536: gpio@41 {
compatible = "ti,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
};
};
44 changes: 34 additions & 10 deletions drivers/net/ethernet/ti/icssg_ethtool.c
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Original file line number Diff line number Diff line change
Expand Up @@ -265,16 +265,37 @@ static void emac_get_ethtool_stats(struct net_device *ndev,
{
struct prueth_emac *emac = netdev_priv(ndev);
struct prueth *prueth = emac->prueth;
int i;
int slice = prueth_emac_slice(emac);
u32 base = stats_base[slice];
u32 val;

for (i = 0; i < ARRAY_SIZE(icssg_ethtool_stats); i++) {
regmap_read(prueth->miig_rt,
base + icssg_ethtool_stats[i].offset,
&val);
data[i] = val;
struct regmap *miig_rt;
int i, slice, icssg;
bool skip = false;
u32 base, val;

icssg = emac->ingress_icssg;
miig_rt = prueth->miig_rt[icssg];
slice = emac->ingress_slice;
base = stats_base[slice];
if (!prueth->dual_icssg) {
for (i = 0; i < ARRAY_SIZE(icssg_ethtool_stats); i++) {
regmap_read(miig_rt,
base + icssg_ethtool_stats[i].offset,
&val);
data[i] = val;
}
} else {
for (i = 0; i < ARRAY_SIZE(icssg_ethtool_stats); i++) {
if (!skip && icssg_ethtool_stats[i].offset >=
offsetof(struct miig_stats_regs, tx_good_frames)) {
icssg = emac->egress_icssg;
slice = emac->egress_slice;
miig_rt = prueth->miig_rt[icssg];
base = stats_base[slice];
skip = true;
}
regmap_read(miig_rt,
base + icssg_ethtool_stats[i].offset,
&val);
data[i] = val;
}
}
}

Expand All @@ -283,6 +304,9 @@ static int emac_get_ts_info(struct net_device *ndev,
{
struct prueth_emac *emac = netdev_priv(ndev);

if (emac->prueth->dual_icssg)
return -ENODEV;

info->so_timestamping =
SOF_TIMESTAMPING_TX_HARDWARE |
SOF_TIMESTAMPING_TX_SOFTWARE |
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