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lint clean-up #109

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merged 7 commits into from
Feb 28, 2025
Merged

lint clean-up #109

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7e22d5a
fixed sampler_ntt_dv width mismatch
Feb 27, 2025
d7310e4
fixed pubkey_ram_wstrobe width mismatch
Feb 27, 2025
63ca790
fixed sigencode_z_unit/opb1 width mismatch
Feb 27, 2025
52ea5cc
fixed sigdecode_z_unit/opb1 width mismatch
Feb 27, 2025
d8c0473
added default to unique case statement
Feb 27, 2025
7d93163
Merge branch 'main' into mojtaba-lint
Feb 27, 2025
c7285cd
MICROSOFT AUTOMATED PIPELINE: Stamp 'mojtaba-lint' with updated times…
mojtaba-bisheh Feb 27, 2025
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2 changes: 1 addition & 1 deletion .github/workflow_metadata/pr_hash
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@@ -1 +1 @@
c911cebc6557d5358fa36a00da2c1d6e089a2d251c3acb876f720f27ed94922cccf906a36c67c2f46bde30f25b2130e7
f6757ba3d4dc6a5a2f23d24d690f61e0deb5ae0208507fed2ac57630c41d8f014c1c7b6775b89192bb5ef8b0eac23558
2 changes: 1 addition & 1 deletion .github/workflow_metadata/pr_timestamp
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@@ -1 +1 @@
1740687676
1740700398
12 changes: 6 additions & 6 deletions src/mldsa_top/rtl/mldsa_ctrl.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -858,10 +858,10 @@ always_comb kv_seed_data_present = '0;

always_comb begin
unique case (pkdecode_rd_offset_f[1:0])
2'b00: pkdecode_rd_data_o = pubkey_ram_rdata_t1[7:0];
2'b01: pkdecode_rd_data_o = pubkey_ram_rdata_t1[15:8];
2'b10: pkdecode_rd_data_o = pubkey_ram_rdata_t1[23:16];
2'b11: pkdecode_rd_data_o = pubkey_ram_rdata_t1[31:24];
2'b00: pkdecode_rd_data_o = pubkey_ram_rdata_t1[7:0];
2'b01: pkdecode_rd_data_o = pubkey_ram_rdata_t1[15:8];
2'b10: pkdecode_rd_data_o = pubkey_ram_rdata_t1[23:16];
default: pkdecode_rd_data_o = pubkey_ram_rdata_t1[31:24];
endcase
end

Expand All @@ -873,8 +873,8 @@ always_comb kv_seed_data_present = '0;
({PK_MEM_ADDR_W{api_pubkey_we}} & api_pubkey_mem_addr.addr) |
({PK_MEM_ADDR_W{zeroize_mem_we}} & zeroize_mem_addr[PK_MEM_ADDR_W-1:0]);

always_comb pubkey_ram_wstrobe = ({PK_MEM_WSTROBE_W{pk_t1_wren_i}} & 'h3FF << pk_t1_wr_addr_i[1:0]*10) |
({PK_MEM_WSTROBE_W{api_pubkey_we}} & ('hF << api_pubkey_mem_addr.offset*4)) |
always_comb pubkey_ram_wstrobe = ({PK_MEM_WSTROBE_W{pk_t1_wren_i}} & PK_MEM_WSTROBE_W'('h3FF << pk_t1_wr_addr_i[1:0]*10)) |
({PK_MEM_WSTROBE_W{api_pubkey_we}} & PK_MEM_WSTROBE_W'('hF << api_pubkey_mem_addr.offset*4)) |
({PK_MEM_WSTROBE_W{zeroize_mem_we}});


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4 changes: 2 additions & 2 deletions src/mldsa_top/rtl/mldsa_top.sv
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Expand Up @@ -1000,7 +1000,7 @@ always_comb begin
for (int bank = 0; bank < 2; bank++) begin
ntt_mem_re0_bank[0][bank] = (ntt_mem_rd_req[0].rd_wr_en == RW_READ) & (ntt_mem_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (ntt_mem_rd_req[0].addr[0] == bank);
pwo_a_mem_re0_bank[0][bank] = (pwm_a_rd_req[0].rd_wr_en == RW_READ) & (pwm_a_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (pwm_a_rd_req[0].addr[0] == bank);
pwo_b_mem_re0_bank[0][bank] = (ntt_shuffling_en[0] ? ~sampler_ntt_dv_f : ~sampler_ntt_dv) & (pwm_b_rd_req[0].rd_wr_en == RW_READ) & (pwm_b_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (pwm_b_rd_req[0].addr[0] == bank);
pwo_b_mem_re0_bank[0][bank] = (ntt_shuffling_en[0] ? ~sampler_ntt_dv_f[0] : ~sampler_ntt_dv[0]) & (pwm_b_rd_req[0].rd_wr_en == RW_READ) & (pwm_b_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (pwm_b_rd_req[0].addr[0] == bank);

ntt_mem_re0_bank[1][bank] = (ntt_mem_rd_req[1].rd_wr_en == RW_READ) & (ntt_mem_rd_req[1].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (ntt_mem_rd_req[1].addr[0] == bank);
pwo_a_mem_re0_bank[1][bank] = (pwm_a_rd_req[1].rd_wr_en == RW_READ) & (pwm_a_rd_req[1].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]) & (pwm_a_rd_req[1].addr[0] == bank);
Expand Down Expand Up @@ -1034,7 +1034,7 @@ always_comb begin
end else begin
ntt_mem_re[0][i] = (ntt_mem_rd_req[0].rd_wr_en == RW_READ) & (ntt_mem_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);
pwo_a_mem_re[0][i] = (pwm_a_rd_req[0].rd_wr_en == RW_READ) & (pwm_a_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);
pwo_b_mem_re[0][i] = (ntt_shuffling_en[0] ? ~sampler_ntt_dv_f : ~sampler_ntt_dv) & (pwm_b_rd_req[0].rd_wr_en == RW_READ) & (pwm_b_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);
pwo_b_mem_re[0][i] = (ntt_shuffling_en[0] ? ~sampler_ntt_dv_f[0] : ~sampler_ntt_dv[0]) & (pwm_b_rd_req[0].rd_wr_en == RW_READ) & (pwm_b_rd_req[0].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);

ntt_mem_re[1][i] = (ntt_mem_rd_req[1].rd_wr_en == RW_READ) & (ntt_mem_rd_req[1].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);
pwo_a_mem_re[1][i] = (pwm_a_rd_req[1].rd_wr_en == RW_READ) & (pwm_a_rd_req[1].addr[MLDSA_MEM_ADDR_WIDTH-1:MLDSA_MEM_ADDR_WIDTH-3] == i[2:0]);
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2 changes: 1 addition & 1 deletion src/sig_decode_z/rtl/sigdecode_z_unit.sv
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Expand Up @@ -92,7 +92,7 @@ module sigdecode_z_unit
else begin
r0_reg <= r0;
carry0_reg <= carry0;
opb1 <= sub_i ? MLDSA_Q : ~MLDSA_Q;
opb1 <= sub_i ? {1'b0, MLDSA_Q} : {1'b1, ~MLDSA_Q};
sub_n <= !sub_i;
end
end
Expand Down
2 changes: 1 addition & 1 deletion src/sig_encode_z/rtl/sigencode_z_unit.sv
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Expand Up @@ -93,7 +93,7 @@ module sigencode_z_unit
else begin
r0_reg <= r0;
carry0_reg <= carry0;
opb1 <= sub_i ? MLDSA_Q : ~MLDSA_Q;
opb1 <= sub_i ? {1'b0, MLDSA_Q} : {1'b1, ~MLDSA_Q};
sub_n <= !sub_i;
end
end
Expand Down