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Creating Namespace parser and unit test for Cecille's PR #37527 Build example - TI CC32XX #1129: Pull request #4 synchronize by j-ororke
February 20, 2025 23:16 Action required j-ororke:add-namespace-parsing
j-ororke:add-namespace-parsing
February 20, 2025 23:16 Action required
Creating Namespace parser and unit test for Cecille's PR #37527 Build example - TI CC32XX #1128: Pull request #4 synchronize by j-ororke
February 20, 2025 20:48 Action required j-ororke:add-namespace-parsing
j-ororke:add-namespace-parsing
February 20, 2025 20:48 Action required
Creating Namespace parser and unit test for Cecille's PR #37527 Build example - TI CC32XX #1127: Pull request #4 synchronize by j-ororke
February 19, 2025 12:24 Action required j-ororke:add-namespace-parsing
j-ororke:add-namespace-parsing
February 19, 2025 12:24 Action required
Creating Namespace parser and unit test for Cecille's PR #37527 Build example - TI CC32XX #1126: Pull request #4 opened by j-ororke
February 19, 2025 12:11 Action required j-ororke:add-namespace-parsing
j-ororke:add-namespace-parsing
February 19, 2025 12:11 Action required
Actually initialize the endpoints Build example - TI CC32XX #1125: Commit fbaa128 pushed by cecille
October 24, 2024 18:02 4h 55m 0s valve_with_silabs
valve_with_silabs
October 24, 2024 18:02 4h 55m 0s
fix gen line for CD Build example - TI CC32XX #1124: Commit dfd8f62 pushed by cecille
October 24, 2024 17:03 4h 42m 43s valve_with_silabs
valve_with_silabs
October 24, 2024 17:03 4h 42m 43s
Fix product id Build example - TI CC32XX #1123: Commit 2f43de8 pushed by cecille
October 24, 2024 16:49 3h 12m 20s valve_with_silabs
valve_with_silabs
October 24, 2024 16:49 3h 12m 20s
Fix CD, move certs and build Build example - TI CC32XX #1122: Commit 0354319 pushed by cecille
October 24, 2024 16:32 1h 55m 14s valve_with_silabs
valve_with_silabs
October 24, 2024 16:32 1h 55m 14s
add reset back Build example - TI CC32XX #1121: Commit e4f7ea7 pushed by cecille
October 24, 2024 13:50 2h 34m 5s valve_with_silabs
valve_with_silabs
October 24, 2024 13:50 2h 34m 5s
Add in creds and info Build example - TI CC32XX #1120: Commit fdbd029 pushed by cecille
October 24, 2024 13:35 45m 30s valve_with_silabs
valve_with_silabs
October 24, 2024 13:35 45m 30s
Documentation: Consolidate zap/codegen Build example - TI CC32XX #1119: Commit 256889f pushed by cecille
October 23, 2024 02:31 52m 59s documentation_more_more_reorg
documentation_more_more_reorg
October 23, 2024 02:31 52m 59s
TC-VALCC-3.3: Allow immediate open Build example - TI CC32XX #1118: Commit b858bfe pushed by cecille
October 22, 2024 21:21 35m 22s VALCC_3_1_allow_immediate_open
VALCC_3_1_allow_immediate_open
October 22, 2024 21:21 35m 22s
very early draft of silabs port Build example - TI CC32XX #1117: Commit 6d773f5 pushed by cecille
October 22, 2024 15:23 13m 44s valve_with_silabs
valve_with_silabs
October 22, 2024 15:23 13m 44s
Add a mystery option to the controller Build example - TI CC32XX #1116: Commit 1a1d5c6 pushed by cecille
October 15, 2024 23:28 8m 0s valve
valve
October 15, 2024 23:28 8m 0s
Fix tests to account for unconditional change to target and current a… Build example - TI CC32XX #1115: Commit 31ed684 pushed by cecille
October 9, 2024 21:03 1h 27m 4s valve
valve
October 9, 2024 21:03 1h 27m 4s
Restyled by isort Build example - TI CC32XX #1114: Commit 3ab061b pushed by cecille
October 9, 2024 14:21 55m 31s VALCC_3_1_allow_immediate_open
VALCC_3_1_allow_immediate_open
October 9, 2024 14:21 55m 31s
Update src/python_testing/TC_VALCC_4_2.py Build example - TI CC32XX #1113: Commit 6644fbd pushed by andy31415
October 8, 2024 18:51 3h 25m 50s VALCC_4_2_unconditional_write_cleanup
VALCC_4_2_unconditional_write_cleanup
October 8, 2024 18:51 3h 25m 50s
Update src/python_testing/TC_VALCC_4_2.py Build example - TI CC32XX #1112: Commit 97b6ba2 pushed by andy31415
October 8, 2024 18:51 16m 50s VALCC_4_2_unconditional_write_cleanup
VALCC_4_2_unconditional_write_cleanup
October 8, 2024 18:51 16m 50s
linter Build example - TI CC32XX #1111: Commit c735c6a pushed by cecille
October 7, 2024 17:19 9h 18m 49s VALCC_3_1_allow_immediate_open
VALCC_3_1_allow_immediate_open
October 7, 2024 17:19 9h 18m 49s
Restyled by isort Build example - TI CC32XX #1110: Commit 3824b1d pushed by cecille
October 7, 2024 17:11 8h 40m 1s DESC_2_2_fix_mfg
DESC_2_2_fix_mfg
October 7, 2024 17:11 8h 40m 1s
linter Build example - TI CC32XX #1109: Commit ef8d846 pushed by cecille
October 7, 2024 17:07 7h 3m 58s tc_da_1_2_better_error_message
tc_da_1_2_better_error_message
October 7, 2024 17:07 7h 3m 58s
linter Build example - TI CC32XX #1108: Commit ce5034c pushed by cecille
October 7, 2024 17:05 3h 24m 25s DESC_2_2_fix_mfg
DESC_2_2_fix_mfg
October 7, 2024 17:05 3h 24m 25s
linter Build example - TI CC32XX #1107: Commit 88b1f8d pushed by cecille
October 7, 2024 17:01 2h 52m 5s VALCC_4_2_unconditional_write_cleanup
VALCC_4_2_unconditional_write_cleanup
October 7, 2024 17:01 2h 52m 5s
Add close at start of test Build example - TI CC32XX #1106: Commit 109f400 pushed by cecille
October 7, 2024 16:49 25m 22s VALCC_3_1_allow_immediate_open
VALCC_3_1_allow_immediate_open
October 7, 2024 16:49 25m 22s
another fixup for 3.1 Build example - TI CC32XX #1105: Commit 847a8d7 pushed by cecille
October 7, 2024 14:03 1h 15m 59s valve
valve
October 7, 2024 14:03 1h 15m 59s