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cpu/stm32/periph_dac: small improvements #19573

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merged 3 commits into from
May 12, 2023

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gschorcht
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Contribution description

This PR provides the following improvements for periph_dac on STM32

  • Support for RCC_APB1ENR1_DAC1EN symbol added.
  • For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting VREFBUF_ENABLE=1.
  • If the DAC peripheral has a mode register (DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.

Testing procedure

  • Green CI
  • tests/periph_dac should still work for any board supporting the periph_dac feature.

Issues/PRs references

gschorcht added 3 commits May 10, 2023 12:12
For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ if supported by setting `VREFBUF_ENABLE=1`.
If the DAC peripheral has a mode register (DAC_MCR), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel or to use the DAC channel also for other on-chip peripherals.
@github-actions github-actions bot added Area: cpu Area: CPU/MCU ports Platform: ARM Platform: This PR/issue effects ARM-based platforms labels May 10, 2023
@gschorcht gschorcht added Type: new feature The issue requests / The PR implemements a new feature for RIOT CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 10, 2023
@gschorcht gschorcht changed the title cpu/stm32/periph_dac: improvements cpu/stm32/periph_dac: small improvements May 10, 2023
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riot-ci commented May 10, 2023

Murdock results

✔️ PASSED

2a210c1 cpu/stm32/periph_dac: support of DAC mode register

Success Failures Total Runtime
6931 0 6931 08m:41s

Artifacts

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maribu commented May 12, 2023

bors merge

bors bot added a commit that referenced this pull request May 12, 2023
19573: cpu/stm32/periph_dac: small improvements r=maribu a=gschorcht

### Contribution description

This PR provides the following improvements for `periph_dac` on STM32

- Support for `RCC_APB1ENR1_DAC1EN` symbol added.
- For boards that have not connected the V_REF+ pin to an external reference voltage, the VREFBUF peripheral can be used as V_REF+ (if supported) by setting `VREFBUF_ENABLE=1`.
- If the DAC peripheral has a mode register (`DAC_MCR`), it is set to normal mode with buffer enabled and connected to external pin and on-chip peripherals. This allows to measure the current value of a DAC channel with an ADC channel or to use the DAC channel also for other on-chip peripherals.

### Testing procedure

- Green CI
- `tests/periph_dac` should still work for any board supporting the `periph_dac` feature.

### Issues/PRs references



19584: tests/build_system/external_board_dirs: fix broken symlinks r=maribu a=aabadie



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
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maribu commented May 12, 2023

bors cancel
bors merge

(Let's try to pack the merge train)

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bors bot commented May 12, 2023

Canceled.

@bors bors bot merged commit cf8c139 into RIOT-OS:master May 12, 2023
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bors bot commented May 12, 2023

Build succeeded!

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@gschorcht gschorcht deleted the cpu/stm32/periph/dac_improvements branch May 15, 2023 12:37
bors bot added a commit that referenced this pull request May 24, 2023
18005: pkg/semtech-loramac: model in Kconfig r=aabadie a=aabadie



19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht

### Contribution description

The PR adds the board definition for the STM2L496G-DISO board.

It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`:
```
> FEATURES_PROVIDED += periph_adc
> FEATURES_PROVIDED += periph_dac
> FEATURES_PROVIDED += periph_dma
> FEATURES_PROVIDED += periph_pwm
> FEATURES_PROVIDED += periph_uart_hw_fc
> FEATURES_PROVIDED += arduino
```
In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition.

The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.

### Testing procedure

All basic tests should work with the new board definition. The following tests were executed and did succeed:

- [x] `tests/periph/adc`
- [x] `tests/periph/dac`
- [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested
- [x] `tests/periph/pwm`
- [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested
- [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)`
- [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)`
- [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm`

### Issues/PRs references

~Depends on PR #19571~
~Depends on PR #19572~
~Depends on PR #19573~

19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie



19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss



### Contribution description

Broken master due to incorrect model of the periph_pio in kconfig.

### Testing procedure

Green murdock (now that the board is added to the list)

### Issues/PRs references

Look at the master CI...

Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
bors bot added a commit that referenced this pull request May 24, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht

### Contribution description

The PR adds the board definition for the STM2L496G-DISO board.

It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`:
```
> FEATURES_PROVIDED += periph_adc
> FEATURES_PROVIDED += periph_dac
> FEATURES_PROVIDED += periph_dma
> FEATURES_PROVIDED += periph_pwm
> FEATURES_PROVIDED += periph_uart_hw_fc
> FEATURES_PROVIDED += arduino
```
In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition.

The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.

### Testing procedure

All basic tests should work with the new board definition. The following tests were executed and did succeed:

- [x] `tests/periph/adc`
- [x] `tests/periph/dac`
- [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested
- [x] `tests/periph/pwm`
- [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested
- [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)`
- [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)`
- [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm`

### Issues/PRs references

~Depends on PR #19571~
~Depends on PR #19572~
~Depends on PR #19573~

19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie



19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss



### Contribution description

Broken master due to incorrect model of the periph_pio in kconfig.

### Testing procedure

Green murdock (now that the board is added to the list)

### Issues/PRs references

Look at the master CI...

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: MrKevinWeiss <weiss.kevin604@gmail.com>
bors bot added a commit that referenced this pull request May 24, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht

### Contribution description

The PR adds the board definition for the STM2L496G-DISO board.

It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`:
```
> FEATURES_PROVIDED += periph_adc
> FEATURES_PROVIDED += periph_dac
> FEATURES_PROVIDED += periph_dma
> FEATURES_PROVIDED += periph_pwm
> FEATURES_PROVIDED += periph_uart_hw_fc
> FEATURES_PROVIDED += arduino
```
In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition.

The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.

### Testing procedure

All basic tests should work with the new board definition. The following tests were executed and did succeed:

- [x] `tests/periph/adc`
- [x] `tests/periph/dac`
- [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested
- [x] `tests/periph/pwm`
- [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested
- [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)`
- [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)`
- [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm`

### Issues/PRs references

~Depends on PR #19571~
~Depends on PR #19572~
~Depends on PR #19573~

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
bors bot added a commit that referenced this pull request May 27, 2023
19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht

### Contribution description

The PR adds the board definition for the STM2L496G-DISO board.

It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`:
```
> FEATURES_PROVIDED += periph_adc
> FEATURES_PROVIDED += periph_dac
> FEATURES_PROVIDED += periph_dma
> FEATURES_PROVIDED += periph_pwm
> FEATURES_PROVIDED += periph_uart_hw_fc
> FEATURES_PROVIDED += arduino
```
In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition.

The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.

### Testing procedure

All basic tests should work with the new board definition. The following tests were executed and did succeed:

- [x] `tests/periph/adc`
- [x] `tests/periph/dac`
- [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested
- [x] `tests/periph/pwm`
- [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested
- [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)`
- [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)`
- [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm`

### Issues/PRs references

~Depends on PR #19571~
~Depends on PR #19572~
~Depends on PR #19573~

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
@benpicco benpicco added this to the Release 2023.07 milestone Aug 2, 2023
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4 participants