boards/sipeed-longan-nano: initial support

RIOT-OS · Jan 23, 2023 · 13e4ea4 · 13e4ea4
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diff --git a/boards/sipeed-longan-nano/Kconfig b/boards/sipeed-longan-nano/Kconfig
@@ -0,0 +1,21 @@
+# Copyright (c) 2023 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config BOARD
+    default "sipeed-longan-nano" if BOARD_SIPEED_LONGAN_NANO
+
+config BOARD_SIPEED_LONGAN_NANO
+    bool
+    default y
+    select CPU_MODEL_GD32VF103CBT6
+    select BOARD_HAS_HXTAL
+    select BOARD_HAS_LXTAL
+    select HAS_PERIPH_TIMER
+    select HAS_PERIPH_UART
+    select HAVE_SAUL_GPIO
+
+source "$(RIOTBOARD)/common/gd32v/Kconfig"
diff --git a/boards/sipeed-longan-nano/Makefile b/boards/sipeed-longan-nano/Makefile
@@ -0,0 +1,3 @@
+MODULE = board
+
+include $(RIOTBASE)/Makefile.base
diff --git a/boards/sipeed-longan-nano/Makefile.dep b/boards/sipeed-longan-nano/Makefile.dep
@@ -0,0 +1,5 @@
+ifneq (,$(filter saul_default,$(USEMODULE)))
+  USEMODULE += saul_gpio
+endif
+
+include $(RIOTBOARD)/common/gd32v/Makefile.dep
diff --git a/boards/sipeed-longan-nano/Makefile.features b/boards/sipeed-longan-nano/Makefile.features
@@ -0,0 +1,7 @@
+CPU_MODEL = gd32vf103cbt6
+
+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart
+
+include $(RIOTBOARD)/common/gd32v/Makefile.features
diff --git a/boards/sipeed-longan-nano/Makefile.include b/boards/sipeed-longan-nano/Makefile.include
@@ -0,0 +1 @@
+include $(RIOTBOARD)/common/gd32v/Makefile.include
diff --git a/boards/sipeed-longan-nano/doc.txt b/boards/sipeed-longan-nano/doc.txt
@@ -0,0 +1,105 @@
+/**
+@defgroup   boards_sipeed_longan_nano Sipeed Longan Nano board
+@ingroup    boards
+@brief      Support for the Sipeed Longan Nano board
+@author     Gunar Schorcht <gunar@schorcht.net>
+
+## Overview
+
+The [Sipeed Longan Nano](https://longan.sipeed.com/en) is a
+development board for the GigaDevice GD32VF103CBT6 MCU with the following
+on-board components:
+
+- GD32VF103CBT6 RISC-V MCU @108MHz
+- USB Type C
+- TF card slot
+- 3 user LEDs
+
+@image html "https://media-cdn.seeedstudio.com/media/catalog/product/cache/7f7f32ef807b8c2c2215b49801c56084/1/1/114992425_1.jpg" "Sipeed Longan Nano" width=600
+
+## Hardware:
+
+| MCU         | GD32VF103CBT6                          | Supported |
+|:----------- |:-------------------------------------- | --------- |
+| Family      | RISC-V with ECLIC                      |           |
+| Vendor      | GigaDevice                             |           |
+| RAM         | 32 kByte                               |           |
+| Flash       | 128 KByte                              |           |
+| Frequency   | 108 MHz                                |           |
+| Power Modes | 3 (Sleep, Deep Sleep, Standby)         |   no      |
+| GPIOs       | 37                                     |   yes     |
+| Timers      | 5 x 16-bit timer                       |   yes     |
+| RTC         | 1 x 32-bit counter, 20-bit prescaler   |   yes     |
+| WDT         | 2 x 12-bit counter, 3-bit prescaler    |   yes     |
+| ADC         | 2 x 12-bit units, 16 channels, 1 Msps  |   no      |
+| DAC         | 2 x 12-bit channel                     |   no      |
+| UART        | -                                      |   yes     |
+| USART       | 3                                      |   yes     |
+| SPI         | 3                                      |   no      |
+| I2C         | 2 x Fast Mode 400 kHz                  |   no      |
+| I2S         | 2                                      |   no      |
+| CAN         | 2 x CAN 2.0B with up to 1 Mbps         |   no      |
+| PWM         | 6 Channels                             |   no      |
+| USB         | 1 x USB FS OTG                         |   no      |
+| Vcc         | 3.0V - 3.6V                            |           |
+| Datasheet   | [Datasheet](https://gd32mcu.com/data/documents/datasheet/GD32VF103_Datasheet_Rev1.6.pdf) | |
+| Reference Manual | [Reference Manual](https://gd32mcu.com/download/down/document_id/222/path_type/1) | |
+| Board Manual | [Board Manual](https://longan.sipeed.com/en/) | |
+| Board Schematic | [Board Schematic](http://dl.sipeed.com/fileList/LONGAN/Nano/HDK/Longan%20Nano%203302/2_Schematic/Longan_nano_3302_Schematic.pdf) | |
+
+## Pin Layout / Configuration
+
+The general pin layout is shown below.
+
+@image html "https://longan.sipeed.com/assets/longan_nano_pinout_v1.1.0_w5676_h4000_large.png" "Sipeed Longan Nano Pinout" width=800
+
+The following table shows the connection of the on-board components with the
+MCU pins and their configuration in RIOT.
+
+| MCU Pin | MCU Peripheral | RIOT Peripheral     | Board Function        |
+|:--------|:---------------|:--------------------|:----------------------|
+| PA9     | USART0 TX      | UART_DEV(0) TX      | UART TX               |
+| PA10    | USART0 RX      | UART_DEV(0) RX      | UART RX               |
+| PB0     |                |                     | LED1                  |
+| PB1     |                |                     | LED2                  |
+| PB5     |                |                     | LED0                  |
+
+## Flash the board
+
+The board is flashed via a JTAG interface with OpenOCD (at least [release version 0.12.0]
+(https://github.com/openocd-org/openocd/tree/9ea7f3d647c8ecf6b0f1424002dfc3f4504a162c)).
+By default, an FTDI adapter according to the configuration defined in
+[`interface/openocd-usb.cfg`]
+(https://github.com/openocd-org/openocd/blob/9ea7f3d647c8ecf6b0f1424002dfc3f4504a162c/tcl/interface/ftdi/openocd-usb.cfg)
+is assumed.
+```
+BOARD=seeedstudio-gd32 make -C examples/hello-world flash
+```
+To use an FTDI adapter with a different configuration, the configuration can be
+defined using the variable `OPENOCD_FTDI_ADAPTER`, for example:
+```
+OPENOCD_FTDI_ADAPTER=tigar BOARD=seeedstudio-gd32 make -C examples/hello-world flash
+```
+If another adapter is used, it can be specified using variable
+`OPENOCD_DEBUG_ADAPTER`, for example for a Segger J-Link adapter:
+```
+OPENOCD_DEBUG_ADAPTER=jlink BOARD=seeedstudio-gd32 make -C examples/hello-world flash
+```
+
+## Accessing STDIO via UART
+
+The `stdio` is directly accessible through the first UART interface. If an
+external USB-to-UART interface is used, this interface is mapped to
+`/dev/ttyUSB<n>` on a Linux host, where `<n>` is the index of the UART
+interface, which is 0 by default.
+
+Use the `term` target to connect to the board using `/dev/ttyUSB0`:
+```
+BOARD=seeedstudio-gd32 make -C examples/hello-world term
+```
+If the UART interface index of board's USB to UART bridge is not 0, use
+the following command to connect:
+```
+BOARD=seeedstudio-gd32 make -C examples/hello-world term PORT=/dev/ttyUSB<n>
+```
+ */
diff --git a/boards/sipeed-longan-nano/include/board.h b/boards/sipeed-longan-nano/include/board.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2023 Gunar Schorcht <gunar@schorcht.net>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_sipeed_longan_nano
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the Sipeed Longan Nano board
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ * @author      Gunar Schorcht <gunar@schorcht.net>
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    LED (on-board) configuration
+ * @{
+ */
+#define LED0_PIN            GPIO_PIN(PORT_C, 13)
+#define LED0_MASK           (1 << 13)
+#define LED0_ON             (GPIOC->BC = LED0_MASK)
+#define LED0_OFF            (GPIOC->BOP = LED0_MASK)
+#define LED0_TOGGLE         (GPIOC->OCTL ^= LED0_MASK)
+
+#define LED1_PIN            GPIO_PIN(PORT_A, 1)
+#define LED1_MASK           (1 << 1)
+#define LED1_ON             (GPIOA->BC = LED1_MASK)
+#define LED1_OFF            (GPIOA->BOP = LED1_MASK)
+#define LED1_TOGGLE         (GPIOA->OCTL ^= LED1_MASK)
+
+#define LED2_PIN            GPIO_PIN(PORT_A, 2)
+#define LED2_MASK           (1 << 2)
+#define LED2_ON             (GPIOA->BC = LED2_MASK)
+#define LED2_OFF            (GPIOA->BOP = LED2_MASK)
+#define LED2_TOGGLE         (GPIOA->OCTL ^= LED2_MASK)
+
+#define LED_RED_PIN         LED0_PIN    /**< LED0 is red */
+#define LED_GREEN_PIN       LED1_PIN    /**< LED1 is green */
+#define LED_BLUE_PIN        LED2_PIN    /**< LED2 is blue */
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */
diff --git a/boards/sipeed-longan-nano/include/gpio_params.h b/boards/sipeed-longan-nano/include/gpio_params.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2020 Gunar Schorcht
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_sipeed_longan_nano
+ * @{
+ *
+ * @file
+ * @brief       Configuration of SAUL mapped GPIO pins
+ *
+ * @author      Gunar Schorcht <gunar@schorcht.net>
+ */
+
+#ifndef GPIO_PARAMS_H
+#define GPIO_PARAMS_H
+
+#include "board.h"
+#include "saul/periph.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief    LED/Button SAUL configuration
+ */
+static const  saul_gpio_params_t saul_gpio_params[] =
+{
+    {
+        .name  = "LED RED",
+        .pin   = LED0_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "LED GREEN",
+        .pin   = LED1_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+    {
+        .name  = "LED BLUE",
+        .pin   = LED2_PIN,
+        .mode  = GPIO_OUT,
+        .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
+    },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GPIO_PARAMS_H */
+/** @} */
diff --git a/boards/sipeed-longan-nano/include/periph_conf.h b/boards/sipeed-longan-nano/include/periph_conf.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2023 Gunar Schorcht <gunar@schorcht.net>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_sipeed_longan_nano
+ * @{
+ *
+ * @file
+ * @brief       Board specific definitions for the SeeedStudio GD32 RISC-V board
+ *
+ * @author      Gunar Schorcht <gunar@schorcht.net>
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include "periph_cpu.h"
+#include "periph_common_conf.h"
+
+#include "cfg_timer_default.h"
+#include "cfg_uart_default.h"
+
+#ifndef CONFIG_BOARD_HAS_HXTAL
+#define CONFIG_BOARD_HAS_HXTAL  1   /**< The board provides a high frequency oscillator. */
+#endif
+
+#ifndef CONFIG_BOARD_HAS_LXTAL
+#define CONFIG_BOARD_HAS_LXTAL  1   /**< The board provides a low frequency oscillator. */
+#endif
+
+#ifndef CONFIG_CLOCK_HXTAL
+#define CONFIG_CLOCK_HXTAL      MHZ(8)      /**< HXTAL frequency */
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */
diff --git a/cpu/gd32v/Kconfig b/cpu/gd32v/Kconfig
@@ -23,6 +23,10 @@ config CPU_FAM_GD32V
     select MODULE_PERIPH_CLIC if TEST_KCONFIG
     select MODULE_PERIPH_WDT if MODULE_PERIPH_PM && HAS_PERIPH_WDT
 
+config CPU_MODEL_GD32VF103CBT6
+    bool
+    select CPU_FAM_GD32V
+
 config CPU_MODEL_GD32VF103VBT6
     bool
     select CPU_FAM_GD32V
@@ -36,6 +40,9 @@ config HAS_CPU_GD32V
 config CPU_FAM
     default "gd32v" if CPU_FAM_GD32V
 
+config CPU_MODEL
+    default "gd32vf103cbt6"  if CPU_MODEL_GD32VF103CBT6
+
 config CPU_MODEL
     default "gd32vf103vbt6"  if CPU_MODEL_GD32VF103VBT6
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,3 @@
		MODULE = board

		include $(RIOTBASE)/Makefile.base
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		@@ -0,0 +1 @@
		include $(RIOTBOARD)/common/gd32v/Makefile.include