fix(MMU): Unify latency in different CSR bundles #10528
good-circleemu.yml
on: pull_request
Changes Detection
5s
Generate Verilog
1h 38m
EMU - Basics
6h 5m
EMU - CHI
56m 9s
EMU - Performance
2h 44m
EMU - MC
3h 25m
SIMV - Basics
3h 56m
Upload Artifacts
24m 31s
Check Submodules
33s
Check Format
5m 4s
Annotations
1 warning
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Changes Detection
Unexpected input(s) 'predicate-quantifier', valid inputs are ['token', 'working-directory', 'ref', 'base', 'filters', 'list-files', 'initial-fetch-depth']
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Artifacts
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xs-issue-b-difftest-verilog
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12.8 MB |
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xs-issue-e-b-difftest-verilog
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12.8 MB |
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xsgen
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107 MB |
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