samples/cxl_mem_tg: 16GB memory support is added for MEM_TG #3058
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pl-ravikanth
requested review from
anandaravuri,
tswhison,
fpgamatt and
KrishnaSimmadhari
Pull Request Test Coverage Report for Build 7212553454
💛 - Coveralls |
Problem/Feature : In code only 48KB support is available for MEM_TG
Fix/Workaround : Extended it to 16GB.
Changes made : 1.samples/cxl_mem_tg/cxl_mem_tg.h and samples/cxl_mem_tg/cxl_tg_test.h are
updated accordingly.
2. Review comments from Ananda are added in samples/cxl_mem_tg/cxl_tg_test.h.
Signed-off-by: Lakshmiravikanth Pammi <lakshmiravikanth.pammi@intel.com>
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anandaravuri
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Dec 14, 2023
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Problem/Feature : In code only 48KB support is available for MEM_TG
Fix/Workaround : Extended it to 16GB.
Changes made : 1. samples/cxl_mem_tg/cxl_mem_tg.h and samples/cxl_mem_tg/cxl_tg_test.h are
updated accordingly.
2. Review comments from Ananda are added in samples/cxl_mem_tg/cxl_tg_test.h.
Sanity Results:
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg --loops 100 -w 4095 -r 4095 tg_test
[2023-12-13 13:33:30.721] [tg_test] [info] starting test run, count of 1
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
Start Test...
Test completed successfully...
TG Read and Write Clock Cycles: 899482
TG Write Clock Cycles: 409500
TG Read Clock Cycles: 489982
Write bytes: 26208000
Read bytes: 26208000
Write BW: 23.8419 GB/s
Read BW: 19.9257 GB/s
Total BW: 21.7086 GB/s
[2023-12-13 13:33:30.725] [tg_test] [info] Test tg_test(1): PASS
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg --loops 100 -w 3000 tg_test
[2023-12-13 13:33:54.740] [tg_test] [info] starting test run, count of 1
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
Start Test...
Test completed successfully...
TG Read and Write Clock Cycles: 327921
TG Write Clock Cycles: 300000
TG Read Clock Cycles: 27921
Write bytes: 19200000
Read bytes: 6400
Write BW: 23.8419 GB/s
Read BW: 0.0853905 GB/s
Total BW: 21.8191 GB/s
[2023-12-13 13:33:54.741] [tg_test] [info] Test tg_test(1): PASS
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg --loops 100 tg_test
[2023-12-13 13:34:11.123] [tg_test] [info] starting test run, count of 1
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
Start Test...
Test completed successfully...
TG Read and Write Clock Cycles: 461
TG Write Clock Cycles: 100
TG Read Clock Cycles: 361
Write bytes: 6400
Read bytes: 6400
Write BW: 23.8419 GB/s
Read BW: 6.6044 GB/s
Total BW: 10.3435 GB/s
[2023-12-13 13:34:11.124] [tg_test] [info] Test tg_test(1): PASS
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg tg_test
[2023-12-13 13:34:23.621] [tg_test] [info] starting test run, count of 1
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
Start Test...
Test completed successfully...
TG Read and Write Clock Cycles: 64
TG Write Clock Cycles: 1
TG Read Clock Cycles: 63
Write bytes: 64
Read bytes: 64
Write BW: 23.8419 GB/s
Read BW: 0.378442 GB/s
Total BW: 0.745058 GB/s
[2023-12-13 13:34:23.622] [tg_test] [info] Test tg_test(1): PASS
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg --loops 100 -w 3000 -r 3000 --stride 2000 tg_test
[2023-12-13 13:35:12.488] [tg_test] [info] starting test run, count of 1
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
Start Test...
Test completed successfully...
TG Read and Write Clock Cycles: 658835
TG Write Clock Cycles: 300000
TG Read Clock Cycles: 358835
Write bytes: 19200000
Read bytes: 19200000
Write BW: 23.8419 GB/s
Read BW: 19.9327 GB/s
Total BW: 21.7128 GB/s
[2023-12-13 13:35:12.490] [tg_test] [info] Test tg_test(1): PASS
(root@bapveac041T~/ravikanth/BETA/intermediate_release/latest_co/opae-sdk/mybuild)-> cxl_mem_tg --loops 100 -w 4095 -r 4095 --stride 2000 -l debug tg_test
[2023-12-13 13:35:42.107] [tg_test] [info] starting test run, count of 1
[2023-12-13 13:35:42.107] [tg_test] [debug] starting iteration: 1
[2023-12-13 13:35:42.108] [tg_test] [debug] clear tg all failure status registers
[2023-12-13 13:35:42.108] [tg_test] [debug] DFH:0x3000000200001023
[2023-12-13 13:35:42.108] [tg_test] [debug] GUIDL:0xa3dc5b831f5cecbb
[2023-12-13 13:35:42.108] [tg_test] [debug] GUIDH:0x4dadea342c7848cb
[2023-12-13 13:35:42.108] [tg_test] [debug] TG Contol:0x1
[2023-12-13 13:35:42.108] [tg_test] [debug] TG Status:0x8
[2023-12-13 13:35:42.108] [tg_test] [debug] Memory Size:0xc00000008000
[2023-12-13 13:35:42.108] [tg_test] [debug] TG Total clock count:0x0
[2023-12-13 13:35:42.108] [tg_test] [debug] TG Write Clock Count:0x0
[2023-12-13 13:35:42.108] [tg_test] [debug] TG Frequency:400000
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_LOOP_COUNT:0x64
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_WRITE_COUNT:0xbb8
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_READ_COUNT:0xbb8
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_BURST_LENGTH:0x1
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_PASS:0x1
[2023-12-13 13:35:42.108] [tg_test] [debug] TG_FAIL:0x0
[2023-12-13 13:35:42.108] [tg_test] [debug] tg configure input options...
[2023-12-13 13:35:42.108] [tg_test] [debug] mem tg ctl:1
[2023-12-13 13:35:42.108] [tg_test] [debug] Total hardware memory size:805306368
[2023-12-13 13:35:42.108] [tg_test] [debug] HDM memory size:536870912
HDM memory cache line size:268435456
Memory clock frequency (kHz) : 400000
Memory clock:400 MHz
[2023-12-13 13:35:42.108] [tg_test] [debug] loops:100
[2023-12-13 13:35:42.108] [tg_test] [debug] write count:4095
[2023-12-13 13:35:42.108] [tg_test] [debug] read count:4095
[2023-12-13 13:35:42.108] [tg_test] [debug] burst length:1
[2023-12-13 13:35:42.108] [tg_test] [debug] sride:2000
[2023-12-13 13:35:42.108] [tg_test] [debug] data pattern:0
[2023-12-13 13:35:42.108] [tg_test] [debug] configuring TG data seed
Start Test...
[2023-12-13 13:35:42.108] [tg_test] [debug] tg wait for test completion...
[2023-12-13 13:35:42.108] [tg_test] [debug] test complete status:0
[2023-12-13 13:35:42.110] [tg_test] [debug] tg pass:1
[2023-12-13 13:35:42.110] [tg_test] [debug] Memory Traffic Generator Status:8
[2023-12-13 13:35:42.110] [tg_test] [debug] Memory Traffic Generator Status pass
Test completed successfully...
[2023-12-13 13:35:42.110] [tg_test] [debug] TG performance ...
[2023-12-13 13:35:42.110] [tg_test] [debug] TG pass
TG Read and Write Clock Cycles: 899526
TG Write Clock Cycles: 409500
TG Read Clock Cycles: 490026
Write bytes: 26208000
Read bytes: 26208000
Write BW: 23.8419 GB/s
Read BW: 19.9239 GB/s
Total BW: 21.7075 GB/s
[2023-12-13 13:35:42.110] [tg_test] [debug] DFH:0x3000000200001023
[2023-12-13 13:35:42.110] [tg_test] [debug] GUIDL:0xa3dc5b831f5cecbb
[2023-12-13 13:35:42.110] [tg_test] [debug] GUIDH:0x4dadea342c7848cb
[2023-12-13 13:35:42.110] [tg_test] [debug] TG Contol:0x1
[2023-12-13 13:35:42.110] [tg_test] [debug] TG Status:0x8
[2023-12-13 13:35:42.110] [tg_test] [debug] Memory Size:0xc00000008000
[2023-12-13 13:35:42.110] [tg_test] [debug] TG Total clock count:0xdb9c6
[2023-12-13 13:35:42.110] [tg_test] [debug] TG Write Clock Count:0x63f9c
[2023-12-13 13:35:42.110] [tg_test] [debug] TG Frequency:400000
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_LOOP_COUNT:0x64
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_WRITE_COUNT:0xfff
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_READ_COUNT:0xfff
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_BURST_LENGTH:0x1
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_PASS:0x1
[2023-12-13 13:35:42.110] [tg_test] [debug] TG_FAIL:0x0
[2023-12-13 13:35:42.111] [tg_test] [debug] end iteration: 1
[2023-12-13 13:35:42.111] [tg_test] [info] Test tg_test(1): PASS