Skip to content

Commit 6ab8e5a

Browse files
authored
Fix MSYS build crashes (#150)
* Explicitly blacklist non-peripheral class objects in initialization.
1 parent e9f167d commit 6ab8e5a

File tree

6 files changed

+26
-17
lines changed

6 files changed

+26
-17
lines changed

hw/arm/prusa/stm32_chips/stm32f030xx.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,7 @@ static const stm32_soc_cfg_t stm32f030xx_cfg =
128128
PER_LNI(P_ADC1, TYPE_STM32F030_ADC, 0x40012400, F030_ADC_IRQ),
129129
PER_LN(P_ADCC, TYPE_STM32F030_ADCC, 0x40012400 + 0x308),
130130

131-
PER_LNI(P_RCC, TYPE_STM32F030_RCC, 0x40021000, F030_RCC_IRQ),
131+
PER_LNIF(P_RCC, TYPE_STM32F030_RCC, 0x40021000, PERIPH_CFG_FLAG_NON_STM32P, F030_RCC_IRQ),
132132
PER_LNI(P_FINT, TYPE_STM32F40x_F41x_FINT, 0x40022000, F030_FLASH_IRQ),
133133
PER_LN(P_IWDG, TYPE_STM32F030_IWDG, 0x40003000),
134134
PER_LN(P_CRC, TYPE_STM32F030_CRC, 0x40023000),

hw/arm/prusa/stm32_chips/stm32f407xx.h

+5-5
Original file line numberDiff line numberDiff line change
@@ -123,19 +123,19 @@ static const stm32_soc_cfg_t stm32f407xx_cfg =
123123
PER_LNI(P_TIM13, TYPE_STM32F4XX_TIMER, 0x40001C00, F4xx_TIM8_UP_TIM13_IRQ),
124124
PER_LNI(P_TIM14, TYPE_STM32F4XX_TIMER, 0x40002000, F4xx_TIM8_TRG_COM_TIM14_IRQ),
125125

126-
PER_LNI(P_EXTI, TYPE_STM32F4XX_EXTI, 0x40013C00,
126+
PER_LNIF(P_EXTI, TYPE_STM32F4XX_EXTI, 0x40013C00, PERIPH_CFG_FLAG_NON_STM32P,
127127
F4xx_EXTI0_IRQ, F4xx_EXTI1_IRQ, F4xx_EXTI2_IRQ, F4xx_EXTI3_IRQ,
128128
F4xx_EXTI4_IRQ, [5 ... 9] = F4xx_EXTI_5_9_IRQ,
129129
[10 ... 15] = F4xx_EXTI_10_15_IRQ
130130
),
131131
PER_LNI(P_ETH, "stm32f4xx-ethernet", 0x40028000, F4xx_ETH_IRQ, F4xx_ETH_WKUP_IRQ),
132-
PER_LNI(P_RCC, TYPE_STM32F407_RCC, 0x40023800, F4xx_RCC_IRQ),
132+
PER_LNIF(P_RCC, TYPE_STM32F407_RCC, 0x40023800, PERIPH_CFG_FLAG_NON_STM32P, F4xx_RCC_IRQ),
133133
PER_LNI(P_FINT, TYPE_STM32F40x_F41x_FINT, 0x40023C00, F4xx_FLASH_IRQ),
134134
PER_LN(P_IWDG, TYPE_STM32F4xx_IWDG, 0x40003000),
135135
PER_LN(P_CRC, TYPE_STM32F4xx_CRC, 0x40023000),
136-
PER_LN(P_RTC, TYPE_STM32F2XX_RTC, 0x40002800),
137-
PER_LN(P_ITM, TYPE_STM32F4xx_ITM, 0xE0000000),
138-
PER_LN(P_PWR, TYPE_STM32F2XX_PWR, 0x40007000),
136+
PER_LNF(P_RTC, TYPE_STM32F2XX_RTC, 0x40002800, PERIPH_CFG_FLAG_NON_STM32P),
137+
PER_LNF(P_ITM, TYPE_STM32F4xx_ITM, 0xE0000000, PERIPH_CFG_FLAG_NON_STM32P),
138+
PER_LNF(P_PWR, TYPE_STM32F2XX_PWR, 0x40007000, PERIPH_CFG_FLAG_NON_STM32P),
139139
PER_LNI(P_RNG, TYPE_STM32F4XX_RNG, 0x50060800, F4xx_HASH_RNG_IRQ),
140140
PER_LN(P_OTP, TYPE_STM32F4xx_OTP, 0x1FFF7800),
141141
PER_LNI(P_USBHS, TYPE_STM32F4xx_USB, 0x40040000, F4xx_OTG_HS_IRQ),

hw/arm/prusa/stm32_chips/stm32f427xx.h

+6-6
Original file line numberDiff line numberDiff line change
@@ -117,20 +117,20 @@ static const stm32_soc_cfg_t stm32f427xx_cfg =
117117
PER_LNI(P_TIM13, TYPE_STM32F4XX_TIMER, 0x40001C00, F4xx_TIM8_UP_TIM13_IRQ),
118118
PER_LNI(P_TIM14, TYPE_STM32F4XX_TIMER, 0x40002000, F4xx_TIM8_TRG_COM_TIM14_IRQ),
119119

120-
PER_LNI(P_EXTI, TYPE_STM32F4XX_EXTI, 0x40013C00,
120+
PER_LNIF(P_EXTI, TYPE_STM32F4XX_EXTI, 0x40013C00, PERIPH_CFG_FLAG_NON_STM32P,
121121
F4xx_EXTI0_IRQ, F4xx_EXTI1_IRQ, F4xx_EXTI2_IRQ, F4xx_EXTI3_IRQ,
122122
F4xx_EXTI4_IRQ, [5 ... 9] = F4xx_EXTI_5_9_IRQ,
123123
[10 ... 15] = F4xx_EXTI_10_15_IRQ
124124
),
125125
PER_LNI(P_ETH, "stm32f4xx-ethernet", 0x40028000, F4xx_ETH_IRQ, F4xx_ETH_WKUP_IRQ),
126-
PER_LNI(P_RCC, TYPE_STM32F427_RCC, 0x40023800, F4xx_RCC_IRQ),
126+
PER_LNIF(P_RCC, TYPE_STM32F427_RCC, 0x40023800, PERIPH_CFG_FLAG_NON_STM32P, F4xx_RCC_IRQ),
127127
PER_LNI(P_FINT, TYPE_STM32F42x_F43x_FINT, 0x40023C00, F4xx_FLASH_IRQ),
128128
PER_LN(P_IWDG, TYPE_STM32F4xx_IWDG, 0x40003000),
129129
PER_LN(P_CRC, TYPE_STM32F4xx_CRC, 0x40023000),
130-
PER_LN(P_RTC, TYPE_STM32F2XX_RTC, 0x40002800),
131-
PER_LN(P_ITM, TYPE_STM32F4xx_ITM, 0xE0000000),
132-
PER_LN(P_DWT, TYPE_STM32F4xx_DWT, 0xE0001000),
133-
PER_LN(P_PWR, TYPE_STM32F2XX_PWR, 0x40007000),
130+
PER_LNF(P_RTC, TYPE_STM32F2XX_RTC, 0x40002800, PERIPH_CFG_FLAG_NON_STM32P),
131+
PER_LNF(P_ITM, TYPE_STM32F4xx_ITM, 0xE0000000, PERIPH_CFG_FLAG_NON_STM32P),
132+
PER_LNF(P_DWT, TYPE_STM32F4xx_DWT, 0xE0001000, PERIPH_CFG_FLAG_NON_STM32P),
133+
PER_LNF(P_PWR, TYPE_STM32F2XX_PWR, 0x40007000, PERIPH_CFG_FLAG_NON_STM32P),
134134
PER_LNI(P_RNG, TYPE_STM32F4XX_RNG, 0x50060800, F4xx_HASH_RNG_IRQ),
135135
PER_LN(P_OTP, TYPE_STM32F4xx_OTP, 0x1FFF7800),
136136
PER_LNI(P_USBHS, TYPE_STM32F4xx_USB, 0x40040000, F4xx_OTG_HS_IRQ),

hw/arm/prusa/stm32_chips/stm32g070xx.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -133,7 +133,7 @@ static const stm32_soc_cfg_t stm32g070xx_cfg =
133133
PER_LNI(P_ADC1, TYPE_STM32G070_ADC, 0x40012400, G070_ADC_IRQ),
134134
PER_LN(P_ADCC, TYPE_STM32G070_ADCC, 0x40012400 + 0x308),
135135

136-
PER_LNI(P_RCC, TYPE_STM32G070_RCC, 0x40021000, G070_RCC_IRQ),
136+
PER_LNIF(P_RCC, TYPE_STM32G070_RCC, 0x40021000, PERIPH_CFG_FLAG_NON_STM32P, G070_RCC_IRQ),
137137
PER_LNI(P_FINT, TYPE_STM32G070_FINT, 0x40022000, G070_FLASH_IRQ),
138138
PER_LN(P_IWDG, TYPE_STM32G070_IWDG, 0x40003000),
139139
PER_LN(P_CRC, TYPE_STM32G070_CRC, 0x40023000),

hw/arm/prusa/stm32_common/stm32_chip_macros.h

+12-3
Original file line numberDiff line numberDiff line change
@@ -5,17 +5,26 @@
55
#include "stm32_shared.h"
66
#include "hw/core/split-irq.h"
77

8+
enum {
9+
PERIPH_CFG_FLAG_NONE = 0,
10+
PERIPH_CFG_FLAG_NON_STM32P = 1,
11+
};
12+
813
// Add a single-line scalar entry with id and base address only.
9-
#define PER_LN(id, typename, addr) [STM32_##id] = {typename, addr, 0, {-1} }
10-
// Add a single-line scalar entry with id, base address, and IRQ
11-
#define PER_LNI(id, typename, addr, ...) [STM32_##id] = {typename, addr, 0, {__VA_ARGS__, -1}}
14+
#define PER_LN(id, typename, addr) [STM32_##id] = {typename, addr, 0, PERIPH_CFG_FLAG_NONE, {-1} }
15+
// Add a single-line scalar entry with id, flags, and base address only.
16+
#define PER_LNF(id, typename, addr, flags) [STM32_##id] = {typename, addr, 0, flags, {-1} }
1217
// Add a single-line scalar entry with id, base address, and IRQ vector
18+
#define PER_LNI(id, typename, addr, ...) [STM32_##id] = {typename, addr, 0, PERIPH_CFG_FLAG_NONE, {__VA_ARGS__, -1}}
19+
// Add a single-line scalar entry with id, base address, flags, and IRQ vector
20+
#define PER_LNIF(id, typename, addr, flags, ...) [STM32_##id] = {typename, addr, 0, flags, {__VA_ARGS__, -1}}
1321

1422
typedef struct stm32_periph_cfg_t
1523
{
1624
const char* type;
1725
const hwaddr base_addr;
1826
const uint32_t size;
27+
const uint8_t flags;
1928
const int irq[17];
2029
} stm32_periph_cfg_t;
2130

hw/arm/prusa/stm32_common/stm32_common.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -284,7 +284,7 @@ extern void stm32_soc_realize_peripheral(DeviceState* soc_state, stm32_periph_t
284284
sysbus_mmio_map(SYS_BUS_DEVICE(s->perhiperhals[id]), 0, cfg->base_addr);
285285
}
286286
}
287-
if (id > STM32_P_RCC && stm32_rcc_if_has_clk(STM32_PERIPHERAL(s->perhiperhals[id])))
287+
if ((cfg->flags & PERIPH_CFG_FLAG_NON_STM32P) == 0 && stm32_rcc_if_has_clk(STM32_PERIPHERAL(s->perhiperhals[id])))
288288
{
289289
stm32_rcc_if_set_periph_clk_irq(STM32_PERIPHERAL(s->perhiperhals[id]), qdev_get_gpio_in_named(s->perhiperhals[id],"clock-change",0));
290290
}

0 commit comments

Comments
 (0)