From f8dd880d3211c31e91c2ac8fbf15118543af77f4 Mon Sep 17 00:00:00 2001 From: Nascs Fang Date: Mon, 5 Feb 2024 15:19:15 +0800 Subject: [PATCH 1/4] cm3 io: add waveshare spi lcd support Signed-off-by: Nascs Fang --- .../arm64/boot/dts/rockchip/overlays/Makefile | 1 + .../rk3568-spi3-m0-cs0-waveshare35.dts | 60 +++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile index 2ed92a03..3ecb7c19 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile @@ -186,6 +186,7 @@ dtb-$(CONFIG_CLK_RK3568) += \ rk3568-spi1-m1-cs0-spidev.dtbo \ rk3568-spi3-m0-cs0-mcp2515.dtbo \ rk3568-spi3-m0-cs0-spidev.dtbo \ + rk3568-spi3-m0-cs0-waveshare35.dtbo \ rk3568-spi3-m0-cs1-spidev.dtbo \ rk3568-spi3-m1-cs0-enc28j60.dtbo \ rk3568-spi3-m1-cs0-mcp2515-gpio4_d1.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts new file mode 100644 index 00000000..4c63d13f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts @@ -0,0 +1,60 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include + +/ { + metadata { + title = "Enable Waveshare 3.5 inch Display on SPI3"; + compatible = "radxa,cm3-io", "radxa,cm3-rpi-cm4-io"; + category = "misc"; + exclusive = "GPIO4_A6", "GPIO3_C6", "GPIO3_D3", "GPIO0_C7", "GPIO4_B0", "GPIO4_B2", "GPIO4_B3"; + description = "Enable Waveshare 3.5 inch Display on SPI3."; + }; + + fragment@0 { + target = <&spi3>; + + __overlay__ { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "high_speed"; + pinctrl-0 = <&spi3m0_cs0 &spi3m0_pins>; + pinctrl-1 = <&spi3m0_cs0 &spi3m0_pins_hs>; + max-freq = <16000000>; + + ili9486@0 { + compatible = "ilitek,ili9486"; + reg = <0>; + spi-max-frequency = <16000000>; + txbuflen = <32768>; + rotate = <90>; + bgr = <0>; + fps = <30>; + buswidth = <8>; + regwidth = <16>; + reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; + debug = <0>; + }; + + ads7846@1 { + compatible = "ti,ads7846"; + status = "okay"; + reg = <1>; + id = <1>; + spi-max-frequency = <2000000>; + interrupts = <23 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio0>; + pendown-gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + ti,x-plate-ohms = /bits/ 16 <60>; + ti,pressure-max = /bits/ 16 <255>; + ti,swap-xy = <0>; + vcc-supply = <&vcc5v0_sys>; + }; + }; + }; +}; From baf2d04184ebd2bef75d9d520b013f205fc826fc Mon Sep 17 00:00:00 2001 From: Nascs Fang Date: Mon, 5 Feb 2024 15:19:57 +0800 Subject: [PATCH 2/4] cm5 io: add waveshare spi lcd support Signed-off-by: Nascs Fang --- .../arm64/boot/dts/rockchip/overlays/Makefile | 1 + .../rk3588-spi0-m1-cs0-waveshare35.dts | 59 +++++++++++++++++++ 2 files changed, 60 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile index 3ecb7c19..b4ac35b8 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile @@ -337,6 +337,7 @@ dtb-$(CONFIG_CLK_RK3588) += \ rk3588-spi0-m0-cs0-spidev.dtbo \ rk3588-spi0-m1-cs0-mcp2515-8mhz.dtbo \ rk3588-spi0-m1-cs0-spidev.dtbo \ + rk3588-spi0-m1-cs0-waveshare35.dtbo \ rk3588-spi0-m1-cs1-spidev.dtbo \ rk3588-spi0-m2-cs0-mcp2515-8mhz.dtbo \ rk3588-spi0-m2-cs0-spidev.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts new file mode 100644 index 00000000..9daf6c14 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts @@ -0,0 +1,59 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include + +/ { + metadata { + title = "Enable Waveshare 3.5 inch Display on SPI0"; + compatible = "radxa,cm5-io"; + category = "misc"; + exclusive = "GPIO1_B1", "GPIO1_D5", "GPIO4_A0", "GPIO4_A1", "GPIO4_A2", "GPIO4_A6", "GPIO4_B2" ; + description = "Enable Waveshare 3.5 inch Display on SPI0."; + }; + + fragment@0 { + target = <&spi0>; + + __overlay__ { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0m1_cs0 &spi0m1_pins>; + max-freq = <16000000>; + + ili9486@0 { + compatible = "ilitek,ili9486"; + reg = <0>; + spi-max-frequency = <16000000>; + txbuflen = <32768>; + rotate = <90>; + bgr = <0>; + fps = <30>; + buswidth = <8>; + regwidth = <16>; + reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; // GPIO1_B1 + dc-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; // GPIO1_D5 + debug = <0>; + }; + + ads7846@1 { + compatible = "ti,ads7846"; + status = "okay"; + reg = <1>; + id = <1>; + spi-max-frequency = <2000000>; + interrupt-parent = <&gpio4>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + pendown-gpio = <&gpio4 RK_PA6 0>; + ti,x-plate-ohms = /bits/ 16 <60>; + ti,pressure-max = /bits/ 16 <255>; + ti,swap-xy = <0>; + vcc-supply = <&vcc5v0_sys>; + }; + }; + }; +}; From 312fe18bd70b5e60b79200e11c46c6c2d4ea9716 Mon Sep 17 00:00:00 2001 From: Nascs Fang Date: Mon, 5 Feb 2024 16:26:17 +0800 Subject: [PATCH 3/4] fix: Replacing a number with a constant Signed-off-by: Nascs Fang --- .../boot/dts/rockchip/overlays/rk3399-spi1-waveshare35.dts | 2 +- .../dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts | 2 +- .../dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3399-spi1-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3399-spi1-waveshare35.dts index faddf822..0123c1e0 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3399-spi1-waveshare35.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3399-spi1-waveshare35.dts @@ -64,7 +64,7 @@ reg = <1>; id = <1>; spi-max-frequency = <2000000>; - interrupts = <18 2>; + interrupts = ; interrupt-parent = <&gpio4>; pendown-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; ti,x-plate-ohms = /bits/ 16 <60>; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts index 4c63d13f..dc8f001b 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi3-m0-cs0-waveshare35.dts @@ -47,7 +47,7 @@ reg = <1>; id = <1>; spi-max-frequency = <2000000>; - interrupts = <23 IRQ_TYPE_EDGE_FALLING>; + interrupts = ; interrupt-parent = <&gpio0>; pendown-gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; ti,x-plate-ohms = /bits/ 16 <60>; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts index 9daf6c14..f31b17ad 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts @@ -47,7 +47,7 @@ id = <1>; spi-max-frequency = <2000000>; interrupt-parent = <&gpio4>; - interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + interrupts = ; pendown-gpio = <&gpio4 RK_PA6 0>; ti,x-plate-ohms = /bits/ 16 <60>; ti,pressure-max = /bits/ 16 <255>; From ef0122fdfb6f6017b2abc25edfa764d881f33405 Mon Sep 17 00:00:00 2001 From: William Norman <105425502+nascs@users.noreply.github.com> Date: Mon, 5 Feb 2024 17:02:46 +0800 Subject: [PATCH 4/4] Apply suggestions from code review Co-authored-by: ZHANG Yuntian --- .../dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts index f31b17ad..b3874c16 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts @@ -48,7 +48,7 @@ spi-max-frequency = <2000000>; interrupt-parent = <&gpio4>; interrupts = ; - pendown-gpio = <&gpio4 RK_PA6 0>; + pendown-gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ti,x-plate-ohms = /bits/ 16 <60>; ti,pressure-max = /bits/ 16 <255>; ti,swap-xy = <0>;