From 6c251a3dcf30cc89208939012fe6fed82d004d67 Mon Sep 17 00:00:00 2001
From: Tanuj Khattar <tanujkhattar@google.com>
Date: Thu, 22 Jun 2023 14:29:01 -0700
Subject: [PATCH] Remove numpy<1.24 restriction from requirements.txt (#6149)

---
 cirq-core/requirements.txt             | 2 +-
 cirq-ft/cirq_ft/algos/and_gate.ipynb   | 5 +++--
 cirq-ft/cirq_ft/algos/and_gate_test.py | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/cirq-core/requirements.txt b/cirq-core/requirements.txt
index cc435e4ae3d..13d6ef1d7fb 100644
--- a/cirq-core/requirements.txt
+++ b/cirq-core/requirements.txt
@@ -6,7 +6,7 @@ backports.cached_property~=1.0.1; python_version < '3.8'
 duet~=0.2.8
 matplotlib~=3.0
 networkx>=2.4
-numpy>=1.16,<1.24
+numpy>=1.16
 pandas
 sortedcontainers~=2.0
 scipy
diff --git a/cirq-ft/cirq_ft/algos/and_gate.ipynb b/cirq-ft/cirq_ft/algos/and_gate.ipynb
index f44d62223d2..e8491170a98 100644
--- a/cirq-ft/cirq_ft/algos/and_gate.ipynb
+++ b/cirq-ft/cirq_ft/algos/and_gate.ipynb
@@ -111,12 +111,14 @@
    "metadata": {},
    "outputs": [],
    "source": [
+    "import numpy as np\n",
+    "\n",
     "input_states = [(a, b, 0) for a, b in itertools.product([0, 1], repeat=2)]\n",
     "output_states = [(a, b, a & b) for a, b, _ in input_states]\n",
     "\n",
     "\n",
     "for inp, out in zip(input_states, output_states):\n",
-    "    result = cirq.Simulator().simulate(c2, initial_state=inp)\n",
+    "    result = cirq.Simulator(dtype=np.complex128).simulate(c2, initial_state=inp)\n",
     "    print(inp, '->', result.dirac_notation())\n",
     "    assert result.dirac_notation()[1:-1] == \"\".join(str(x) for x in out)"
    ]
@@ -128,7 +130,6 @@
    "metadata": {},
    "outputs": [],
    "source": [
-    "import numpy as np\n",
     "inds, = np.where(abs(result.final_state_vector) > 1e-8)\n",
     "assert len(inds) == 1\n",
     "ind, = inds\n",
diff --git a/cirq-ft/cirq_ft/algos/and_gate_test.py b/cirq-ft/cirq_ft/algos/and_gate_test.py
index 65cd9e96daa..117f3a6ccac 100644
--- a/cirq-ft/cirq_ft/algos/and_gate_test.py
+++ b/cirq-ft/cirq_ft/algos/and_gate_test.py
@@ -55,7 +55,7 @@ def test_multi_controlled_and_gate(cv: List[int]):
 
     for input_control in input_controls:
         initial_state = input_control + [0] * (r['ancilla'].bitsize + 1)
-        result = cirq.Simulator().simulate(
+        result = cirq.Simulator(dtype=np.complex128).simulate(
             circuit, initial_state=initial_state, qubit_order=qubit_order
         )
         expected_output = np.asarray([0, 1] if input_control == cv else [1, 0])