@@ -245,7 +245,7 @@ int SoftwareSerial::available() {
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return avail;
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}
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- void ICACHE_RAM_ATTR SoftwareSerial::preciseDelay (bool sync) {
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+ void IRAM_ATTR SoftwareSerial::preciseDelay (bool sync) {
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if (!sync )
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{
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// Reenable interrupts while delaying to avoid other tasks piling up
@@ -276,7 +276,7 @@ void ICACHE_RAM_ATTR SoftwareSerial::preciseDelay(bool sync) {
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m_periodStart = ESP.getCycleCount ();
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}
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- void ICACHE_RAM_ATTR SoftwareSerial::writePeriod (
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+ void IRAM_ATTR SoftwareSerial::writePeriod (
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uint32_t dutyCycle, uint32_t offCycle, bool withStopBit) {
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preciseDelay (true );
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if (dutyCycle)
@@ -305,7 +305,7 @@ size_t SoftwareSerial::write(const uint8_t* buffer, size_t size) {
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return write (buffer, size, m_parityMode);
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}
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- size_t ICACHE_RAM_ATTR SoftwareSerial::write (const uint8_t * buffer, size_t size, SoftwareSerialParity parity) {
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+ size_t IRAM_ATTR SoftwareSerial::write (const uint8_t * buffer, size_t size, SoftwareSerialParity parity) {
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if (m_rxValid) { rxBits (); }
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if (!m_txValid) { return -1 ; }
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@@ -525,7 +525,7 @@ void SoftwareSerial::rxBits(const uint32_t& isrCycle) {
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}
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}
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- void ICACHE_RAM_ATTR SoftwareSerial::rxBitISR (SoftwareSerial* self) {
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+ void IRAM_ATTR SoftwareSerial::rxBitISR (SoftwareSerial* self) {
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uint32_t curCycle = ESP.getCycleCount ();
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bool level = digitalRead (self->m_rxPin );
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@@ -534,7 +534,7 @@ void ICACHE_RAM_ATTR SoftwareSerial::rxBitISR(SoftwareSerial* self) {
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if (!self->m_isrBuffer ->push ((curCycle | 1U ) ^ !level)) self->m_isrOverflow .store (true );
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}
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- void ICACHE_RAM_ATTR SoftwareSerial::rxBitSyncISR (SoftwareSerial* self) {
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+ void IRAM_ATTR SoftwareSerial::rxBitSyncISR (SoftwareSerial* self) {
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uint32_t start = ESP.getCycleCount ();
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uint32_t wait = self->m_bitCycles - 172U ;
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