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| 1 | +<?xml version="1" encoding="UTF-8"?> |
| 2 | +<!DOCTYPE gowin-fpga-project> |
| 3 | +<Project> |
| 4 | + <Template>FPGA</Template> |
| 5 | + <Version>5</Version> |
| 6 | + <Device name="GW5AT-60B" pn="GW5AT-LV60PG484AC1/I0">gw5at60b-002</Device> |
| 7 | + <FileList> |
| 8 | + <File path="src/common/dpram32_block.v" type="file.verilog" enable="1"/> |
| 9 | + <File path="src/common/dpram_block.v" type="file.verilog" enable="1"/> |
| 10 | + <File path="src/common/dual_clk_fifo.v" type="file.verilog" enable="1"/> |
| 11 | + <File path="src/common/eprocreg_gba.sv" type="file.verilog" enable="1"/> |
| 12 | + <File path="src/iosys/iosys_picorv32.v" type="file.verilog" enable="1"/> |
| 13 | + |
| 14 | + <File path="src/cpu/gba_cpu.v" type="file.verilog" enable="1"/> |
| 15 | + <File path="src/cpu/gba_cpu_thumbdecoder.v" type="file.verilog" enable="1"/> |
| 16 | + <File path="src/cpu/gba_interrupts.v" type="file.verilog" enable="1"/> |
| 17 | + <File path="src/gba2hdmi.sv" type="file.verilog" enable="1"/> |
| 18 | + <File path="src/gbatang_top.sv" type="file.verilog" enable="1"/> |
| 19 | + <File path="src/gpu/gba_drawer_merge.v" type="file.verilog" enable="1"/> |
| 20 | + <File path="src/gpu/gba_drawer_mode0.v" type="file.verilog" enable="1"/> |
| 21 | + <File path="src/gpu/gba_drawer_mode2.v" type="file.verilog" enable="1"/> |
| 22 | + <File path="src/gpu/gba_drawer_mode345.v" type="file.verilog" enable="1"/> |
| 23 | + <File path="src/gpu/gba_drawer_obj.sv" type="file.verilog" enable="1"/> |
| 24 | + <File path="src/gpu/gba_gpu.v" type="file.verilog" enable="1"/> |
| 25 | + <File path="src/gpu/gba_gpu_colorshade.sv" type="file.verilog" enable="1"/> |
| 26 | + <File path="src/gpu/gba_gpu_drawer.v" type="file.verilog" enable="1"/> |
| 27 | + <File path="src/gpu/gba_gpu_timing.v" type="file.verilog" enable="1"/> |
| 28 | + <File path="src/gpu/gba_timer.v" type="file.verilog" enable="1"/> |
| 29 | + <File path="src/gpu/gba_timer_module.v" type="file.verilog" enable="1"/> |
| 30 | + <File path="src/gpu/linebuffer.v" type="file.verilog" enable="1"/> |
| 31 | + <File path="src/gpu/vram_hi.v" type="file.verilog" enable="1"/> |
| 32 | + <File path="src/gpu/vram_lo.v" type="file.verilog" enable="1"/> |
| 33 | + <File path="src/hdmi/audio_clock_regeneration_packet.sv" type="file.verilog" enable="1"/> |
| 34 | + <File path="src/hdmi/audio_info_frame.sv" type="file.verilog" enable="1"/> |
| 35 | + <File path="src/hdmi/audio_sample_packet.sv" type="file.verilog" enable="1"/> |
| 36 | + <File path="src/hdmi/auxiliary_video_information_info_frame.sv" type="file.verilog" enable="1"/> |
| 37 | + <File path="src/hdmi/hdmi.sv" type="file.verilog" enable="1"/> |
| 38 | + <File path="src/hdmi/packet_assembler.sv" type="file.verilog" enable="1"/> |
| 39 | + <File path="src/hdmi/packet_picker.sv" type="file.verilog" enable="1"/> |
| 40 | + <File path="src/hdmi/serializer.sv" type="file.verilog" enable="1"/> |
| 41 | + <File path="src/hdmi/source_product_description_info_frame.sv" type="file.verilog" enable="1"/> |
| 42 | + <File path="src/hdmi/tmds_channel.sv" type="file.verilog" enable="1"/> |
| 43 | + <File path="src/iosys/gowin_dpb_menu.v" type="file.verilog" enable="1"/> |
| 44 | + <File path="src/iosys/picorv32.v" type="file.verilog" enable="1"/> |
| 45 | + <File path="src/iosys/simplespimaster.v" type="file.verilog" enable="1"/> |
| 46 | + <File path="src/iosys/simpleuart.v" type="file.verilog" enable="1"/> |
| 47 | + <File path="src/iosys/spi_master.v" type="file.verilog" enable="1"/> |
| 48 | + <File path="src/iosys/spiflash.v" type="file.verilog" enable="1"/> |
| 49 | + <File path="src/iosys/textdisp.v" type="file.verilog" enable="1"/> |
| 50 | + <File path="src/m138k/fb.v" type="file.verilog" enable="1"/> |
| 51 | + <File path="src/m60k/pll_27.v" type="file.verilog" enable="1"/> |
| 52 | + <File path="src/m60k/pll_33.v" type="file.verilog" enable="1"/> |
| 53 | + <File path="src/m60k/pll_74.v" type="file.verilog" enable="1"/> |
| 54 | + <File path="src/memory/gba_dma.v" type="file.verilog" enable="1"/> |
| 55 | + <File path="src/memory/gba_dma_module.sv" type="file.verilog" enable="1"/> |
| 56 | + <File path="src/memory/gba_eeprom.sv" type="file.verilog" enable="1"/> |
| 57 | + <File path="src/memory/gba_flash_sram.sv" type="file.verilog" enable="1"/> |
| 58 | + <File path="src/memory/gba_memory.sv" type="file.verilog" enable="1"/> |
| 59 | + <File path="src/memory/mem_eeprom.v" type="file.verilog" enable="1"/> |
| 60 | + <File path="src/memory/mem_iwram.v" type="file.verilog" enable="1"/> |
| 61 | + <File path="src/memory/rv_sdram_adapter.v" type="file.verilog" enable="1"/> |
| 62 | + <File path="src/memory/sdram_gba.v" type="file.verilog" enable="1"/> |
| 63 | + <File path="src/peripherals/controller_ds2.sv" type="file.verilog" enable="1"/> |
| 64 | + <File path="src/peripherals/dualshock_controller.v" type="file.verilog" enable="1"/> |
| 65 | + <File path="src/peripherals/gba_joypad.v" type="file.verilog" enable="1"/> |
| 66 | + <File path="src/sound/gba_sound.v" type="file.verilog" enable="1"/> |
| 67 | + <File path="src/sound/gba_sound_ch1.v" type="file.verilog" enable="1"/> |
| 68 | + <File path="src/sound/gba_sound_ch3.v" type="file.verilog" enable="1"/> |
| 69 | + <File path="src/sound/gba_sound_ch4.v" type="file.verilog" enable="1"/> |
| 70 | + <File path="src/sound/gba_sound_dma.v" type="file.verilog" enable="1"/> |
| 71 | + <File path="src/console60k/gbatang.cst" type="file.cst" enable="1"/> |
| 72 | + <File path="src/gbatang.sdc" type="file.sdc" enable="1"/> |
| 73 | + <File path="src/eeprom.gao" type="file.gao" enable="0"/> |
| 74 | + <File path="src/gbatang.gao" type="file.gao" enable="0"/> |
| 75 | + <File path="src/gpu.gao" type="file.gao" enable="0"/> |
| 76 | + <File path="src/iosys.gao" type="file.gao" enable="0"/> |
| 77 | + </FileList> |
| 78 | +</Project> |
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