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nand2marionand2mario
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add m60k project files. save 16 bram by using dpx18b in framebuffer
1 parent e4d1244 commit 3d9a353

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7 files changed

+6515
-15
lines changed

7 files changed

+6515
-15
lines changed

‎gbatang.gprj

+3-2
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@
4545
<File path="src/iosys/spi_master.v" type="file.verilog" enable="1"/>
4646
<File path="src/iosys/spiflash.v" type="file.verilog" enable="1"/>
4747
<File path="src/iosys/textdisp.v" type="file.verilog" enable="1"/>
48+
<File path="src/m138k/fb.v" type="file.verilog" enable="1"/>
4849
<File path="src/m138k/pll_27.v" type="file.verilog" enable="1"/>
4950
<File path="src/m138k/pll_33.v" type="file.verilog" enable="1"/>
5051
<File path="src/m138k/pll_74.v" type="file.verilog" enable="1"/>
@@ -68,9 +69,9 @@
6869
<File path="src/m138k/m138k.cst" type="file.cst" enable="1"/>
6970
<File path="src/m138kpro.cst" type="file.cst" enable="0"/>
7071
<File path="src/gbatang.sdc" type="file.sdc" enable="1"/>
72+
<File path="src/eeprom.gao" type="file.gao" enable="0"/>
7173
<File path="src/gbatang.gao" type="file.gao" enable="0"/>
72-
<File path="src/iosys.gao" type="file.gao" enable="0"/>
7374
<File path="src/gpu.gao" type="file.gao" enable="0"/>
74-
<File path="src/eeprom.gao" type="file.gao" enable="0"/>
75+
<File path="src/iosys.gao" type="file.gao" enable="0"/>
7576
</FileList>
7677
</Project>

‎impl/gbatang_m60k_process_config.json

+90
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,90 @@
1+
{
2+
"BACKGROUND_PROGRAMMING" : "off",
3+
"COMPRESS" : false,
4+
"CPU" : false,
5+
"CRC_CHECK" : true,
6+
"Clock_Route_Order" : 0,
7+
"Convert_SDP32_36_to_SDP16_18" : true,
8+
"Correct_Hold_Violation" : true,
9+
"DONE" : false,
10+
"DOWNLOAD_SPEED" : "default",
11+
"Disable_Insert_Pad" : false,
12+
"ENABLE_CTP" : false,
13+
"ENABLE_MERGE_MODE" : false,
14+
"ENCRYPTION_KEY" : false,
15+
"ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
16+
"ERROR_DECTION_AND_CORRECTION" : false,
17+
"ERROR_DECTION_ONLY" : false,
18+
"ERROR_INJECTION" : false,
19+
"EXTERNAL_MASTER_CONFIG_CLOCK" : false,
20+
"Enable_DSRM" : false,
21+
"FORMAT" : "binary",
22+
"FREQUENCY_DIVIDER" : "1",
23+
"Generate_Constraint_File_of_Ports" : false,
24+
"Generate_IBIS_File" : false,
25+
"Generate_Plain_Text_Timing_Report" : false,
26+
"Generate_Post_PNR_Simulation_Model_File" : false,
27+
"Generate_Post_Place_File" : false,
28+
"Generate_SDF_File" : false,
29+
"Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
30+
"Global_Freq" : "default",
31+
"GwSyn_Loop_Limit" : 2000,
32+
"HOTBOOT" : false,
33+
"I2C" : false,
34+
"I2C_SLAVE_ADDR" : "00",
35+
"IncludePath" : [
36+
"src/common"
37+
],
38+
"Incremental_Compile" : "",
39+
"Initialize_Primitives" : false,
40+
"JTAG" : false,
41+
"MODE_IO" : false,
42+
"MSPI" : false,
43+
"MSPI_JUMP" : false,
44+
"MULTIBOOT_ADDRESS_WIDTH" : "24",
45+
"MULTIBOOT_MODE" : "Normal",
46+
"MULTIBOOT_SPI_FLASH_ADDRESS" : "000000",
47+
"MULTIJUMP_ADDRESS_WIDTH" : "24",
48+
"MULTIJUMP_MODE" : "Normal",
49+
"MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
50+
"Multi_Boot" : false,
51+
"OUTPUT_BASE_NAME" : "gbatang",
52+
"POWER_ON_RESET_MONITOR" : true,
53+
"PRINT_BSRAM_VALUE" : true,
54+
"PROGRAM_DONE_BYPASS" : false,
55+
"PlaceInRegToIob" : true,
56+
"PlaceIoRegToIob" : true,
57+
"PlaceOutRegToIob" : true,
58+
"Place_Option" : "0",
59+
"Process_Configuration_Verion" : "1.0",
60+
"Promote_Physical_Constraint_Warning_to_Error" : true,
61+
"READY" : false,
62+
"RECONFIG_N" : false,
63+
"Ram_RW_Check" : false,
64+
"Replicate_Resources" : false,
65+
"Report_Auto-Placed_Io_Information" : false,
66+
"Route_Maxfan" : 23,
67+
"Route_Option" : "0",
68+
"Run_Timing_Driven" : true,
69+
"SECURE_MODE" : false,
70+
"SECURITY_BIT" : true,
71+
"SEU_HANDLER" : false,
72+
"SEU_HANDLER_CHECKSUM" : false,
73+
"SEU_HANDLER_MODE" : "auto",
74+
"SSPI" : true,
75+
"STOP_SEU_HANDLER" : false,
76+
"Show_All_Warnings" : false,
77+
"Synthesize_tool" : "GowinSyn",
78+
"TclPre" : "",
79+
"TopModule" : "gbatang_top",
80+
"USERCODE" : "default",
81+
"Unused_Pin" : "As_input_tri_stated_with_pull_up",
82+
"VCC" : "0.9",
83+
"VCCAUX" : "3.3",
84+
"VCCX" : "3.3",
85+
"VHDL_Standard" : "VHDL_Std_2008",
86+
"Verilog_Standard" : "Vlg_Std_Sysv2017",
87+
"WAKE_UP" : "0",
88+
"show_all_warnings" : false,
89+
"turn_off_bg" : false
90+
}

‎src/gba2hdmi.sv

+17-13
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,6 @@ assign overlay_y = cy;
7171
//
7272
localparam MEM_DEPTH=240*160; // 38400, 37K words, 16-bit address
7373

74-
logic [17:0] mem [0:MEM_DEPTH-1];
7574
logic [$clog2(MEM_DEPTH)-1:0] mem_portA_addr;
7675
logic [17:0] mem_portA_wdata;
7776
logic mem_portA_we;
@@ -83,21 +82,26 @@ logic initializing = 1;
8382
logic [7:0] init_y = 0;
8483
logic [7:0] init_x = 0;
8584

85+
fb u_fb(
86+
.clka(clk), .clkb(clk), .reseta('b0), .resetb(1'b0), .cea('b1), .ceb('b1),
87+
// port A write
88+
.ada(mem_portA_addr), .douta(), .ocea(1'b0), .wrea(mem_portA_we), .dina(mem_portA_wdata),
89+
// port B read
90+
.adb(mem_portB_addr), .doutb(mem_portB_rdata), .oceb(1'b1), .wreb('b0), .dinb('b0)
91+
);
92+
93+
// logic [17:0] mem [0:MEM_DEPTH-1];
8694
// BRAM port A read/write
87-
always_ff @(posedge clk) begin
88-
if (mem_portA_we) begin
89-
mem[mem_portA_addr] <= mem_portA_wdata;
90-
end
91-
end
95+
// always_ff @(posedge clk) begin
96+
// if (mem_portA_we) begin
97+
// mem[mem_portA_addr] <= mem_portA_wdata;
98+
// end
99+
// end
92100

93101
// BRAM port B read
94-
always_ff @(posedge clk_pixel) begin
95-
mem_portB_rdata <= mem[mem_portB_addr];
96-
end
97-
98-
initial begin
99-
// $readmemb("background.txt", mem);
100-
end
102+
// always_ff @(posedge clk_pixel) begin
103+
// mem_portB_rdata <= mem[mem_portB_addr];
104+
// end
101105

102106

103107
//

‎src/m138k/fb.ipc

+22
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
1+
[General]
2+
ipc_version=4
3+
file=fb
4+
module=fb
5+
target_device=gw5ast138b-011
6+
type=ram_dpb
7+
version=1.0
8+
9+
[Config]
10+
Area=true
11+
BYTE_SIZE=0
12+
DEPTH_A=38400
13+
DEPTH_B=38400
14+
LANG=0
15+
READ_A=0
16+
READ_B=0
17+
RESET_MODE=true
18+
Speed=false
19+
WIDTH_A=18
20+
WIDTH_B=18
21+
WRITE_A=0
22+
WRITE_B=0

‎src/m138k/fb.mod

+24
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
-series GW5AST
2+
-device GW5AST-138
3+
-device_version B
4+
-package PBGA484A
5+
-part_number GW5AST-LV138PG484AC1/I0
6+
7+
8+
-mod_name fb
9+
-file_name fb
10+
-path F:/Gowin/dev/gbatang/src/m138k/
11+
-type RAM_DP
12+
-file_type vlg
13+
-bram_b true
14+
-dev_type GW5AST-138B
15+
-depth_0 38400
16+
-depth_1 38400
17+
-width_0 18
18+
-width_1 18
19+
-read_mode_0 bypass
20+
-read_mode_1 bypass
21+
-write_mode_0 normal
22+
-write_mode_1 normal
23+
-speed false
24+
-reset_mode sync

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