matty/20180225a/20180225a-Server.ipynb

{
 "cells": [
  {
   "cell_type": "code",
   "execution_count": 1,
   "metadata": {},
   "outputs": [],
   "source": [
    "#!/usr/bin/python\n",
    "import spidev\n",
    "import RPi.GPIO as GPIO\n",
    "import time\n",
    "\n",
    "import numpy as np\n",
    "import matplotlib\n",
    "matplotlib.use('Agg')\n",
    "import matplotlib.pyplot as plt\n",
    "\n",
    "def StartUp():\n",
    "    GPIO.setmode(GPIO.BCM)\n",
    "    PRESET = 25\n",
    "    IO4 = 26\n",
    "    GPIO.setup(PRESET,GPIO.OUT)\n",
    "    GPIO.setup(IO4,GPIO.IN, pull_up_down=GPIO.PUD_DOWN)\n",
    "    print \"Reset 25 - Low 1s\"\n",
    "    GPIO.output(PRESET,GPIO.LOW)\n",
    "    time.sleep(3)\n",
    "    print \"Reset 25 - High 0.2s\"\n",
    "    GPIO.output(PRESET,GPIO.HIGH)\n",
    "    time.sleep(0.2)\n",
    "\n",
    "    spi = spidev.SpiDev()\n",
    "    spi.open(0,1) # CS2 - FPGA, on CE1 = IO4\n",
    "    spi.mode = 0b01\n",
    "    print \"spi.cshigh is \" + str(spi.cshigh)\n",
    "    print \"spi mode is \" + str(spi.mode)\n",
    "    spi.max_speed_hz = 2000000\n",
    "    print \"spi maxspeed is \"+str(spi.max_speed_hz)+\"hz\"\n",
    "    return spi\n",
    "\n",
    "def TestSPI(spi,ncycles):\n",
    "    i = 0\n",
    "    while i < ncycles:\n",
    "        WriteFPGA(spi,0xEB,0x01) # 0: single mode 1 continious mode\n",
    "        time.sleep(0.5)\n",
    "        WriteFPGA(spi,0xEB,0x00) # 0: single mode 1 continious mode\n",
    "        time.sleep(0.5)  \n",
    "        i = i+1\n",
    "\n",
    "def LoopSPI(spi):\n",
    "    while 1:\n",
    "        WriteFPGA(spi,0xEB,0x01) # 0: single mode 1 continious mode\n",
    "        WriteFPGA(spi,0xEB,0x00) # 0: single mode 1 continious mode\n",
    "\n",
    "def LoopAcq(spi):\n",
    "    while 1:\n",
    "        WriteFPGA(spi,0xEB,0x00) # Doing 1 shot \n",
    "        WriteFPGA(spi,0xEF,0x01) # Cleaning memory pointer\n",
    "        WriteFPGA(spi,0xEA,0x01) # Software Trig : As to be clear by software\n",
    "        time.sleep(0.1) # sleep 10ms\n",
    "    \n",
    "def ClearMem(spi):\n",
    "    WriteFPGA(spi,0xEF,0x01) # To access memory\n",
    "\n",
    "def ConfigSPI(spi):\n",
    "    WriteFPGA(spi,0xE0,0x14) # set sEEPon\n",
    "    WriteFPGA(spi,0xE1,0x00) # set sEEPoff MSB\n",
    "    WriteFPGA(spi,0xE2,0x35) # set sEEPoff LSB\n",
    "    WriteFPGA(spi,0xE3,0x00) # set sEEDelayACQ sEEDelayACQ MSB\n",
    "    WriteFPGA(spi,0xE4,0x05) # set sEEDelayACQ EEDelayACQ LSB\n",
    "    WriteFPGA(spi,0xE5,0x32) # set sEEPeriod MSB // durée de l'acquisition ? \n",
    "    WriteFPGA(spi,0xE6,0xC8) # set sEEPeriod LSB 0x32C8 acq (13000t * 10ns = 130us)\n",
    "    WriteFPGA(spi,0xE7,0x00) # Period of one cycle MSB\n",
    "    WriteFPGA(spi,0xE8,0xC3) # Period of one cycle 15 to 8\n",
    "    WriteFPGA(spi,0xE9,0x50) # Period of one cycle LSB\n",
    "    #WriteFPGA(spi,0xEA,0x00) # Software Trig : As to be clear by software\n",
    "    WriteFPGA(spi,0xEB,0x00) # 0: single mode 1 continious mode\n",
    "    WriteFPGA(spi,0xEC,0x11) # Voltage gain control: 0V to 1V\n",
    "    WriteFPGA(spi,0xED,0x03) # Frequency of ADC acquisition / sEEADC_freq (3 = 16Msps, 1 = 32, 0 = 64, 2 = 21Msps)\n",
    "    WriteFPGA(spi,0xEE,0xA0) # How many cycles in countinious mode\n",
    "    print \"Config FPGA done!\"\n",
    "\n",
    "def WriteFPGA(spi,adress,value):\n",
    "    spi.xfer([0xAA] )\n",
    "    spi.xfer([adress] )\n",
    "    spi.xfer([value] )"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 2,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "Reset 25 - Low 1s\n",
      "Reset 25 - High 0.2s\n",
      "spi.cshigh is False\n",
      "spi mode is 1\n",
      "spi maxspeed is 2000000hz\n",
      "Config FPGA done!\n"
     ]
    }
   ],
   "source": [
    "spi = StartUp()\n",
    "ConfigSPI(spi)\n",
    "N = 0"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 55,
   "metadata": {},
   "outputs": [],
   "source": [
    "#LoopSPI(spi)"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {},
   "outputs": [],
   "source": [
    "#LoopAcq(spi)"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 106,
   "metadata": {},
   "outputs": [],
   "source": [
    "#WriteFPGA(spi,0xEA,0x01) # Software Trig : As to be clear by software"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 107,
   "metadata": {},
   "outputs": [],
   "source": [
    "#WriteFPGA(spi,0xEA,0x01) # Cleaning memory pointer"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 3,
   "metadata": {},
   "outputs": [],
   "source": [
    "TestSPI(spi,3) # LED2 clignote 3x"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 69,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "0x14\n",
      "0xa\n",
      "Poff: 0x0 0xc8\n",
      "hDA: 0x2 0xbc\n",
      "Acq: 0x32 0xc8\n",
      "Period: 0x1 0x86 0xa0\n"
     ]
    }
   ],
   "source": [
    "# Set PulseOn\n",
    "POn = 200 #ns\n",
    "HPon = POn/10\n",
    "print hex(HPon)\n",
    "WriteFPGA(spi,0xE0,HPon) # set sEEPon\n",
    "# Set Lengh between Pon and Poff\n",
    "DeltaPP = 100 #ns\n",
    "HPP =DeltaPP/10\n",
    "print  hex(HPP)\n",
    "WriteFPGA(spi,0xD0,HPP) # set sEEPon\n",
    "# Setting Poff\n",
    "sEEPoff = 2000 #ns\n",
    "POff = sEEPoff/10 \n",
    "POffMSB, POffLSB = 0xFF00&POff/0xFF,0x00FF&POff \n",
    "print \"Poff:\", hex(POffMSB),hex(POffLSB)\n",
    "WriteFPGA(spi,0xE1,POffMSB) # set sEEPon MSB\n",
    "WriteFPGA(spi,0xE2,POffLSB) # set sEEPon LSB\n",
    "\n",
    "# Setting Poff to Acq delay sEEDelayACQ\n",
    "\n",
    "DeltaAcq = 7000 #ns\n",
    "hDA = DeltaAcq/10 \n",
    "hDAMSB, hDALSB = hDA/255 , 0x00FF&hDA \n",
    "print \"hDA:\", hex(hDAMSB),hex(hDALSB)\n",
    "WriteFPGA(spi,0xE3,hDAMSB) # set sEEPon MSB\n",
    "WriteFPGA(spi,0xE4,hDALSB) # set sEEPon LSB\n",
    "\n",
    "# sEEACQ\n",
    "LAcq = 130 #us\n",
    "LAcqNs = LAcq*1000/10 #ns\n",
    "LAcqMSB, LAcqLSB = LAcqNs/256,0x00FF&LAcqNs \n",
    "print \"Acq:\",  hex(LAcqMSB),hex(LAcqLSB)\n",
    "WriteFPGA(spi,0xE5,hDAMSB) # set sEEPon MSB\n",
    "WriteFPGA(spi,0xE6,hDALSB) # set sEEPon LSB\n",
    "\n",
    "# sEEPeriod\n",
    "lEPeriod = 1000 #us\n",
    "lEPNs = lEPeriod*1000/10 #ns\n",
    "EPNsMSB, EPNs, EPNsLSB = 0x00FF&lEPNs/(256*256),0x00FF&lEPNs/256,0x0000FF&lEPNs \n",
    "print \"Period:\",  hex(EPNsMSB),hex(EPNs),hex(EPNsLSB) \n",
    "WriteFPGA(spi,0xE7,EPNsMSB) # Period of one cycle MSB\n",
    "WriteFPGA(spi,0xE8,EPNs) # Period of one cycle 15 to 8\n",
    "WriteFPGA(spi,0xE9,EPNsLSB) # Period of one cycle LSB\n",
    "\n",
    "# sEETrigCounter\n",
    "NAcTrig = 10\n",
    "WriteFPGA(spi,0xEE,NAcTrig) # Period of one cycle LSB\n"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 7,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "10\n",
      "-> 260000 samples\n"
     ]
    }
   ],
   "source": [
    "f = 0x01\n",
    "LAcq = 130 #us\n",
    "WriteFPGA(spi,0xED,f) # Frequency of ADC acquisition / sEEADC_freq (3 = 16Msps, 1 = 32, 0 = 64, 2 = 21Msps)\n",
    "VGA = 0x44\n",
    "NAcTrig = 200 # 200 acquisitions\n",
    "WriteFPGA(spi,0xEC,VGA)\n",
    "WriteFPGA(spi,0xEB,0x01) # Doing several lines\n",
    "WriteFPGA(spi,0xEE,NAcTrig) # Acquire 100 lines\n",
    "WriteFPGA(spi,0xEF,0x01) # Cleaning memory pointer\n",
    "WriteFPGA(spi,0xEA,0x01) # Software Trig : As to be clear by software\n",
    "\n",
    "time.sleep(0.2) # sleep 10ms\n",
    "\n",
    "Fech = int(64/((1+f)))\n",
    "print Fech\n",
    "Nacq = LAcq * Fech * NAcTrig\n",
    "print \"-> \"+str(Nacq) + ' samples' "
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 10,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "1300"
      ]
     },
     "execution_count": 10,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "LAcq * Fech"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 8,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "519990\n",
      "25\n",
      "0\n",
      "1\n",
      "2\n",
      "3\n",
      "4\n",
      "5\n",
      "6\n",
      "7\n",
      "8\n",
      "9\n",
      "10\n",
      "11\n",
      "12\n",
      "13\n",
      "14\n",
      "15\n",
      "16\n",
      "17\n",
      "18\n",
      "19\n",
      "20\n",
      "21\n",
      "22\n",
      "23\n",
      "24\n",
      "25\n",
      "acq done\n"
     ]
    }
   ],
   "source": [
    "spi.max_speed_hz = 9000000\n",
    "A = []\n",
    "limit = 2*Nacq-10\n",
    "x = 20000\n",
    "print limit\n",
    "print limit/x\n",
    "for i in range(limit):\n",
    "    A.append ( spi.xfer([0x00] )[0] )  \n",
    "    if not(i%x):\n",
    "        print len(A)/x\n",
    "a = np.asarray(A).astype(int)\n",
    "print 'acq done'\n",
    "np.savetxt( \"FI-\"+str(NAcTrig)+\"-\"+str(N)+\"-VGA@\"+str(hex(VGA))+\"-spimode\"+str(spi.mode)+\"-\"+str(Fech)+\"msps.csv\", a.astype(int), fmt='%i', delimiter=\";\")\n",
    "N = N+1"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 9,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "259995"
      ]
     },
     "execution_count": 9,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "519990/2"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 25,
   "metadata": {},
   "outputs": [],
   "source": [
    "spi.close() "
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 81,
   "metadata": {},
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "21\n",
      "-> 2730 samples\n"
     ]
    }
   ],
   "source": [
    "f = 0x02\n",
    "WriteFPGA(spi,0xED,f) # Frequency of ADC acquisition / sEEADC_freq (3 = 16Msps, 1 = 32, 0 = 64, 2 = 21Msps)\n",
    "VGA = 0x22\n",
    "WriteFPGA(spi,0xEC,VGA)\n",
    "WriteFPGA(spi,0xEB,0x00) # Doing several lines \n",
    "WriteFPGA(spi,0xEF,0x01) # Cleaning memory pointer\n",
    "WriteFPGA(spi,0xEA,0x01) # Software Trig : As to be clear by software\n",
    "\n",
    "time.sleep(0.2) # sleep 10ms\n",
    "\n",
    "Fech = int(64/((1+f)))\n",
    "print Fech\n",
    "Nacq = LAcq * Fech\n",
    "print \"-> \"+str(Nacq) + ' samples' "
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 82,
   "metadata": {},
   "outputs": [],
   "source": [
    "A = []\n",
    "for i in range(2*Nacq-10):\n",
    "    A.append ( spi.xfer([0x00] )[0] )  \n",
    "a = np.asarray(A).astype(int)\n",
    "\n",
    "np.savetxt( \"One-\"+str(N)+\"-VGA@\"+str(hex(VGA))+\"-spimode\"+str(spi.mode)+\"-\"+str(Fech)+\"msps.csv\", a, delimiter=\";\")\n",
    "N = N+1"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 110,
   "metadata": {},
   "outputs": [
    {
     "data": {
      "text/plain": [
       "2773.3333333333335"
      ]
     },
     "execution_count": 110,
     "metadata": {},
     "output_type": "execute_result"
    }
   ],
   "source": [
    "LAcq * 64.0/3"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {},
   "outputs": [],
   "source": []
  }
 ],
 "metadata": {
  "kernelspec": {
   "display_name": "Python 2",
   "language": "python",
   "name": "python2"
  },
  "language_info": {
   "codemirror_mode": {
    "name": "ipython",
    "version": 2
   },
   "file_extension": ".py",
   "mimetype": "text/x-python",
   "name": "python",
   "nbconvert_exporter": "python",
   "pygments_lexer": "ipython2",
   "version": "2.7.9"
  }
 },
 "nbformat": 4,
 "nbformat_minor": 2
}