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| 1 | +ca65 V2.18 - Ubuntu 2.19-1 |
| 2 | +Main file : hi.asm |
| 3 | +Current file: hi.asm |
| 4 | + |
| 5 | +000000r 1 ;__HI___________________________________________________________ |
| 6 | +000000r 1 ; |
| 7 | +000000r 1 ; This is a quick program that can be uploaded to the MBC from |
| 8 | +000000r 1 ; Z80 mode. It will print a "Hi" to the UART then return control |
| 9 | +000000r 1 ; to the Z80. It does not require the stack to be available and |
| 10 | +000000r 1 ; is pretty much the simplest code imaginable. :) |
| 11 | +000000r 1 ; |
| 12 | +000000r 1 ; This requires the SBC is secondary to a Z80. |
| 13 | +000000r 1 ; hi.hex file can be loaded from the monitor. Ensure that jumpers J1 and J4 |
| 14 | +000000r 1 ; are set for 2&3, the 6502 toggle IO address is set for $FF and |
| 15 | +000000r 1 ; the 65C02 board is set for IOPage 03. |
| 16 | +000000r 1 ; remember that bit A15 is inverted on the board so the dip switch is set to $83. |
| 17 | +000000r 1 ; |
| 18 | +000000r 1 ; To run from the MBC Z80 monitor |
| 19 | +000000r 1 ; |
| 20 | +000000r 1 ; first set the MPCL to allow RAM in the low bank |
| 21 | +000000r 1 ; >O 7C 80 |
| 22 | +000000r 1 ; >O 78 80 |
| 23 | +000000r 1 ; |
| 24 | +000000r 1 ; then load the .HEX file. |
| 25 | +000000r 1 ; >L |
| 26 | +000000r 1 ; |
| 27 | +000000r 1 ; |
| 28 | +000000r 1 ; Finally transfer control to the 65C02 by reading the toggle register |
| 29 | +000000r 1 ; >I FF |
| 30 | +000000r 1 ; |
| 31 | +000000r 1 ; The '02 should reset run this program and return to the Z80 monitor |
| 32 | +000000r 1 ; |
| 33 | +000000r 1 ; From CP/M, you can simply execute the hi.com program. |
| 34 | +000000r 1 ;_______________________________________________________________ |
| 35 | +000000r 1 |
| 36 | +000000r 1 ; UART 16C550 SERIAL -- Assumes IO is in page $03 -- DIP Switch settings $83 |
| 37 | +000000r 1 UART0 = $0368 ; DATA IN/OUT |
| 38 | +000000r 1 UART1 = $0369 ; CHECK RX |
| 39 | +000000r 1 UART2 = $036A ; INTERRUPTS |
| 40 | +000000r 1 UART3 = $036B ; LINE CONTROL |
| 41 | +000000r 1 UART4 = $036C ; MODEM CONTROL |
| 42 | +000000r 1 UART5 = $036D ; LINE STATUS |
| 43 | +000000r 1 UART6 = $036E ; MODEM STATUS |
| 44 | +000000r 1 UART7 = $036F ; SCRATCH REG. |
| 45 | +000000r 1 |
| 46 | +000000r 1 ; this is Z80 code that is used to be able to run this as a .COM file. It is truncated |
| 47 | +000000r 1 ; when the various .HEX files are generated |
| 48 | +000000r 1 ; |
| 49 | +000000r 1 .segment "LOADER" |
| 50 | +000000r 1 F3 .BYTE $F3 ;DI - DISABLE INTERRUPTS |
| 51 | +000001r 1 01 00 10 .BYTE $01,$00,$10 ;LD BC,$1000 -BYTES TO MOVE |
| 52 | +000004r 1 11 00 70 .BYTE $11,$00,$70 ;LD DE,$7000 -DESTINATION ADDRESS (6502 IS !A15) |
| 53 | +000007r 1 21 20 01 .BYTE $21,$20,$01 ;LD HL,$0120 -SOURCE ADDRESS |
| 54 | +00000Ar 1 ED B0 .BYTE $ED,$B0 ;LDIR -COPY RAM |
| 55 | +00000Cr 1 DB FF .BYTE $DB,$FF ;IN A,$FF -ENABLE 6502 |
| 56 | +00000Er 1 0E 00 .BYTE $0E,$00 ;LD C,00H -CP/M SYSTEM RESET CALL |
| 57 | +000010r 1 CD 05 00 .BYTE $CD,$05,$00 ;CALL 0005H -RETURN TO PROMPT |
| 58 | +000013r 1 ; |
| 59 | +000013r 1 ; |
| 60 | +000013r 1 ; |
| 61 | +000013r 1 |
| 62 | +000013r 1 .segment "TROM" |
| 63 | +000000r 1 |
| 64 | +000000r 1 ;__COLD_START___________________________________________________ |
| 65 | +000000r 1 ; |
| 66 | +000000r 1 ; PERFORM SYSTEM COLD INIT |
| 67 | +000000r 1 ; |
| 68 | +000000r 1 ;_______________________________________________________________ |
| 69 | +000000r 1 COLD_START: |
| 70 | +000000r 1 |
| 71 | +000000r 1 TX_BUSYLP2a: |
| 72 | +000000r 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 73 | +000003r 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 74 | +000005r 1 C9 00 CMP #$00 |
| 75 | +000007r 1 F0 F7 BEQ TX_BUSYLP2a ; IF NOT REPEAT |
| 76 | +000009r 1 A9 0A LDA #10 |
| 77 | +00000Br 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 78 | +00000Er 1 |
| 79 | +00000Er 1 TX_BUSYLP3a: |
| 80 | +00000Er 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 81 | +000011r 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 82 | +000013r 1 C9 00 CMP #$00 |
| 83 | +000015r 1 F0 F7 BEQ TX_BUSYLP3a ; IF NOT REPEAT |
| 84 | +000017r 1 A9 0D LDA #13 |
| 85 | +000019r 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 86 | +00001Cr 1 |
| 87 | +00001Cr 1 TX_BUSYLP: |
| 88 | +00001Cr 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 89 | +00001Fr 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 90 | +000021r 1 C9 00 CMP #$00 |
| 91 | +000023r 1 F0 F7 BEQ TX_BUSYLP ; IF NOT REPEAT |
| 92 | +000025r 1 A9 48 LDA #'H' |
| 93 | +000027r 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 94 | +00002Ar 1 TX_BUSYLP1: |
| 95 | +00002Ar 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 96 | +00002Dr 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 97 | +00002Fr 1 C9 00 CMP #$00 |
| 98 | +000031r 1 F0 F7 BEQ TX_BUSYLP1 ; IF NOT REPEAT |
| 99 | +000033r 1 A9 69 LDA #'i' |
| 100 | +000035r 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 101 | +000038r 1 |
| 102 | +000038r 1 TX_BUSYLP2: |
| 103 | +000038r 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 104 | +00003Br 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 105 | +00003Dr 1 C9 00 CMP #$00 |
| 106 | +00003Fr 1 F0 F7 BEQ TX_BUSYLP2 ; IF NOT REPEAT |
| 107 | +000041r 1 A9 0A LDA #10 |
| 108 | +000043r 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 109 | +000046r 1 |
| 110 | +000046r 1 TX_BUSYLP3: |
| 111 | +000046r 1 AD 6D 03 LDA UART5 ; READ LINE STATUS REGISTER |
| 112 | +000049r 1 29 20 AND #$20 ; TEST IF UART IS READY TO SEND (BIT 5) |
| 113 | +00004Br 1 C9 00 CMP #$00 |
| 114 | +00004Dr 1 F0 F7 BEQ TX_BUSYLP3 ; IF NOT REPEAT |
| 115 | +00004Fr 1 A9 0D LDA #13 |
| 116 | +000051r 1 8D 68 03 STA UART0 ; THEN WRITE THE CHAR TO UART |
| 117 | +000054r 1 |
| 118 | +000054r 1 |
| 119 | +000054r 1 AD FF 03 LDA $03FF ; Ping the register to go back to Z80 |
| 120 | +000057r 1 |
| 121 | +000057r 1 |
| 122 | +000057r 1 .segment "VECTORS" |
| 123 | +000000r 1 ; $FFFA |
| 124 | +000000r 1 rr rr NMIVECTOR: .WORD COLD_START ; |
| 125 | +000002r 1 rr rr RSTVECTOR: .WORD COLD_START ; |
| 126 | +000004r 1 rr rr INTVECTOR: .WORD COLD_START ; |
| 127 | +000006r 1 |
| 128 | +000006r 1 ENDOFIMAGE: |
| 129 | +000006r 1 .END |
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