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Disable the PLIC Interrupt Controller
1 parent c6c0bd3 commit 6d66caa

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4 files changed

+18
-8
lines changed

4 files changed

+18
-8
lines changed

arch/risc-v/src/bl808/bl808_irq.c

+6
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@
4646

4747
void up_irqinitialize(void)
4848
{
49+
#ifdef TODO ////
4950
uintptr_t claim;
5051

5152
/* Disable S-Mode interrupts */
@@ -100,6 +101,7 @@ void up_irqinitialize(void)
100101

101102
up_irq_enable();
102103
#endif
104+
#endif //// TODO
103105
}
104106

105107
/****************************************************************************
@@ -112,6 +114,7 @@ void up_irqinitialize(void)
112114

113115
void up_disable_irq(int irq)
114116
{
117+
#ifdef TODO ////
115118
int extirq;
116119

117120
if (irq == RISCV_IRQ_SOFT)
@@ -142,6 +145,7 @@ void up_disable_irq(int irq)
142145
PANIC();
143146
}
144147
}
148+
#endif //// TODO
145149
}
146150

147151
/****************************************************************************
@@ -154,6 +158,7 @@ void up_disable_irq(int irq)
154158

155159
void up_enable_irq(int irq)
156160
{
161+
#ifdef TODO ////
157162
int extirq;
158163

159164
if (irq == RISCV_IRQ_SOFT)
@@ -184,6 +189,7 @@ void up_enable_irq(int irq)
184189
PANIC();
185190
}
186191
}
192+
#endif //// TODO
187193
}
188194

189195
irqstate_t up_irq_enable(void)

arch/risc-v/src/bl808/bl808_irq_dispatch.c

+2
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@
5151

5252
void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
5353
{
54+
#ifdef TODO ////
5455
int irq = (vector >> RV_IRQ_MASK) | (vector & 0xf);
5556

5657
/* Firstly, check if the irq is machine external interrupt */
@@ -80,5 +81,6 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
8081
putreg32(irq - RISCV_IRQ_EXT, BL808_PLIC_CLAIM);
8182
}
8283

84+
#endif //// TODO
8385
return regs;
8486
}

arch/risc-v/src/bl808/bl808_mm_init.c

+8-6
Original file line numberDiff line numberDiff line change
@@ -52,23 +52,23 @@
5252
#define MMU_IO_BASE (0x00000000ul)
5353
#define MMU_IO_SIZE (0x40000000ul)
5454

55-
#define MMU_INT_BASE (0xe0000000ul)
56-
#define MMU_INT_SIZE (0x10000000ul)
55+
//// TODO: #define MMU_INT_BASE (0xe0000000ul)
56+
//// TODO: #define MMU_INT_SIZE (0x10000000ul)
5757

5858
/* Physical and virtual addresses to page tables (vaddr = paddr mapping) */
5959

6060
#define PGT_L1_PBASE (uintptr_t)&m_l1_pgtable
6161
#define PGT_L2_PBASE (uintptr_t)&m_l2_pgtable
62-
#define PGT_L2_INT_PBASE (uintptr_t)&m_l2_int_pgtable
62+
//// TODO: #define PGT_L2_INT_PBASE (uintptr_t)&m_l2_int_pgtable
6363
#define PGT_L3_PBASE (uintptr_t)&m_l3_pgtable
6464
#define PGT_L1_VBASE PGT_L1_PBASE
6565
#define PGT_L2_VBASE PGT_L2_PBASE
66-
#define PGT_L2_INT_VBASE PGT_L2_INT_PBASE
66+
//// TODO: #define PGT_L2_INT_VBASE PGT_L2_INT_PBASE
6767
#define PGT_L3_VBASE PGT_L3_PBASE
6868

6969
#define PGT_L1_SIZE (512) /* Enough to map 512 GiB */
7070
#define PGT_L2_SIZE (512) /* Enough to map 1 GiB */
71-
#define PGT_L2_INT_SIZE (512) /* Enough to map 1 GiB */
71+
//// TODO: #define PGT_L2_INT_SIZE (512) /* Enough to map 1 GiB */
7272
#define PGT_L3_SIZE (1024) /* Enough to map 4 MiB (2MiB x 2) */
7373

7474
#define SLAB_COUNT (sizeof(m_l3_pgtable) / RV_MMU_PAGE_SIZE)
@@ -98,7 +98,7 @@ typedef struct pgalloc_slab_s pgalloc_slab_t;
9898

9999
static size_t m_l1_pgtable[PGT_L1_SIZE] locate_data(".pgtables");
100100
static size_t m_l2_pgtable[PGT_L2_SIZE] locate_data(".pgtables");
101-
static size_t m_l2_int_pgtable[PGT_L2_INT_SIZE] locate_data(".pgtables");
101+
//// TODO: static size_t m_l2_int_pgtable[PGT_L2_INT_SIZE] locate_data(".pgtables");
102102
static size_t m_l3_pgtable[PGT_L3_SIZE] locate_data(".pgtables");
103103

104104
/* Kernel mappings (L1 base) */
@@ -244,6 +244,7 @@ void bl808_kernel_mappings(void)
244244
mmu_ln_map_region(1, PGT_L1_VBASE, MMU_IO_BASE, MMU_IO_BASE,
245245
MMU_IO_SIZE, MMU_THEAD_IO_FLAGS);
246246

247+
#ifdef TODO ////
247248
/* Map the PLIC with L2 page table */
248249

249250
binfo("map PLIC with L2 page table\n");
@@ -254,6 +255,7 @@ void bl808_kernel_mappings(void)
254255

255256
binfo("connect the L1 and PLIC L2 page tables\n");
256257
mmu_ln_setentry(1, PGT_L1_VBASE, PGT_L2_INT_PBASE, MMU_INT_BASE, PTE_G);
258+
#endif //// TODO
257259

258260
/* Map the kernel text and data for L2/L3 */
259261

arch/risc-v/src/bl808/hardware/bl808_memorymap.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@
2727

2828
/* Register Base Address ****************************************************/
2929

30-
#define BL808_UART3_BASE 0x30002000ul
31-
#define BL808_PLIC_BASE 0xe0000000ul
30+
//// TODO: #define BL808_UART3_BASE 0x30002000ul
31+
//// TODO: #define BL808_PLIC_BASE 0xe0000000ul
3232

3333
#endif /* __ARCH_RISCV_SRC_BL808_HARDWARE_BL808_MEMORYMAP_H */

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