Sim: Dangling virtual interface - Questa support

[svenka3]

In OT code, we have few virtual interfaces that are apparently left unconnected for few IPs. I believe depending on how the elaborator works, some simulators may not need those to be connected to actual/physical interfaces. However, Questa (and I believe Riviera as well) performs checks to ensure all virtual interfaces are initialized at time 0.

Below is what we get with default OT code in Questa:

util/dvsim/dvsim.py hw/ip/uart/dv/uart_sim_cfg.hjson -t questa -i uart_smoke

# ** Fatal: (vsim-8451) opentitan/scratch/uart.sim.questa/qsta-support/default/sim-vcs/../src/lowrisc_dv_alert_esc_agent_0/alert_esc_agent_cfg.sv(10): Virtual interface resolution cannot find a matching instance for 'virtual alert_esc_if'.
#    Time: 0 ps  Iteration: 0  Region: /alert_esc_agent_pkg::alert_esc_base_driver File:  opentitan/scratch/uart.sim.questa/qsta-support/default/sim-vcs/../src/lowrisc_dv_alert_esc_agent_0/alert_esc_base_driver.sv Line: 30

Fix is simple, make sure we connect it via config_db - a snippet is below (Few more lines have changed in file: hw/ip/uart/dv/tb/tb.sv)

 `ifdef VW_QSTA
    uvm_config_db#(virtual alert_esc_if)::set(null, "*.env.m_alert_agent*", "vif", u_alert_esc_if);
    uvm_config_db#(virtual alert_esc_if)::set(null, "*.env.cfg.m_alert_agent_cfg*.*", "vif", u_alert_esc_if);
    uvm_config_db#(virtual alert_esc_probe_if)::set(null, "*.env.cfg.m_alert_agent_cfg*.*", "probe_vif", u_alert_esc_probe_if);
  `endif // VW_QSTA

Kindly review if you care about the change. Eventually we need this fix in all IPs (tb.sv file).

[sriyerg]

UART does not have alerts so your proposed change should not be needed. All of our testbenches extend from the Comportable IP library classes (hw/dv/sv/cip_lib), which absorb most of the "common" functionalities across all OT IPs, including optional ones such as alerts. Whether an IP has alerts is governed by cfg.list_of_alerts string knob. For UART, it must be empty. If it is empty, the alert_esc_agent should not even be instantiated and hence that error should not show up.

Would you please print cfg.list_of_alerts in uart_env::run_phase (or wherever appropriate) to debug this further? UART tests are passing with all other simulators - VCS, DSim, Xcelium and Riviera.

• @weicaiyang (UART DV) & @cindychip (Alert agent UVC)

[weicaiyang]

Agree with @sriyerg

alert agent and cfg aren't created in uart env. Please make sure below codes aren't executed in uart test.

opentitan/hw/dv/sv/cip_lib/cip_base_env_cfg.sv

Line 49 in e1a0e6c

m_alert_agent_cfg[alert_name] = alert_esc_agent_cfg::type_id::create("m_alert_agent_cfg");

opentitan/hw/dv/sv/cip_lib/cip_base_env.sv

Line 53 in e1a0e6c

m_alert_agent[alert_name] = alert_esc_agent::type_id::create(agent_name, this);

[svenka3]

Yes,list_of_alerts is empty, printed at 1000ps below is log:

 UVM_INFO @      1000 ps: (../src/lowrisc_dv_uart_env_0.1/uart_env.sv:36) uvm_test_top.env [env] cfg.list_of_alerts: '{} 
#  cfg: 
# -------------------------------------------------------------------------------
# Name                                      Type               Size  Value       
# -------------------------------------------------------------------------------
# cfg                                       uart_env_cfg       -     @402        
#   is_active                               integral           1     'h1         
#   en_scb                                  integral           1     'h1         
#   en_cov                                  integral           1     'h1         
#   zero_delays                             integral           1     'h1         
#   clk_freq_mhz                            clk_freq_mhz_e     32    ClkFreq50Mhz
#   m_tl_agent_cfg                          tl_agent_cfg       -     @504        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     if_mode                               if_mode_e          1     Host        
#     max_outstanding_req                   integral           32    'h1         
#     tl_level                              tl_level_e         2     kTLUL       
#     a_ready_delay_min                     integral           32    'h0         
#     a_ready_delay_max                     integral           32    'h0         
#     d_ready_delay_min                     integral           32    'h0         
#     d_ready_delay_max                     integral           32    'h0         
#     host_can_stall_rsp_when_a_valid_high  integral           1     'h1         
#     device_can_rsp_on_same_cycle          integral           1     'h0         
#     time_a_valid_avail_after_sample_edge  integral           64    'h1         
#     csr_access_abort_pct_in_adapter       integral           32    'h0         
#   m_alert_agent_cfg                       aa(object,string)  0     -           
#   num_interrupts                          integral           32    'h8         
#   m_uart_agent_cfg                        uart_agent_cfg     -     @505        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     if_mode                               if_mode_e          1     Host        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     en_rx_checks                          integral           1     'h1         
#     en_tx_checks                          integral           1     'h1         
#     en_tx_monitor                         integral           1     'h1         
#     en_rx_monitor                         integral           1     'h1         
#     en_parity                             integral           1     'h0         
#     odd_parity                            integral           1     'h0         
#     baud_rate                             baud_rate_e        32    ""          
# -------------------------------------------------------------------------------
# 

[sriyerg]

Yes,list_of_alerts is empty, printed at 1000ps below is log:

 UVM_INFO @      1000 ps: (../src/lowrisc_dv_uart_env_0.1/uart_env.sv:36) uvm_test_top.env [env] cfg.list_of_alerts: '{} 
#  cfg: 
# -------------------------------------------------------------------------------
# Name                                      Type               Size  Value       
# -------------------------------------------------------------------------------
# cfg                                       uart_env_cfg       -     @402        
#   is_active                               integral           1     'h1         
#   en_scb                                  integral           1     'h1         
#   en_cov                                  integral           1     'h1         
#   zero_delays                             integral           1     'h1         
#   clk_freq_mhz                            clk_freq_mhz_e     32    ClkFreq50Mhz
#   m_tl_agent_cfg                          tl_agent_cfg       -     @504        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     if_mode                               if_mode_e          1     Host        
#     max_outstanding_req                   integral           32    'h1         
#     tl_level                              tl_level_e         2     kTLUL       
#     a_ready_delay_min                     integral           32    'h0         
#     a_ready_delay_max                     integral           32    'h0         
#     d_ready_delay_min                     integral           32    'h0         
#     d_ready_delay_max                     integral           32    'h0         
#     host_can_stall_rsp_when_a_valid_high  integral           1     'h1         
#     device_can_rsp_on_same_cycle          integral           1     'h0         
#     time_a_valid_avail_after_sample_edge  integral           64    'h1         
#     csr_access_abort_pct_in_adapter       integral           32    'h0         
#   m_alert_agent_cfg                       aa(object,string)  0     -           
#   num_interrupts                          integral           32    'h8         
#   m_uart_agent_cfg                        uart_agent_cfg     -     @505        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     if_mode                               if_mode_e          1     Host        
#     is_active                             integral           1     'h1         
#     en_cov                                integral           1     'h1         
#     en_rx_checks                          integral           1     'h1         
#     en_tx_checks                          integral           1     'h1         
#     en_tx_monitor                         integral           1     'h1         
#     en_rx_monitor                         integral           1     'h1         
#     en_parity                             integral           1     'h0         
#     odd_parity                            integral           1     'h0         
#     baud_rate                             baud_rate_e        32    ""          
# -------------------------------------------------------------------------------
# 

This is confusing. The original Fatal error occurred at 0ps. Yet, the simulation seems to have progressed till 1000ps.

Also, as you can see in the above print msg, m_alert_agent_cfg is null. It should not be attempting to elaborate a piece of DV code that are not even created. Seems like a bug in Questa.

[svenka3]

Just sharing my other similar porting experience - Questa does look for all virtual interfaces in the code (used inside driver/monitor etc.) to be initialized. I do vaguely recall some LRM section supporting this, will dig if I get a chance.

[svenka3]

@sriyerg

This is confusing. The original Fatal error occurred at 0ps. Yet, the simulation seems to have progressed till 1000ps.

Sorry for the confusion, I did workaround and showed the print for your eyes only ;-)

Bottom-line - Questa needs this fix for now. I will see if I can check with their AEs, but would take additional effort.

[sriyerg]

@sriyerg

This is confusing. The original Fatal error occurred at 0ps. Yet, the simulation seems to have progressed till 1000ps.

Sorry for the confusion, I did workaround and showed the print for your eyes only ;-)

Bottom-line - Questa needs this fix for now. I will see if I can check with their AEs, but would take additional effort.

Ohh I see, nevermind.

I did a quick google search on vsim-8451 and I came across this switch -permit_unmatched_virtual_intf. Could you give that a try?

[sriyerg]

@sriyerg

This is confusing. The original Fatal error occurred at 0ps. Yet, the simulation seems to have progressed till 1000ps.

Sorry for the confusion, I did workaround and showed the print for your eyes only ;-)
Bottom-line - Questa needs this fix for now. I will see if I can check with their AEs, but would take additional effort.

Ohh I see, nevermind.

I did a quick google search on vsim-8451 and I came across this switch -permit_unmatched_virtual_intf. Could you give that a try?

See second reply in this thread:
https://verificationacademy.com/forums/ovm/virtual-interface-resolution-cannot-find-matching-instance-interface

The thread above is 12 years old! Questa devs added a workaround for this with that switch above rather than fixing it in the tool. I cannot imagine how many DV people would have run into this and wasted their times...

[sriyerg]

Marking as resolved, since this is clearly a Questa tool issue.