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Renaming dir sim-vcs inside fusesoc.hjson #4334

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svenka3 opened this issue Nov 29, 2020 · 5 comments
Closed

Renaming dir sim-vcs inside fusesoc.hjson #4334

svenka3 opened this issue Nov 29, 2020 · 5 comments
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Component:DV DV issue: testbench, test case, etc. Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Priority:P3 Priority: low

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@svenka3
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svenka3 commented Nov 29, 2020

Hi,
How do i change the sim-vcs directory name to say sim-{tool}

Inside my scratch DIR:

opentitan/scratch/uart.sim.questa/master/default/

"ls"

build.log env_vars sim-vcs src

I wish I can change it to sim-{tool}

I see hw/dv/tools/dvsim/fusesoc.hjson

sv_flist_gen_dir: "{build_dir}/sim-vcs"
// VW sv_flist_gen_dir: "{build_dir}/sim-{tool}"

Tried the above, didn't really work - I still see sim-vcs getting created.

Any comments please?

Thanks
Srini

@rswarbrick
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@sriyerg (as the dvsim expert!)

@rswarbrick rswarbrick added Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Type:Question Questions labels Nov 30, 2020
@sriyerg
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sriyerg commented Dec 1, 2020

We run FuseSoC only to generate the filelist. By default, it assumes VCS as the simulator of choice. FuseSoC creates and puts the generated file list in that folder - we do not create that folder as a part of dvsim step. We instead set the sv_flist_gen_dir which basically tells dvsim where to pick up the generated file list from. I understand that it is minor annoyance that it does not reflect the correct tool being used, but in practice, it is completely harmless and should make no difference to what simulator is actually being used.

If you want to, you can try fixing it by adding this to questa.hjson: sv_flist_gen_opts: ["-sim=questa"] (you may need to confirm that FuseSoC supports Questa). The reason for not doing this by default: at the start of the project, FuseSoC supported only a few commercial simulators. It would fail when we added support for a new tool, even though we were stopping at the filelist generation step as opposed to going all the way building the simulation executable. Since it doesn't really matter, we decided to not have that switch at all.

@sriyerg
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sriyerg commented Dec 12, 2020

Can this be closed?

@svenka3
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svenka3 commented Dec 14, 2020

My 2 cents - if you can rename it to be generic than VCS it would be great

@sriyerg
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sriyerg commented Dec 14, 2020

Sure, we will think of a way to fix it. It is very low on our priority though.

@imphil imphil added Component:DV DV issue: testbench, test case, etc. Priority:P3 Priority: low and removed Type:Question Questions labels May 11, 2021
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Labels
Component:DV DV issue: testbench, test case, etc. Component:Tooling Issues related to tooling, e.g. tools/scripts for doc, code generation (docgen, reggen), CSR Priority:P3 Priority: low
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