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46 | 46 |
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47 | 47 | #if defined(__AVR__)
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48 | 48 | #include <avr/io.h>
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| 49 | +#include <dev/watchdog.h> |
49 | 50 |
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50 | 51 | //_delay_us has the potential to use floating point which brings the 256 byte clz table into RAM
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51 | 52 | //#include <util/delay.h>
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@@ -2100,4 +2101,183 @@ void rf230_start_sneeze(void) {
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2100 | 2101 | // while (hal_register_read(0x0f)!=1) {continue;} //wait for pll lock-hangs
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2101 | 2102 | hal_register_write(0x02,0x02); //Set TRX_STATE to TX_START
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2102 | 2103 | }
|
| 2104 | + |
2103 | 2105 | #endif
|
| 2106 | + |
| 2107 | +#ifdef AES_128_HW_CONF |
| 2108 | +#define IEEE_VECT 0 |
| 2109 | + |
| 2110 | +extern unsigned char aes_key[16]; |
| 2111 | +extern unsigned char aes_p[]; |
| 2112 | +extern unsigned char aes_c[]; |
| 2113 | +extern unsigned char aes_s[]; |
| 2114 | +extern unsigned char tmp[16]; |
| 2115 | + |
| 2116 | +/* |
| 2117 | + After PWR_SAVE sleep key is lost. We'll lock en/decyption to avoid |
| 2118 | + not to forced in to sleep while doing crypto. Also the key is hold |
| 2119 | + be the user so AES block should be reentrant. Encode/Docode och 128bit |
| 2120 | + (16 bytes) is promised to be less than 24us. |
| 2121 | + Note! Radio must be on to use the HW crypto engine. --ro |
| 2122 | +*/ |
| 2123 | + |
| 2124 | +static void |
| 2125 | +rf230_aes_write_key(unsigned char *key) |
| 2126 | +{ |
| 2127 | + uint8_t i; |
| 2128 | + for(i = 0; i < 16; i++) { |
| 2129 | + hal_subregister_write(SR_AES_KEY, key[i]); |
| 2130 | + } |
| 2131 | +} |
| 2132 | +static void |
| 2133 | +rf230_aes_read_key(unsigned char *key) |
| 2134 | +{ |
| 2135 | + uint8_t i; |
| 2136 | + for(i = 0; i < 16; i++) { |
| 2137 | + key[i] = hal_subregister_read(SR_AES_KEY); |
| 2138 | + } |
| 2139 | +} |
| 2140 | +static void |
| 2141 | +rf230_aes_write_state(unsigned char *state) |
| 2142 | +{ |
| 2143 | + uint8_t i; |
| 2144 | + for(i = 0; i < 16; i++) { |
| 2145 | + hal_subregister_write(SR_AES_STATE, state[i]); |
| 2146 | + } |
| 2147 | +} |
| 2148 | +static void |
| 2149 | +rf230_aes_read_state(unsigned char *state) |
| 2150 | +{ |
| 2151 | + uint8_t i; |
| 2152 | + for(i = 0; i < 16; i++) { |
| 2153 | + state[i] = hal_subregister_read(SR_AES_STATE); |
| 2154 | + } |
| 2155 | +} |
| 2156 | + |
| 2157 | +static int |
| 2158 | +crypt(void) |
| 2159 | +{ |
| 2160 | + uint8_t status; |
| 2161 | + |
| 2162 | + hal_subregister_write(SR_AES_CNTRL_REQUEST, 1); /* Kick */ |
| 2163 | + |
| 2164 | + do { |
| 2165 | + watchdog_periodic(); |
| 2166 | + status = hal_subregister_read(SR_AES_STATUS); |
| 2167 | + } while(status == 0); |
| 2168 | + |
| 2169 | + if (hal_subregister_read(SR_AES_STATUS_ERR)) { |
| 2170 | + PRINTF("AES ERR\n"); |
| 2171 | + return 0; |
| 2172 | + } |
| 2173 | + if (hal_subregister_read(SR_AES_STATUS_DONE)) { |
| 2174 | + PRINTF("AES DONE\n"); |
| 2175 | + return 1; |
| 2176 | + } |
| 2177 | + return 0; /* Unknown */ |
| 2178 | +} |
| 2179 | + |
| 2180 | +int |
| 2181 | +rf230_aes_encrypt_cbc(unsigned char *key, unsigned char *plain, int len, unsigned char *mic) |
| 2182 | +{ |
| 2183 | + uint8_t i; |
| 2184 | + uint8_t sreg; |
| 2185 | + int res; |
| 2186 | + |
| 2187 | + sreg = SREG; |
| 2188 | + cli(); |
| 2189 | + rf230_aes_write_key(key); |
| 2190 | + hal_subregister_write(SR_AES_CNTRL_MODE, 0); /* AES_MODE=0 -> ECB for 1:st block*/ |
| 2191 | + hal_subregister_write(SR_AES_CNTRL_DIR, 0); /* AES_DIR=0 -> encryption */ |
| 2192 | + |
| 2193 | + /* write string to encrypt into buffer */ |
| 2194 | + for(i = 0; i < 16; i++) { |
| 2195 | + AES_STATE = plain[i] ^ IEEE_VECT; |
| 2196 | + } |
| 2197 | + res = crypt(); |
| 2198 | + if(!res) |
| 2199 | + goto out; |
| 2200 | + |
| 2201 | + len -= 16; |
| 2202 | + /* Swiitch Mode */ |
| 2203 | + hal_subregister_write(SR_AES_CNTRL_MODE, 1); /* AES_MODE=1 -> CBC */ |
| 2204 | + hal_subregister_write(SR_AES_CNTRL_DIR, 0); /* AES_DIR=0 -> encryption */ |
| 2205 | + |
| 2206 | + while(len > 0) { |
| 2207 | + rf230_aes_write_state(plain); |
| 2208 | + res = crypt(); |
| 2209 | + if(!res) |
| 2210 | + goto out; |
| 2211 | + |
| 2212 | + len -= 16; |
| 2213 | + } |
| 2214 | + /* Read and retrun cipher */ |
| 2215 | + rf230_aes_read_state(mic); |
| 2216 | + |
| 2217 | +out: |
| 2218 | + SREG = sreg; |
| 2219 | + return res; |
| 2220 | +} |
| 2221 | + |
| 2222 | +/* Electonic Code Block */ |
| 2223 | +int |
| 2224 | +rf230_aes_encrypt_ebc(unsigned char *key, unsigned char *plain, unsigned char *cipher) |
| 2225 | +{ |
| 2226 | + int res; |
| 2227 | + uint8_t sreg; |
| 2228 | + |
| 2229 | + sreg = SREG; |
| 2230 | + cli(); |
| 2231 | + rf230_aes_write_key(key); |
| 2232 | + hal_subregister_write(SR_AES_CNTRL_MODE, 0); /* AES_MODE=0 -> ECB for 1:st block*/ |
| 2233 | + hal_subregister_write(SR_AES_CNTRL_DIR, 0); /* AES_DIR=0 -> encryption */ |
| 2234 | + rf230_aes_write_state(plain); /* write string to encrypt into buffer */ |
| 2235 | + res = crypt(); |
| 2236 | + if(!res) |
| 2237 | + goto out; |
| 2238 | + rf230_aes_read_state(cipher); /* Read and return cipher */ |
| 2239 | + |
| 2240 | +out: |
| 2241 | + SREG = sreg; |
| 2242 | + return res; |
| 2243 | +} |
| 2244 | + |
| 2245 | +int |
| 2246 | +rf230_aes_decrypt_ebc(unsigned char *key, unsigned char *cipher, unsigned char *plain) |
| 2247 | +{ |
| 2248 | + int res; |
| 2249 | + uint8_t sreg; |
| 2250 | + /* |
| 2251 | + Dummy encryption of 0 w. original key |
| 2252 | + to get last round key to be used decrytion |
| 2253 | + */ |
| 2254 | + |
| 2255 | + sreg = SREG; |
| 2256 | + cli(); |
| 2257 | + |
| 2258 | + rf230_aes_write_key(key); |
| 2259 | + hal_subregister_write(SR_AES_CNTRL_MODE, 0); /* AES_MODE=0 -> ECB for 1:st block*/ |
| 2260 | + hal_subregister_write(SR_AES_CNTRL_DIR, 0); /* AES_DIR=0 -> encryption */ |
| 2261 | + memset(tmp, 0, sizeof(tmp)); /* Setup for last round */ |
| 2262 | + rf230_aes_write_state(tmp); |
| 2263 | + res = crypt(); |
| 2264 | + if(!res) |
| 2265 | + goto out; |
| 2266 | + |
| 2267 | + rf230_aes_read_key(tmp);/* Save the last round key */ |
| 2268 | + /* And use as decrytion key */ |
| 2269 | + rf230_aes_write_key(tmp); |
| 2270 | + hal_subregister_write(SR_AES_CNTRL_MODE, 0); /* AES_MODE=0 -> ECB for 1:st block*/ |
| 2271 | + hal_subregister_write(SR_AES_CNTRL_DIR, 1); /* AES_DIR=1 -> decryption */ |
| 2272 | + /* Write string to decrypt into buffer */ |
| 2273 | + rf230_aes_write_state(cipher); |
| 2274 | + res = crypt(); |
| 2275 | + if(!res) |
| 2276 | + goto out; |
| 2277 | + rf230_aes_read_state(plain); /* Read plaintext into string */ |
| 2278 | + |
| 2279 | +out: |
| 2280 | + SREG = sreg; |
| 2281 | + return res; |
| 2282 | +} |
| 2283 | +#endif /* AES_128_HW_CONF */ |
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