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40 | 40 | #include "contiki.h"
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41 | 41 | #include "reg.h"
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42 | 42 | #include "spi-arch.h"
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| 43 | +#include "sys/cc.h" |
43 | 44 | #include "dev/ioc.h"
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44 | 45 | #include "dev/sys-ctrl.h"
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45 | 46 | #include "dev/spi.h"
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155 | 156 | #if (SPI1_CPRS_CPSDVSR & 1) == 1 || SPI1_CPRS_CPSDVSR < 2 || SPI1_CPRS_CPSDVSR > 254
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156 | 157 | #error SPI1_CPRS_CPSDVSR must be an even number between 2 and 254
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157 | 158 | #endif
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158 |
| - |
| 159 | +/*---------------------------------------------------------------------------*/ |
| 160 | +/* |
| 161 | + * Clock source from which the baud clock is determined for the SSI, according |
| 162 | + * to SSI_CC.CS. |
| 163 | + */ |
| 164 | +#define SSI_SYS_CLOCK SYS_CTRL_SYS_CLOCK |
159 | 165 | /*---------------------------------------------------------------------------*/
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160 | 166 | typedef struct {
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161 | 167 | int8_t port;
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@@ -314,6 +320,37 @@ spix_set_mode(uint8_t spi,
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314 | 320 | }
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315 | 321 | /*---------------------------------------------------------------------------*/
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316 | 322 | void
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| 323 | +spix_set_clock_freq(uint8_t spi, uint32_t freq) |
| 324 | +{ |
| 325 | + const spi_regs_t *regs; |
| 326 | + uint64_t div; |
| 327 | + uint32_t scr; |
| 328 | + |
| 329 | + if(spi >= SSI_INSTANCE_COUNT) { |
| 330 | + return; |
| 331 | + } |
| 332 | + |
| 333 | + regs = &spi_regs[spi]; |
| 334 | + |
| 335 | + /* Disable the SSI peripheral to configure it */ |
| 336 | + REG(regs->base + SSI_CR1) = 0; |
| 337 | + |
| 338 | + /* Configure the SSI serial clock rate */ |
| 339 | + if(!freq) { |
| 340 | + scr = 255; |
| 341 | + } else { |
| 342 | + div = (uint64_t)regs->ssi_cprs_cpsdvsr * freq; |
| 343 | + scr = (SSI_SYS_CLOCK + div - 1) / div; |
| 344 | + scr = MIN(MAX(scr, 1), 256) - 1; |
| 345 | + } |
| 346 | + REG(regs->base + SSI_CR0) = (REG(regs->base + SSI_CR0) & ~SSI_CR0_SCR_M) | |
| 347 | + scr << SSI_CR0_SCR_S; |
| 348 | + |
| 349 | + /* Re-enable the SSI */ |
| 350 | + REG(regs->base + SSI_CR1) |= SSI_CR1_SSE; |
| 351 | +} |
| 352 | +/*---------------------------------------------------------------------------*/ |
| 353 | +void |
317 | 354 | spix_cs_init(uint8_t port, uint8_t pin)
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318 | 355 | {
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319 | 356 | GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(port),
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