Skip to content

Commit 972a0bb

Browse files
Bump arm-pl011-uart from 0.2.0 to 0.3.0 (#2)
* Bump arm-pl011-uart from 0.2.0 to 0.3.0 Bumps arm-pl011-uart from 0.2.0 to 0.3.0. --- updated-dependencies: - dependency-name: arm-pl011-uart dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com> * Fix example after update. --------- Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Co-authored-by: Andrew Walbran <qwandor@google.com>
1 parent 101db57 commit 972a0bb

File tree

3 files changed

+10
-7
lines changed

3 files changed

+10
-7
lines changed

Cargo.lock

+7-4
Some generated files are not rendered by default. Learn more about customizing how changed files appear on GitHub.

Cargo.toml

+1-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ cfg-if = "1.0.0"
1414

1515
[dev-dependencies]
1616
aarch64-paging = { version = "0.8.1", default-features = false }
17-
arm-pl011-uart = "0.2.0"
17+
arm-pl011-uart = "0.3.0"
1818
smccc = "0.1.1"
1919

2020
[features]

examples/qemu_el1.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
use aarch64_paging::paging::Attributes;
1111
use aarch64_rt::{entry, initial_pagetable, InitialPagetable};
12-
use arm_pl011_uart::{OwnedMmioPointer, PL011Registers, Uart};
12+
use arm_pl011_uart::{PL011Registers, Uart, UniqueMmioPointer};
1313
use core::{fmt::Write, panic::PanicInfo, ptr::NonNull};
1414
use smccc::{
1515
psci::{system_off, system_reset},
@@ -48,7 +48,7 @@ fn main(arg0: u64, arg1: u64, arg2: u64, arg3: u64) -> ! {
4848
// SAFETY: The PL011 base address is mapped by the initial identity mapping, and this is the
4949
// only place we create something referring to it.
5050
let mut uart =
51-
Uart::new(unsafe { OwnedMmioPointer::new(NonNull::new(PL011_BASE_ADDRESS).unwrap()) });
51+
Uart::new(unsafe { UniqueMmioPointer::new(NonNull::new(PL011_BASE_ADDRESS).unwrap()) });
5252

5353
writeln!(
5454
uart,

0 commit comments

Comments
 (0)