Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

How to add support for verilog? #125

Closed
Passky opened this issue Nov 25, 2020 · 3 comments
Closed

How to add support for verilog? #125

Passky opened this issue Nov 25, 2020 · 3 comments
Labels

Comments

@Passky
Copy link

Passky commented Nov 25, 2020

"\.v\'" already used by vlang issue in vlang repo
So add it into quickrun-file-alist will cause conflicts.
Is there any proper way to solve this?

@syohex
Copy link
Contributor

syohex commented Nov 25, 2020

It looks there is no way. I suppose it requires like following hack.

(require 'quickrun)
(push '("\\.v\\'" . "verilog") quickrun-file-alist)

(quickrun-add-command "verilog"
  '((:command . "iverilog")
    (:exec    . ("%c -o %e %s"
                 "%e %a"))
    (:remove  . ("%e")))
  :mode 'verilog-mode)

@jcs090218
Copy link
Collaborator

Just realized this funny discussion about vlang and verilog.

@Passky
Copy link
Author

Passky commented Nov 25, 2020

@syohex 's hack works nicely.
Thanks for looking into it!

@Passky Passky closed this as completed Nov 25, 2020
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Development

No branches or pull requests

3 participants