From 8c84f7e65ca65ba132efe51e4a93fe15b7d33b96 Mon Sep 17 00:00:00 2001 From: EgorBo Date: Tue, 1 Feb 2022 01:24:43 +0300 Subject: [PATCH 1/3] Better way to get LLC size on Apple M1 (macOS 12.0+) --- src/coreclr/pal/src/misc/sysinfo.cpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/coreclr/pal/src/misc/sysinfo.cpp b/src/coreclr/pal/src/misc/sysinfo.cpp index 8f935b3e3ea1a8..82a0fca8c38377 100644 --- a/src/coreclr/pal/src/misc/sysinfo.cpp +++ b/src/coreclr/pal/src/misc/sysinfo.cpp @@ -613,9 +613,16 @@ PAL_GetLogicalProcessorCacheSizeFromOS() { int64_t cacheSizeFromSysctl = 0; size_t sz = sizeof(cacheSizeFromSysctl); - const bool success = sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 + const bool success = false + // macOS-arm64: Since macOS 12.0, Apple added ".perflevelX." to determinate cache sizes for efficiency + // and performance cores separetely. "perflevel0" stands for "performance" + || sysctlbyname("hw.perflevel0.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 + || sysctlbyname("hw.perflevel0.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 + // macOS-arm64: these report cache sizes for efficiency cores only + || sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l1dcachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0; + if (success) { _ASSERTE(cacheSizeFromSysctl > 0); From dde8edb8e2acd2ab3e9bba1a0d2e3830c3fc40c7 Mon Sep 17 00:00:00 2001 From: EgorBo Date: Tue, 1 Feb 2022 01:50:22 +0300 Subject: [PATCH 2/3] Address feedback --- src/coreclr/pal/src/misc/sysinfo.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/coreclr/pal/src/misc/sysinfo.cpp b/src/coreclr/pal/src/misc/sysinfo.cpp index 82a0fca8c38377..dc783fd060035b 100644 --- a/src/coreclr/pal/src/misc/sysinfo.cpp +++ b/src/coreclr/pal/src/misc/sysinfo.cpp @@ -614,11 +614,12 @@ PAL_GetLogicalProcessorCacheSizeFromOS() int64_t cacheSizeFromSysctl = 0; size_t sz = sizeof(cacheSizeFromSysctl); const bool success = false +#if defined(HOST_ARM64) && defined(TARGET_OSX) // macOS-arm64: Since macOS 12.0, Apple added ".perflevelX." to determinate cache sizes for efficiency // and performance cores separetely. "perflevel0" stands for "performance" - || sysctlbyname("hw.perflevel0.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.perflevel0.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 - // macOS-arm64: these report cache sizes for efficiency cores only + // macOS-arm64: these report cache sizes for efficiency cores only: +#endif || sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l1dcachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0; From 2168a755a52974764ea5e60a83e9ae722efa1337 Mon Sep 17 00:00:00 2001 From: EgorBo Date: Tue, 1 Feb 2022 14:04:45 +0300 Subject: [PATCH 3/3] Address feedback --- src/coreclr/gc/unix/gcenv.unix.cpp | 7 ++++++- src/coreclr/pal/src/misc/sysinfo.cpp | 2 -- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/coreclr/gc/unix/gcenv.unix.cpp b/src/coreclr/gc/unix/gcenv.unix.cpp index 2d979c395610e9..ceadbf1af995b4 100644 --- a/src/coreclr/gc/unix/gcenv.unix.cpp +++ b/src/coreclr/gc/unix/gcenv.unix.cpp @@ -946,7 +946,12 @@ static size_t GetLogicalProcessorCacheSizeFromOS() { int64_t cacheSizeFromSysctl = 0; size_t sz = sizeof(cacheSizeFromSysctl); - const bool success = sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 + const bool success = false + // macOS-arm64: Since macOS 12.0, Apple added ".perflevelX." to determinate cache sizes for efficiency + // and performance cores separetely. "perflevel0" stands for "performance" + || sysctlbyname("hw.perflevel0.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 + // macOS-arm64: these report cache sizes for efficiency cores only: + || sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l1dcachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0; if (success) diff --git a/src/coreclr/pal/src/misc/sysinfo.cpp b/src/coreclr/pal/src/misc/sysinfo.cpp index dc783fd060035b..19f9c86fd451cc 100644 --- a/src/coreclr/pal/src/misc/sysinfo.cpp +++ b/src/coreclr/pal/src/misc/sysinfo.cpp @@ -614,12 +614,10 @@ PAL_GetLogicalProcessorCacheSizeFromOS() int64_t cacheSizeFromSysctl = 0; size_t sz = sizeof(cacheSizeFromSysctl); const bool success = false -#if defined(HOST_ARM64) && defined(TARGET_OSX) // macOS-arm64: Since macOS 12.0, Apple added ".perflevelX." to determinate cache sizes for efficiency // and performance cores separetely. "perflevel0" stands for "performance" || sysctlbyname("hw.perflevel0.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 // macOS-arm64: these report cache sizes for efficiency cores only: -#endif || sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0 || sysctlbyname("hw.l1dcachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0;