|
1 | 1 | # PYSWD
|
2 | 2 |
|
3 |
| -Debugging MCUs over SWD with ST-Link/V2 debugger |
| 3 | +Is a python module for debugging microcontrollers with SWD using ST-Link/V2 (/V2-1) debugger. |
4 | 4 |
|
5 |
| -Allow to access to any SWD enabled MCU |
| 5 | +This package also contain small command line tool. |
6 | 6 |
|
7 |
| -## Instalation: |
| 7 | +## Goal |
8 | 8 |
|
9 |
| -`pip3 install .` |
| 9 | +Is to create python module for access debugging interface on MCU with SWD interface. |
10 | 10 |
|
11 |
| -or reinstall (upgrade): |
| 11 | +Main purpose of python module is to create automated functional and hardware tests from simple python scripts and without special firmware for microcontroller. |
12 | 12 |
|
13 |
| -`pip3 install --upgrade .` |
| 13 | +## Compatibility |
14 | 14 |
|
15 |
| -uninstall: |
| 15 | +### OS |
| 16 | +PYSWD will work on Linux, Mac and Windows. |
| 17 | +### Python |
| 18 | +Python 3.4+ (Development is under python 3.6) |
| 19 | +### Dependencies |
| 20 | +- [pyusb](https://github.com/walac/pyusb) - is installed automatically as dependency with pip |
| 21 | +- [libusb](https://github.com/libusb/libusb) |
16 | 22 |
|
17 |
| -`pip3 uninstall pyswd` |
| 23 | +## Installation: |
| 24 | +### from downloaded sources |
| 25 | +``` |
| 26 | +pip3 install . |
| 27 | +``` |
| 28 | +### reinstall (upgrade): |
| 29 | +``` |
| 30 | +pip3 install --upgrade . |
| 31 | +``` |
| 32 | +### uninstall: |
| 33 | +``` |
| 34 | +pip3 uninstall pyswd |
| 35 | +``` |
18 | 36 |
|
19 | 37 | ## Python SWD module
|
20 | 38 |
|
21 |
| -`import swd` |
22 |
| - |
23 |
| -Constructor for connected swd device: |
24 |
| - |
25 |
| -`dev = swd.Stlink()` |
26 |
| - |
27 |
| -All public methods from `swd.Stlink` class: |
28 |
| - |
29 |
| -`version` |
30 |
| -Instance of ST-Link version (property) |
31 |
| - |
32 |
| -`get_target_voltage(self)` |
33 |
| -Get target voltage from programmer |
34 |
| - |
35 |
| -`get_coreid(self)` |
36 |
| -Get core ID from MCU |
37 |
| - |
38 |
| -`get_reg(self, reg)` |
39 |
| -Get core register (R0, R1, ... ) |
40 |
| -(CPU must be halted to access core registers) |
41 |
| - |
42 |
| -`set_reg(self, reg, data)` |
43 |
| -Set core register |
44 |
| -(CPU must be halted to access core registers) |
45 |
| - |
46 |
| -`get_mem32(self, addr)` |
47 |
| -Get memory register (32 bits) |
48 |
| - |
49 |
| -`set_mem32(self, addr, data)` |
50 |
| -Set memory register (32 bits) |
51 |
| - |
52 |
| -`read_mem(self, addr, size)` |
53 |
| -Read memory (output is iterable) |
54 |
| - |
55 |
| -`write_mem(self, addr, data)` |
56 |
| -Write memory, data can be iterable |
57 |
| - |
58 |
| -`fill_mem(self, addr, pattern)` |
59 |
| -Fill memory with pattern |
60 |
| - |
61 |
| -### Example: |
62 |
| - |
| 39 | +### Constructor: |
| 40 | +`swd.Stlink(swd_frequency=1800000, logger=None)` |
| 41 | +#### Arguments: |
| 42 | +- swd_frequency: SWD communication frequency |
| 43 | +- logger: logging interface (optional) |
63 | 44 | ```Python
|
64 | 45 | >>> import swd
|
65 |
| - |
66 | 46 | >>> dev = swd.Stlink()
|
67 |
| - |
| 47 | +``` |
| 48 | +### ST-Link version |
| 49 | +property with ST-Link version |
| 50 | +#### Return |
| 51 | + instance of StlinkVersion |
| 52 | +```Python |
68 | 53 | >>> dev.version.str
|
69 | 54 | 'ST-Link/V2 V2J27S6'
|
70 |
| - |
| 55 | +``` |
| 56 | +### Target voltage |
| 57 | +Get target voltage measured by ST-Link |
| 58 | +#### Return |
| 59 | + float target voltage in volts |
| 60 | +```Python |
71 | 61 | >>> dev.get_target_voltage()
|
72 | 62 | 3.21
|
73 |
| - |
| 63 | +``` |
| 64 | +### Core ID |
| 65 | +Get MCU core ID |
| 66 | +#### Return |
| 67 | + 32bit unsigned with core ID |
| 68 | +```Python |
74 | 69 | >>> hex(dev.get_coreid())
|
75 | 70 | '0xbb11477'
|
76 |
| - |
| 71 | +``` |
| 72 | +### Get memory register |
| 73 | +`get_mem32(address)` |
| 74 | +#### Arguments: |
| 75 | +- address: address in memory, must be aligned to 32bits |
| 76 | +#### Return: |
| 77 | + 32bit unsigned data from memory |
| 78 | +```Python |
77 | 79 | >>> hex(dev.get_mem32(0x08000000))
|
78 | 80 | '0x20001000'
|
79 |
| - |
| 81 | +``` |
| 82 | +### Set memory register |
| 83 | +`set_mem32(address, data)` |
| 84 | +#### Arguments: |
| 85 | +- address: address in memory, must be aligned to 32bits |
| 86 | +- data: 32bit unsigned data |
| 87 | +```Python |
80 | 88 | >>> dev.set_mem32(0x20000200, 0x12345678)
|
81 |
| - |
82 | 89 | >>> hex(dev.get_mem32(0x20000200))
|
83 | 90 | '0x12345678
|
84 |
| - |
| 91 | +``` |
| 92 | +### Read memory |
| 93 | +`read_mem(address, size)` |
| 94 | +#### Arguments: |
| 95 | +- address: address in memory |
| 96 | +- size: number of bytes to read from memory |
| 97 | +#### Return: |
| 98 | + iterable of read data |
| 99 | +```Python |
85 | 100 | >>> data = dev.read_mem(0x08000000, 16)
|
86 | 101 | >>> ' '.join(['%02x' % d for d in data])
|
87 | 102 | '00 10 00 20 45 00 00 08 41 00 00 08 41 00 00 08'
|
88 |
| - |
| 103 | +``` |
| 104 | +### Write memory |
| 105 | +`write_mem(address, data)` |
| 106 | +#### Arguments: |
| 107 | +- address: address in memory |
| 108 | +- data: list or iterable of bytes whic will be stored into memory |
| 109 | +```Python |
89 | 110 | >>> dev.write_mem(0x20000100, [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15])
|
90 |
| - |
91 | 111 | >>> data = dev.read_mem(0x20000100, 15)
|
92 | 112 | >>> ' '.join(['%02x' % d for d in data])
|
93 | 113 | '01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f'
|
94 |
| - |
| 114 | +``` |
| 115 | +### Fill memory |
| 116 | +`write_mem(address, size, pattern)` |
| 117 | +#### Arguments: |
| 118 | +- address: address in memory |
| 119 | +- size: number of bytes to fill memory |
| 120 | +- pattern: list or iterable of bytes whic will be stored into memory |
| 121 | +```Python |
95 | 122 | >>> dev.fill_mem(0x20000300, 20, [5, 6, 7])
|
96 | 123 | >>> data = dev.read_mem(0x20000300, 20)
|
97 | 124 | >>> ' '.join(['%02x' % d for d in data])
|
98 | 125 | '05 06 07 05 06 07 05 06 07 05 06 07 05 06 07 05 06 07 05 06'
|
99 |
| - |
| 126 | +``` |
| 127 | +### Read core register |
| 128 | +`get_reg(register)` |
| 129 | +On CortexM platform this will work only if program is halted |
| 130 | +#### Arguments |
| 131 | +- register: is numeric coded register (e.g. 0: R0, 1: R1, ...) |
| 132 | +#### Return |
| 133 | + 32bit unsigned data |
| 134 | +```Python |
| 135 | +>>> hex(dev.get_reg(1)) |
| 136 | +'0x0800012e' |
| 137 | +``` |
| 138 | +### Write core register |
| 139 | +`get_reg(register)` |
| 140 | +On CortexM platform this will work only if program is halted |
| 141 | +#### Arguments |
| 142 | +- register: is numeric coded register (e.g. 0: R0, 1: R1, ...) |
| 143 | +- data: 32bit unsigned data |
| 144 | +```Python |
100 | 145 | >>> hex(dev.get_reg(1))
|
101 | 146 | '0x0800012e'
|
102 | 147 | ```
|
103 | 148 |
|
104 | 149 | ## Python application
|
| 150 | +Simple tool for access MCU debugging features from command line. Is installed together with python module. |
105 | 151 |
|
106 |
| - $ pyswd --help |
107 |
| - usage: pyswd [-h] [-V] [-q] [-d] [-i] [-v] [-f FREQ] [action [action ...]] |
108 |
| - |
109 |
| - positional arguments: |
110 |
| - action actions will be processed sequentially |
111 |
| - |
112 |
| - optional arguments: |
113 |
| - -h, --help show this help message and exit |
114 |
| - -V, --version show program's version number and exit |
115 |
| - -q, --quite quite output |
116 |
| - -d, --debug increase debug output |
117 |
| - -i, --info increase info output |
118 |
| - -v, --verbose increase verbose output |
119 |
| - -f FREQ, --freq FREQ set SWD frequency |
| 152 | +``` |
| 153 | +$ pyswd --help |
| 154 | +``` |
| 155 | +### Usage: |
| 156 | +``` |
| 157 | +pyswd [-h] [-V] [-q] [-d] [-i] [-v] [-f FREQ] [action [action ...]] |
| 158 | +``` |
| 159 | +### positional arguments: |
| 160 | +``` |
| 161 | +action actions will be processed sequentially |
| 162 | +``` |
| 163 | +### Optional arguments: |
| 164 | +``` |
| 165 | +-h, --help show this help message and exit |
| 166 | +-V, --version show program's version number and exit |
| 167 | +-q, --quite quite output |
| 168 | +-d, --debug increase debug output |
| 169 | +-i, --info increase info output |
| 170 | +-v, --verbose increase verbose output |
| 171 | +-f FREQ, --freq FREQ set SWD frequency |
| 172 | +```` |
| 173 | +### List of available actions: |
| 174 | +``` |
| 175 | +dump8:{addr}[:{size}] print content of memory 8 bit register or dump |
| 176 | +dump16:{addr}[:{size}] print content of memory 16 bit register or dump |
| 177 | +dump32:{addr}[:{size}] print content of memory 32 bit register or dump |
| 178 | +dump:{addr}[:{size}] print content of memory 32 bit register or 8 bit dump |
120 | 179 |
|
121 |
| - list of available actions: |
122 |
| - dump8:{addr}[:{size}] print content of memory 8 bit register or dump |
123 |
| - dump16:{addr}[:{size}] print content of memory 16 bit register or dump |
124 |
| - dump32:{addr}[:{size}] print content of memory 32 bit register or dump |
125 |
| - dump:{addr}[:{size}] print content of memory 32 bit register or 8 bit dump |
| 180 | +set8:{addr}:{data}[:{data}..] set 8 bit memory |
126 | 181 |
|
127 |
| - set8:{addr}:{data}[:{data}..] set 8 bit memory |
| 182 | +fill8:{addr}:{size}:{pattern} fill memory with 8 bit pattern |
| 183 | +``` |
| 184 | +(numerical values can be in different formats, like: 42, 0x2a, 0o52, 0b101010, 32K, 1M, ..) |
128 | 185 |
|
129 |
| - fill8:{addr}:{size}:{pattern} fill memory with 8 bit pattern |
| 186 | +## License |
| 187 | +Whole project is under MIT license |
130 | 188 |
|
131 |
| - (numerical values can be in different formats, like: 42, 0x2a, 0o52, 0b101010, 32K, 1M, ..) |
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