From 8683b3056789097816d9eac9a33d610ab7495c66 Mon Sep 17 00:00:00 2001 From: Tomasz Gorochowik Date: Fri, 22 Apr 2022 15:34:16 +0200 Subject: [PATCH] systemverilog: add dedicated wildcard operator errors Signed-off-by: Tomasz Gorochowik --- systemverilog-plugin/UhdmAst.cc | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/systemverilog-plugin/UhdmAst.cc b/systemverilog-plugin/UhdmAst.cc index 5d08bb7b2..7e8b3a556 100644 --- a/systemverilog-plugin/UhdmAst.cc +++ b/systemverilog-plugin/UhdmAst.cc @@ -2437,6 +2437,13 @@ void UhdmAst::process_operation() case vpiAssignmentPatternOp: process_assignment_pattern_op(); break; + case vpiWildEqOp: + case vpiWildNeqOp: { + const uhdm_handle *const handle = (const uhdm_handle *)obj_h; + const UHDM::BaseClass *const object = (const UHDM::BaseClass *)handle->object; + report_error("%s:%d: Wildcard operators are not supported yet\n", object->VpiFile().c_str(), object->VpiLineNo()); + break; + } default: { current_node = make_ast_node(AST::AST_NONE); visit_one_to_many({vpiOperand}, obj_h, [&](AST::AstNode *node) {