From 69e6315fe766103ec208f64f84b4e2a4dacfdaf3 Mon Sep 17 00:00:00 2001
From: Jiuyang liu <liujiuyang1994@gmail.com>
Date: Thu, 3 Sep 2020 17:23:29 +0000
Subject: [PATCH 1/2] finish mill build system.

---
 .gitignore               |   2 +
 api-config-chipsalliance |   2 +-
 build.sc                 |  62 +++++++++++++++++++
 common.sc                | 126 +++++++++++++++++++++++++++++++++++++++
 hardfloat                |   2 +-
 5 files changed, 192 insertions(+), 2 deletions(-)
 create mode 100644 build.sc
 create mode 100644 common.sc

diff --git a/.gitignore b/.gitignore
index a1d9654e672..53e5b612bfb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,4 @@
+out/
 target/
 project/target
 docs/generated
@@ -10,4 +11,5 @@ docs-target/
 .addons-dont-touch
 /lib/
 /test_lib/
+/testbuild/
 rocketchip.jar
diff --git a/api-config-chipsalliance b/api-config-chipsalliance
index d619ca85084..fd8df1105a9 160000
--- a/api-config-chipsalliance
+++ b/api-config-chipsalliance
@@ -1 +1 @@
-Subproject commit d619ca850846d2ec36da64bf8a28e7d9a3d9ed1b
+Subproject commit fd8df1105a92065425cd353b6855777e35bd79b4
diff --git a/build.sc b/build.sc
new file mode 100644
index 00000000000..7267cbc88e8
--- /dev/null
+++ b/build.sc
@@ -0,0 +1,62 @@
+import mill._
+import mill.scalalib._
+import mill.scalalib.publish._
+import coursier.maven.MavenRepository
+import $file.common
+import $file.firrtl.build
+import $file.chisel3.build
+import $file.hardfloat.build
+import $file.`api-config-chipsalliance`.`build-rules`.mill.build
+
+object firrtlRocket extends firrtl.build.firrtlCrossModule("2.12.11") {
+  override def millSourcePath = os.pwd / "firrtl"
+}
+
+object chisel3Rocket extends chisel3.build.chisel3CrossModule("2.12.12") {
+  override def millSourcePath = os.pwd / "chisel3"
+
+  def firrtlModule: Option[PublishModule] = Some(firrtlRocket)
+}
+
+object configRocket extends `api-config-chipsalliance`.`build-rules`.mill.build.config with PublishModule {
+  override def millSourcePath = os.pwd / "api-config-chipsalliance" / "design" / "craft"
+
+  override def scalaVersion = T {
+    rocketchip.scalaVersion()
+  }
+
+  override def pomSettings = T {
+    rocketchip.pomSettings()
+  }
+
+  override def publishVersion = T {
+    rocketchip.publishVersion()
+  }
+}
+
+object hardfloatRocket extends hardfloat.build.hardfloat {
+  override def millSourcePath = os.pwd / "hardfloat"
+
+  override def scalaVersion = T {
+    rocketchip.scalaVersion()
+  }
+
+  def chisel3Module: Option[PublishModule] = Some(chisel3Rocket)
+}
+
+object rocketchip extends common.CommonRocketChip {
+  m =>
+  override def scalaVersion: T[String] = T {
+    "2.12.10"
+  }
+
+  def chisel3Module = Some(chisel3Rocket)
+
+  def hardfloatModule = hardfloatRocket
+
+  def configModule = configRocket
+
+  def scalacPluginClasspath = super.scalacPluginClasspath() ++ Agg(
+    chisel3Rocket.plugin.jar()
+  )
+}
\ No newline at end of file
diff --git a/common.sc b/common.sc
new file mode 100644
index 00000000000..4b57052f8f5
--- /dev/null
+++ b/common.sc
@@ -0,0 +1,126 @@
+import mill._
+import mill.scalalib._
+import mill.scalalib.publish._
+import coursier.maven.MavenRepository
+
+val defaultVersions = Map(
+  "chisel3" -> "3.4.0",
+  "chisel3-plugin" -> "3.4.0"
+)
+
+def getVersion(dep: String, org: String = "edu.berkeley.cs", cross: Boolean = false) = {
+  val version = sys.env.getOrElse(dep + "Version", defaultVersions(dep))
+  if (cross)
+    ivy"$org:::$dep:$version"
+  else
+    ivy"$org::$dep:$version"
+}
+
+/** The reason to split build.sc to two file is
+  * [[CommonRocketChip]] doesn't need to import `$file.chisel3` and `$file.firrtl`.
+  *
+  * You can extends from [[CommonRocketChip]] to use rocket-chip as build-from-source dependency.
+  * When doing this, you may like to override `chisel3Module`, `hardfloatModule`, `configModule`,
+  * setting them to your favorite commit of those packages.
+  *
+  * If you don't override `chisel3Module`, which will default to be `None`,
+  * and mill will automatically use chisel3 from ivy.
+  */
+trait CommonRocketChip extends SbtModule with PublishModule {
+  m =>
+
+  object macros extends SbtModule with PublishModule {
+    override def scalaVersion = T {
+      m.scalaVersion()
+    }
+
+    override def ivyDeps = T {
+      m.ivyDeps()
+    }
+
+    override def pomSettings = T {
+      m.pomSettings()
+    }
+
+    override def publishVersion = T {
+      m.publishVersion()
+    }
+  }
+
+  object test extends Tests {
+    override def scalacPluginClasspath = m.scalacPluginClasspath
+
+    override def ivyDeps = m.ivyDeps() ++ Agg(
+      ivy"org.scalatest::scalatest:3.2.0"
+    )
+
+    def testFrameworks = T {
+      Seq("org.scalatest.tools.Framework")
+    }
+
+    // a sbt-like testOnly command.
+    // for example, mill -i "chisel3[2.12.12].test.testOnly" "chiselTests.BitwiseOpsSpec"
+    def testOnly(args: String*) = T.command {
+      super.runMain("org.scalatest.run", args: _*)
+    }
+  }
+
+  override def millSourcePath = super.millSourcePath / os.up
+
+  def chisel3Module: Option[PublishModule] = None
+
+  def hardfloatModule: PublishModule
+
+  def configModule: PublishModule
+
+  def chisel3IvyDeps = if (chisel3Module.isEmpty) Agg(
+    getVersion("chisel3")
+  ) else Agg.empty[Dep]
+
+  override def mainClass = T {
+    Some("freechips.rocketchip.system.Generator")
+  }
+
+  override def moduleDeps = Seq(macros) ++ chisel3Module :+ hardfloatModule :+ configModule
+
+  override def scalacOptions = T {
+    Seq("-deprecation", "-unchecked", "-Xsource:2.11")
+  }
+
+  override def ivyDeps = T {
+    Agg(
+      ivy"${scalaOrganization()}:scala-reflect:${scalaVersion()}",
+      ivy"org.json4s::json4s-jackson:3.6.1",
+      ivy"org.scalatest::scalatest:3.2.0"
+    ) ++ chisel3IvyDeps
+  }
+
+  private val macroParadise = ivy"org.scalamacros:::paradise:2.1.1"
+
+  private val chisel3Plugin = getVersion("chisel3-plugin")
+
+  override def repositories = super.repositories ++ Seq(
+    MavenRepository("https://oss.sonatype.org/content/repositories/snapshots"),
+    MavenRepository("https://oss.sonatype.org/content/repositories/releases")
+  )
+
+  override def compileIvyDeps = Agg(macroParadise)
+
+  override def scalacPluginIvyDeps = Agg(macroParadise) ++ (if(chisel3Module.isDefined) Agg() else Agg(chisel3Plugin))
+
+  def publishVersion = T {
+    "1.2-SNAPSHOT"
+  }
+
+  def pomSettings = T {
+    PomSettings(
+      description = artifactName(),
+      organization = "edu.berkeley.cs",
+      url = "https://github.com/chipsalliance/rocket-chip",
+      licenses = Seq(License.`Apache-2.0`, License.`BSD-3-Clause`),
+      versionControl = VersionControl.github("chipsalliance", "rocket-chip"),
+      developers = Seq.empty
+    )
+  }
+  override def artifactName = "rocketchip"
+}
diff --git a/hardfloat b/hardfloat
index 3e63336a916..01904f99ed3 160000
--- a/hardfloat
+++ b/hardfloat
@@ -1 +1 @@
-Subproject commit 3e63336a916ea6b7ccacd0a7a14c2a5e3288cf6c
+Subproject commit 01904f99ed3ad26cdbe2876f638d63e30e7fecdc

From 529f71a13e2101b26f934c6574da8a410d07ffc6 Mon Sep 17 00:00:00 2001
From: Jiuyang liu <liujiuyang1994@gmail.com>
Date: Tue, 6 Oct 2020 03:02:50 +0000
Subject: [PATCH 2/2] update wit dependency.

---
 wit-manifest.json | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/wit-manifest.json b/wit-manifest.json
index c6cecf34048..51aeb8cb7c6 100644
--- a/wit-manifest.json
+++ b/wit-manifest.json
@@ -1,6 +1,6 @@
 [
     {
-        "commit": "3e63336a916ea6b7ccacd0a7a14c2a5e3288cf6c",
+        "commit": "01904f99ed3ad26cdbe2876f638d63e30e7fecdc",
         "name": "hardfloat",
         "source": "git@github.com:ucb-bar/berkeley-hardfloat.git"
     },
@@ -25,7 +25,7 @@
         "source": "git@github.com:ucb-bar/riscv-torture.git"
     },
     {
-        "commit": "d619ca850846d2ec36da64bf8a28e7d9a3d9ed1b",
+        "commit": "fd8df1105a92065425cd353b6855777e35bd79b4",
         "name": "api-config-chipsalliance",
         "source": "git@github.com:chipsalliance/api-config-chipsalliance.git"
     },