PROS 2.11.0 with updated license and exposed I2C functions

Author: sigbot

.gitignore

@@ -0,0 +1,9 @@
+bin/
+doc/
+libpros.a
+libpros_sym.a
+include/*.h.gch
+.clang_complete
+.gcc-flags.json
+.project
+.cproject

Doxyfile

@@ -0,0 +1,84 @@
+# Universal C Makefile for MCU targets
+
+LIBNAME=libpros
+
+# Path to project root (for top-level, so the project is in ./; first-level, ../; etc.)
+ROOT=.
+# Binary output directory
+BINDIR=$(ROOT)/bin
+# Subdirectories to include in the build
+SUBDIRS=src
+
+# Nothing below here needs to be modified by typical users
+
+# Include common aspects of this project
+-include $(ROOT)/common.mk
+
+ASMSRC:=$(wildcard *.$(ASMEXT))
+ASMOBJ:=$(patsubst %.o,$(BINDIR)/%.o,$(ASMSRC:.$(ASMEXT)=.o))
+HEADERS:=$(wildcard *.$(HEXT))
+CSRC=$(wildcard *.$(CEXT))
+COBJ:=$(patsubst %.o,$(BINDIR)/%.o,$(CSRC:.$(CEXT)=.o))
+CPPSRC:=$(wildcard *.$(CPPEXT))
+CPPOBJ:=$(patsubst %.o,$(BINDIR)/%.o,$(CPPSRC:.$(CPPEXT)=.o))
+OUT:=$(BINDIR)/$(OUTNAME)
+
+.PHONY: all clean documentation library upload _force_look
+
+# By default, compile program
+all: $(BINDIR) $(OUT)
+
+# Remove all intermediate object files (remove the binary directory)
+clean:
+	-rm -f $(OUT)
+	-rm -rf $(BINDIR)
+
+# Uploads program to device
+upload: all
+	$(UPLOAD)
+
+# Phony force-look target
+_force_look:
+	@true
+
+# Compiles library for general HS use
+library: clean $(BINDIR) $(SUBDIRS) $(ASMOBJ) $(COBJ) $(CPPOBJ)
+	# Get rid of junk that the user should be doing
+	-rm -f $(BINDIR)/opcontrol.o
+	-rm -f $(BINDIR)/init.o
+	-rm -f $(BINDIR)/auto.o
+	$(MCUPREFIX)ar rvs $(BINDIR)/$(LIBNAME)_sym.a $(BINDIR)/*.o
+	$(MCUPREFIX)objcopy -S -g --strip-unneeded --keep-symbols public.txt $(BINDIR)/$(LIBNAME)_sym.a $(BINDIR)/$(LIBNAME).a
+
+# Builds the documentation
+documentation:
+	doxygen Doxyfile
+
+# Looks in subdirectories for things to make
+$(SUBDIRS): %: _force_look
+	@$(MAKE) --no-print-directory -C $@
+
+# Ensure binary directory exists
+$(BINDIR):
+	-@mkdir -p $(BINDIR)
+
+# Compile program
+$(OUT): $(SUBDIRS) $(ASMOBJ) $(COBJ) $(CPPOBJ)
+	@echo LN $(BINDIR)/*.o $(LIBRARIES) to $@
+	@$(CC) $(LDFLAGS) $(BINDIR)/*.o $(LIBRARIES) -o $@
+	@$(MCUPREFIX)size $(SIZEFLAGS) $(OUT)
+	$(MCUPREPARE)
+
+# Assembly source file management
+$(ASMOBJ): $(BINDIR)/%.o: %.$(ASMEXT) $(HEADERS)
+	@echo AS $<
+	@$(AS) $(AFLAGS) -o $@ $<
+
+# Object management
+$(COBJ): $(BINDIR)/%.o: %.$(CEXT) $(HEADERS)
+	@echo CC $(INCLUDE) $<
+	@$(CC) $(INCLUDE) $(CFLAGS) -o $@ $<
+
+$(CPPOBJ): $(BINDIR)/%.o: %.$(CPPEXT) $(HEADERS)
+	@echo CPC $(INCLUDE) $<
+	@$(CPPCC) $(INCLUDE) $(CPPFLAGS) -o $@ $<

LICENSE

@@ -0,0 +1,45 @@
+# Universal C Makefile for MCU targets
+# Top-level template file to configure build
+
+# Makefile for IFI VeX Cortex Microcontroller (STM32F103VD series)
+DEVICE=VexCortex
+# Libraries to include in the link (use -L and -l) e.g. -lm, -lmyLib
+LIBRARIES=-lgcc -lm
+# Prefix for ARM tools (must be on the path)
+MCUPREFIX=arm-none-eabi-
+# Flags for the assembler
+MCUAFLAGS=-mthumb -mcpu=cortex-m3 -mlittle-endian
+# Flags for the compiler
+MCUCFLAGS=-mthumb -mcpu=cortex-m3 -mlittle-endian
+# Flags for the linker
+MCULFLAGS=-nostartfiles -Wl,-static -Bfirmware -Wl,-T -Xlinker firmware/cortex.ld
+# Prepares the elf file by converting it to a binary that java can write
+MCUPREPARE=$(OBJCOPY) $(OUT) -O binary $(BINDIR)/$(OUTBIN)
+# Advanced sizing flags
+SIZEFLAGS=
+# Uploads program using java
+UPLOAD=@java -jar firmware/uniflash.jar vex $(BINDIR)/$(OUTBIN)
+
+# Advanced options
+ASMEXT=s
+CEXT=c
+CPPEXT=cpp
+HEXT=h
+INCLUDE=-I$(ROOT)/include -I$(ROOT)/src
+OUTBIN=output.bin
+OUTNAME=output.elf
+
+# Flags for programs
+AFLAGS:=$(MCUAFLAGS)
+ARFLAGS:=$(MCUCFLAGS)
+CCFLAGS:=-c -Wall $(MCUCFLAGS) -Os -ffunction-sections -fsigned-char -fomit-frame-pointer -fsingle-precision-constant
+CFLAGS:=$(CCFLAGS) -std=gnu99 -Werror=implicit-function-declaration
+CPPFLAGS:=$(CCFLAGS) -fno-exceptions -fno-rtti -felide-constructors
+LDFLAGS:=-Wall $(MCUCFLAGS) $(MCULFLAGS) -Wl,--gc-sections
+
+# Tools used in program
+AR:=$(MCUPREFIX)ar
+AS:=$(MCUPREFIX)as
+CC:=$(MCUPREFIX)gcc
+CPPCC:=$(MCUPREFIX)g++
+OBJCOPY:=$(MCUPREFIX)objcopy

Makefile

@@ -0,0 +1,100 @@
+/* Memory space definitions */
+MEMORY {
+	RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
+	FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K
+}
+
+/* Higher address of the user mode stack */
+EXTERN ( _estack );
+PROVIDE ( _estack = ORIGIN(RAM) + LENGTH(RAM) );
+
+/* This sends all unreferenced IRQHandlers to reset. */
+PROVIDE ( ISR_SWI = 0 );
+PROVIDE ( ISR_IRQ = 0 );
+PROVIDE ( ISR_Prefetch = 0 );
+PROVIDE ( ISR_Abort = 0 );
+PROVIDE ( ISR_FIQ = 0 );
+
+PROVIDE ( ISR_NMI = 0 );
+PROVIDE ( ISR_HardFault = 0 );
+PROVIDE ( ISR_MemManage = 0 );
+PROVIDE ( ISR_BusFault = 0 );
+PROVIDE ( ISR_UsageFault = 0 );
+
+PROVIDE ( ISR_SVC = 0 );
+PROVIDE ( ISR_DebugMon = 0 );
+PROVIDE ( ISR_PendSV = 0 );
+PROVIDE ( ISR_SysTick = 0 );
+
+PROVIDE ( ISR_WWDG = 0 );
+PROVIDE ( ISR_PVD = 0 );
+PROVIDE ( ISR_TAMPER = 0 );
+PROVIDE ( ISR_RTC = 0 );
+PROVIDE ( ISR_FLASH = 0 );
+PROVIDE ( ISR_RCC = 0 );
+PROVIDE ( ISR_EXTI0 = 0 );
+PROVIDE ( ISR_EXTI1 = 0 );
+PROVIDE ( ISR_EXTI2 = 0 );
+PROVIDE ( ISR_EXTI3 = 0 );
+PROVIDE ( ISR_EXTI4 = 0 );
+PROVIDE ( ISR_DMAChannel1 = 0 );
+PROVIDE ( ISR_DMAChannel2 = 0 );
+PROVIDE ( ISR_DMAChannel3 = 0 );
+PROVIDE ( ISR_DMAChannel4 = 0 );
+PROVIDE ( ISR_DMAChannel5 = 0 );
+PROVIDE ( ISR_DMAChannel6 = 0 );
+PROVIDE ( ISR_DMAChannel7 = 0 );
+PROVIDE ( ISR_DMA1_Channel1 = 0 );
+PROVIDE ( ISR_DMA1_Channel2 = 0 );
+PROVIDE ( ISR_DMA1_Channel3 = 0 );
+PROVIDE ( ISR_DMA1_Channel4 = 0 );
+PROVIDE ( ISR_DMA1_Channel5 = 0 );
+PROVIDE ( ISR_DMA1_Channel6 = 0 );
+PROVIDE ( ISR_DMA1_Channel7 = 0 );
+PROVIDE ( ISR_ADC = 0 );
+PROVIDE ( ISR_ADC1_2 = 0 );
+PROVIDE ( ISR_USB_HP_CAN_TX = 0 );
+PROVIDE ( ISR_USB_HP_CAN1_TX = 0 );
+PROVIDE ( ISR_USB_LP_CAN_RX0 = 0 );
+PROVIDE ( ISR_USB_LP_CAN1_RX0 = 0 );
+PROVIDE ( ISR_CAN_RX1 = 0 );
+PROVIDE ( ISR_CAN1_RX1 = 0 );
+PROVIDE ( ISR_CAN_SCE = 0 );
+PROVIDE ( ISR_CAN1_SCE = 0 );
+PROVIDE ( ISR_EXTI9_5 = 0 );
+PROVIDE ( ISR_TIM1_BRK = 0 );
+PROVIDE ( ISR_TIM1_UP = 0 );
+PROVIDE ( ISR_TIM1_TRG_COM = 0 );
+PROVIDE ( ISR_TIM1_CC = 0 );
+PROVIDE ( ISR_TIM2 = 0 );
+PROVIDE ( ISR_TIM3 = 0 );
+PROVIDE ( ISR_TIM4 = 0 );
+PROVIDE ( ISR_I2C1_EV = 0 );
+PROVIDE ( ISR_I2C1_ER = 0 );
+PROVIDE ( ISR_I2C2_EV = 0 );
+PROVIDE ( ISR_I2C2_ER = 0 );
+PROVIDE ( ISR_SPI1 = 0 );
+PROVIDE ( ISR_SPI2 = 0 );
+PROVIDE ( ISR_USART1 = 0 );
+PROVIDE ( ISR_USART2 = 0 );
+PROVIDE ( ISR_USART3 = 0 );
+PROVIDE ( ISR_EXTI15_10 = 0 );
+PROVIDE ( ISR_RTCAlarm = 0 );
+PROVIDE ( ISR_USBWakeUp = 0 );
+PROVIDE ( ISR_TIM8_BRK = 0 );
+PROVIDE ( ISR_TIM8_UP = 0 );
+PROVIDE ( ISR_TIM8_TRG_COM = 0 );
+PROVIDE ( ISR_TIM8_CC = 0 );
+PROVIDE ( ISR_ADC3 = 0 );
+PROVIDE ( ISR_FSMC = 0 );
+PROVIDE ( ISR_SDIO = 0 );
+PROVIDE ( ISR_TIM5 = 0 );
+PROVIDE ( ISR_SPI3 = 0 );
+PROVIDE ( ISR_UART4 = 0 );
+PROVIDE ( ISR_UART5 = 0 );
+PROVIDE ( ISR_TIM6 = 0 );
+PROVIDE ( ISR_TIM7 = 0 );
+PROVIDE ( ISR_DMA2_Channel1 = 0 );
+PROVIDE ( ISR_DMA2_Channel2 = 0 );
+PROVIDE ( ISR_DMA2_Channel3 = 0 );
+PROVIDE ( ISR_DMA2_Channel4_5 = 0 );

README.md

@@ -0,0 +1,123 @@
+/* Include STM32F10X linker scripts */
+INCLUDE "STM32F10x.ld"
+
+EXTERN ( _heapbegin );
+
+/* Section definitions for Cortex firmware flashing */
+SECTIONS {
+	.isr_vector : {
+		/* startup code, prevents garbage collection from eating everything */
+		KEEP(*(.isr_vector))
+	. = ALIGN(4);
+	} >FLASH
+	.text : {
+	. = ALIGN(4);
+		*(.text)
+		*(.text.*)
+		/* Preinit array of functions */
+		__preinit_array_start = .;
+		KEEP (*(.preinit_array))
+		__preinit_array_end = .;
+		. = ALIGN(4);
+		/* Init array of functions */
+		KEEP(*(.init))
+		. = ALIGN(4);
+		__init_array_start = .;
+		KEEP (*(SORT(.init_array.*)))
+		KEEP (*(.init_array))
+		__init_array_end = .;
+		. = ALIGN(4);
+		/* C++ constructors */
+		KEEP (*crtbegin.o(.ctors))
+		KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+		KEEP (*(SORT(.ctors.*)))
+		KEEP (*crtend.o(.ctors))
+		. = ALIGN(4);
+		/* Finalizer array of functions */
+		KEEP(*(.fini))
+		. = ALIGN(4);
+		__fini_array_start = .;
+		KEEP (*(.fini_array))
+		KEEP (*(SORT(.fini_array.*)))
+		__fini_array_end = .;
+		. = ALIGN(4);
+		/* C++ destructors */
+		KEEP (*crtbegin.o(.dtors))
+		KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+		KEEP (*(SORT(.dtors.*)))
+		KEEP (*crtend.o(.dtors))
+		_etext = .;
+		_srdata = .;
+	. = ALIGN(4);
+		*(.rodata)
+		*(.rodata*)
+		*(.glue_7)
+		*(.glue_7t)
+	. = ALIGN(4);
+		_erdata = .;
+		_sidata = .;
+	} >FLASH
+	/* The program executes knowing that the data is in the RAM, but the loader puts the
+	 * initial values in the FLASH (inidata). The startup copies the initial values over */
+	.data : AT ( _sidata ) {
+	. = ALIGN(4);
+		_sdata = .;
+		*(.data)
+		*(.data.*)
+		*(.RAMtext)
+	. = ALIGN(4);
+   		_edata = .;
+	} >RAM
+	/* Uninitialized data (zero-fill) section */
+	.bss : {
+	. = ALIGN(4);
+		_sbss = .;
+		*(.bss)
+		*(COMMON)
+	. = ALIGN(4);
+		_ebss = .;
+	. = ALIGN(8);
+		_heapbegin = .;
+	} >RAM
+
+	/DISCARD/ : {
+		libc.a ( * )
+		libg.a ( * )
+		libm.a ( * )
+		libgcc.a ( * )
+		libstdc++.a ( * )
+		libsupc++.a ( * )
+	}
+	/* ARM exception unwinding, mandated by ARM EABI C++ standard (with -fno-exceptions?) */
+	.ARM.exidx 0 : { *(.ARM.exidx*) }
+	/* Stabs debugging sections */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index	0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	/* DWARF 1 */
+	.debug 0 : { *(.debug) }
+	.line 0 : { *(.line) }
+	/* GNU DWARF 1 extensions */
+	.debug_srcinfo 0 : { *(.debug_srcinfo) }
+	.debug_sfnames 0 : { *(.debug_sfnames) }
+	/* DWARF 1.1 and DWARF 2 */
+	.debug_aranges 0 : { *(.debug_aranges) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	/* DWARF 2 */
+	.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_frame 0 : { *(.debug_frame) }
+	.debug_str 0 : { *(.debug_str) }
+	.debug_loc 0 : { *(.debug_loc) }
+	.debug_macinfo 0 : { *(.debug_macinfo) }
+	/* SGI/MIPS DWARF 2 extensions */
+	.debug_weaknames 0 : { *(.debug_weaknames) }
+	.debug_funcnames 0 : { *(.debug_funcnames) }
+	.debug_typenames 0 : { *(.debug_typenames) }
+	.debug_varnames 0 : { *(.debug_varnames) }
+}