diff --git a/.codespellrc b/.codespellrc new file mode 100644 index 000000000..1e707155e --- /dev/null +++ b/.codespellrc @@ -0,0 +1,10 @@ +# See: https://github.com/codespell-project/codespell#using-a-config-file +[codespell] +# In the event of a false positive, add the problematic word, in all lowercase, to 'ignore-words.txt' (one word per line). +# Or copy & paste the whole problematic line to 'exclude-file.txt' +ignore-words = tools/codespell/ignore-words.txt +exclude-file = tools/codespell/exclude-file.txt +check-filenames = +check-hidden = +count = +skip = .git,./lib diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 083b0fa52..23f71232a 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -46,7 +46,7 @@ jobs: - 'sparkfun_stm32_thing_plus' # stm32l4 - 'swan_r5' - + steps: - name: Setup Python uses: actions/setup-python@v4 diff --git a/.github/workflows/build_esp32.yml b/.github/workflows/build_esp32.yml index 04f4907a9..f40525ceb 100644 --- a/.github/workflows/build_esp32.yml +++ b/.github/workflows/build_esp32.yml @@ -121,7 +121,7 @@ jobs: run: echo BIN_PATH=ports/espressif/_bin/${{ matrix.board }} >> $GITHUB_ENV - name: Build - run: docker run --rm -v $PWD:/project -w /project espressif/idf:v4.4.3 /bin/bash -c "git config --global --add safe.directory /project && make -C ports/espressif/ BOARD=${{ matrix.board }} all self-update copy-artifact" + run: docker run --rm -v $PWD:/project -w /project espressif/idf:v5.1.1 /bin/bash -c "git config --global --add safe.directory /project && make -C ports/espressif/ BOARD=${{ matrix.board }} all self-update copy-artifact" - uses: actions/upload-artifact@v3 with: @@ -149,4 +149,4 @@ jobs: if: ${{ github.event_name == 'release' }} run: | [ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.zip s3://adafruit-circuit-python/bootloaders/esp32/tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.zip --no-progress --region us-east-1 - [ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp update-tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.uf2 s3://adafruit-circuit-python/bootloaders/esp32/update-tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.uf2 --no-progress --region us-east-1 \ No newline at end of file + [ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp update-tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.uf2 s3://adafruit-circuit-python/bootloaders/esp32/update-tinyuf2-${{ matrix.board }}-${{ github.event.release.tag_name }}.uf2 --no-progress --region us-east-1 diff --git a/.github/workflows/build_selftest.yml b/.github/workflows/build_selftest.yml index aa7e31dd0..e57acdcfa 100644 --- a/.github/workflows/build_selftest.yml +++ b/.github/workflows/build_selftest.yml @@ -75,7 +75,7 @@ jobs: gzip --keep ghostfat_${{ matrix.board }}.img gzip --keep --force --best ghostfat_${{ matrix.board }}.img.gz popd - + - name: Save newly generated self-test images as CI artifacts if: always() uses: actions/upload-artifact@v3 diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml new file mode 100644 index 000000000..f24457b50 --- /dev/null +++ b/.github/workflows/pre-commit.yml @@ -0,0 +1,25 @@ +name: pre-commit + +on: + workflow_dispatch: + push: + pull_request: + +concurrency: + group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }} + cancel-in-progress: true + +jobs: + pre-commit: + runs-on: ubuntu-latest + steps: + - name: Setup Python + uses: actions/setup-python@v4 + with: + python-version: '3.x' + + - name: Checkout code + uses: actions/checkout@v3 + + - name: Run pre-commit + uses: pre-commit/action@v3.0.0 diff --git a/.gitignore b/.gitignore index 8fcdd4f80..9278631bd 100644 --- a/.gitignore +++ b/.gitignore @@ -1,5 +1,4 @@ /sdkconfig -.settings/ *.o *.d *.P @@ -9,3 +8,4 @@ _bin/ *.cmake~ sdkconfig~ *.yml~ +ports/espressif/apps/self_update/main/bootloader_bin.c diff --git a/.gitmodules b/.gitmodules index 113bda8fa..be4b44d64 100644 --- a/.gitmodules +++ b/.gitmodules @@ -13,9 +13,6 @@ [submodule "lib/tinyusb"] path = lib/tinyusb url = https://github.com/hathach/tinyusb.git -[submodule "lib/esp-idf"] - path = lib/esp-idf - url = https://github.com/espressif/esp-idf.git [submodule "lib/uf2"] path = lib/uf2 url = https://github.com/microsoft/uf2.git diff --git a/.idea/cmake.xml b/.idea/cmake.xml new file mode 100644 index 000000000..a3360a173 --- /dev/null +++ b/.idea/cmake.xml @@ -0,0 +1,53 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml new file mode 100644 index 000000000..19233e51c --- /dev/null +++ b/.pre-commit-config.yaml @@ -0,0 +1,31 @@ +# SPDX-FileCopyrightText: 2020 Diego Elio Pettenò +# +# SPDX-License-Identifier: Unlicense + +repos: +- repo: https://github.com/pre-commit/pre-commit-hooks + rev: v4.4.0 + hooks: + - id: check-yaml + - id: trailing-whitespace + exclude: | + (?x)^( + lib/| + ports/espressif/components/bootloader/subproject/components + ) + - id: end-of-file-fixer + exclude: | + (?x)^( + lib/| + .idea/ + ) + +- repo: https://github.com/codespell-project/codespell + rev: v2.2.4 + hooks: + - id: codespell + args: [-w] + exclude: | + (?x)^( + lib/ + ) diff --git a/README.md b/README.md index b9aedac04..f4f919f34 100644 --- a/README.md +++ b/README.md @@ -9,10 +9,10 @@ This repo is cross-platform UF2 Bootloader projects for MCUs based on [TinyUSB]( ├── apps # Useful applications such as self-update, erase firmware ├── lib # Sources from 3rd party such as tinyusb, mcu drivers ... ├── ports # Port/family specific sources -│   ├── espressif -│   │   └── boards/ # Board specific sources -│   │   └── Makefile # Makefile for this port -│   └── mimxrt10xx +│ ├── espressif +│ │ └── boards/ # Board specific sources +│ │ └── Makefile # Makefile for this port +│ └── mimxrt10xx ├── src # Cross-platform bootloader sources files ``` @@ -49,7 +49,7 @@ To build this for a specific board, we need to change current directory to its p $ cd ports/stm32f4 ``` -Firstly we need to get all of submodule dependecy for our board e.g mcu driver with `get-deps` target. You only need to do this once for each mcu family +Firstly we need to get all of submodule dependency for our board e.g mcu driver with `get-deps` target. You only need to do this once for each mcu family ``` make BOARD=feather_stm32f405_express get-deps @@ -81,7 +81,7 @@ $ make BOARD=feather_stm32f405_express DEBUG=1 all #### Log -Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional `LOG=`. +Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional `LOG=`. - **LOG=1** will print message from bootloader and error if any from TinyUSB stack. - **LOG=2** and **LOG=3** will print more information with TinyUSB stack events @@ -91,7 +91,7 @@ $ make BOARD=feather_stm32f405_express LOG=1 all #### Logger -By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: +By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: - `LOGGER=rtt`: use [Segger RTT protocol](https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/) - Cons: requires jlink as the debugger. diff --git a/apps/self_update/CMakeLists.txt b/apps/self_update/CMakeLists.txt deleted file mode 100644 index 892e0c386..000000000 --- a/apps/self_update/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -idf_component_register(SRCS self_update.c bootloader_bin.c - INCLUDE_DIRS "." - REQUIRES boards) diff --git a/changelog.md b/changelog.md index 1666cb743..62f3ba1c8 100644 --- a/changelog.md +++ b/changelog.md @@ -50,7 +50,7 @@ Added new boards: MorphESP-240 ESP32S2, Lolin S2 Mini, Espressif HMI devkit ## 0.4.0 - Add support for multiple sectors per cluster in GhostFAT to enable larger flash sizes - - Add native test for ghostfat with varous checks + - Add native test for ghostfat with various checks - Add new board API: - board_reset() - board_flash_erase_app() @@ -59,7 +59,7 @@ Added new boards: MorphESP-240 ESP32S2, Lolin S2 Mini, Espressif HMI devkit - Add `erase_firmware` application target (only implemented for iMXRT for now). - TinyUF2 will erase whole flash if `MAGIC_ERASE_APP` is written by application. - `erase_firmware.uf2` is also uploaded as part of build/release asset if available -- No major chagnes to LPC55, STM32 F3 F4 +- No major changes to LPC55, STM32 F3 F4 ### ESP32-S2 @@ -71,7 +71,7 @@ Added new boards: MorphESP-240 ESP32S2, Lolin S2 Mini, Espressif HMI devkit ### iMXRT -- Always write tinyuf2 image to flash if loaded in Serial Donwload mode (Boot Mode = 01) +- Always write tinyuf2 image to flash if loaded in Serial Download mode (Boot Mode = 01) - Add `erase_firmware.uf2` to erase the whole flash except bootloader - Add sdphost binary for arm 32bit e.g raspberry pi 4 - Add `esp32programmer.uf2` app for selected board. diff --git a/lib/esp-idf b/lib/esp-idf deleted file mode 160000 index bbe2a1bf3..000000000 --- a/lib/esp-idf +++ /dev/null @@ -1 +0,0 @@ -Subproject commit bbe2a1bf349ab67c32805d40ce43a91f539d6b73 diff --git a/ports/espressif/CMakeLists.txt b/ports/espressif/CMakeLists.txt index ee74db06c..21b5cd263 100644 --- a/ports/espressif/CMakeLists.txt +++ b/ports/espressif/CMakeLists.txt @@ -29,3 +29,8 @@ add_compile_definitions(UF2_VERSION="${GIT_VERSION} - ${GIT_SUBMODULE_VERSIONS}" cmake_print_variables(GIT_VERSION GIT_SUBMODULE_VERSIONS) project(tinyuf2) + +# Post build: generate bootloader_bin.c for self-update and combined.bin +add_custom_command(TARGET app POST_BUILD + COMMAND ${Python_EXECUTABLE} ${UF2CONV_PY} --carray -o ${CMAKE_SOURCE_DIR}/apps/self_update/main/bootloader_bin.c ${CMAKE_BINARY_DIR}/tinyuf2.bin + ) diff --git a/ports/espressif/Makefile b/ports/espressif/Makefile index a865dc8dd..a778354d1 100644 --- a/ports/espressif/Makefile +++ b/ports/espressif/Makefile @@ -50,15 +50,13 @@ combined-flash: $(BUILD)/combined.bin esptool.py --chip $(IDF_TARGET) write_flash 0x0 $< #-------------- Self Update -------------- -SELF_BUILD = apps/self_update/$(BUILD) +SELF_APP = apps/self_update +SELF_BUILD = ${SELF_APP}/${BUILD} -$(SELF_BUILD)/update-tinyuf2.bin: app - $(PYTHON3) $(TOP)/lib/uf2/utils/uf2conv.py --carray $(BUILD)/tinyuf2.bin -o $(TOP)/apps/self_update/bootloader_bin.c - idf.py -C apps/self_update/ -B$(SELF_BUILD) -DBOARD=$(BOARD) app - @rm $(TOP)/apps/self_update/bootloader_bin.c - -$(SELF_BUILD)/update-tinyuf2.uf2: $(SELF_BUILD)/update-tinyuf2.bin - $(PYTHON3) $(TOP)/lib/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID_$(IDF_TARGET)) -b 0x0000 -c -o $@ $^ +# cmake post build of tinyuf2's app will generate bootloader_bin.c +# cmake post build of self-update's app will generate update-tinyuf2.uf2 +$(SELF_BUILD)/update-tinyuf2.uf2: app + idf.py -C ${SELF_APP} -B${SELF_BUILD} -DBOARD=${BOARD} app self-update: $(SELF_BUILD)/update-tinyuf2.uf2 diff --git a/ports/espressif/README.md b/ports/espressif/README.md index bf8651fd3..caab3aeaa 100644 --- a/ports/espressif/README.md +++ b/ports/espressif/README.md @@ -1,6 +1,8 @@ # TinyUF2 "Bootloader Application" for ESP32-S2 and ESP32-S3 -The project is composed of customizing the 2nd stage bootloader from IDF and UF2 factory application as 3rd stage bootloader. **Note**: since IDF is actively developed and change very often, it is included as submodule at `lib/esp-idf`, please run export script there to have your environment setup correctly. +The project is composed of customizing the 2nd stage bootloader from IDF and UF2 factory application as 3rd stage bootloader. + +**Note**: IDF is actively developed and change very often, TinyUF2 is developed and tested with IDF v5.1.1. Should you have a problem please try to change your IDF version. Following boards are supported: @@ -33,7 +35,7 @@ Following boards are supported: ### Build -You will need to download and [set up ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/) or [set up ESP-IDF for ESP32-S3](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/get-started/). The IDF version is developed and tested by TinyUF2 is at `lib/esp-idf` +Once installed and setup ESP-IDF, you can build with all target ``` make BOARD=adafruit_feather_esp32s2 all diff --git a/ports/espressif/apps/self_update/CMakeLists.txt b/ports/espressif/apps/self_update/CMakeLists.txt index 3183423b7..415db1c2c 100644 --- a/ports/espressif/apps/self_update/CMakeLists.txt +++ b/ports/espressif/apps/self_update/CMakeLists.txt @@ -1,30 +1,21 @@ -# The following five lines of boilerplate have to be in your project's -# CMakeLists in this exact order for cmake to work correctly -cmake_minimum_required(VERSION 3.5) - -# Check for -DBOARD= -if(NOT (DEFINED BOARD AND EXISTS "${CMAKE_SOURCE_DIR}/../../boards/${BOARD}/board.h") ) - file(GLOB BOARD_LIST RELATIVE ${CMAKE_SOURCE_DIR}/../../boards "boards/*/board.h") - - message("Please specify `-DBOARD=` with one of supported boards") - foreach(board IN LISTS BOARD_LIST) - string(REPLACE "/board.h" "" board ${board}) - message("- ${board}") - endforeach() - - message(FATAL_ERROR "Invalid BOARD specified") -endif() - -include(${CMAKE_SOURCE_DIR}/../../boards/${BOARD}/board.cmake) - -# TOP is absolute path to root directory -set(TOP "../../../..") -get_filename_component(TOP "${TOP}" REALPATH) - -set(EXTRA_COMPONENT_DIRS "${TOP}/apps/self_update" "../../boards" "../../components") - -include($ENV{IDF_PATH}/tools/cmake/project.cmake) - -add_compile_definitions(TINYUF2_SELF_UPDATE) - -project(update-tinyuf2) +# The following five lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.17) + +include(${CMAKE_CURRENT_LIST_DIR}/../../../family_support.cmake) +include(${CMAKE_CURRENT_LIST_DIR}/../../boards/${BOARD}/board.cmake) + +# Must be set before including IDF project.cmake +set(EXTRA_COMPONENT_DIRS "../../boards" "../../components") + +set(SELFUPDATE_BUILD 1) +include($ENV{IDF_PATH}/tools/cmake/project.cmake) + +add_compile_definitions(TINYUF2_SELF_UPDATE) + +project(update-tinyuf2) + +add_custom_command(TARGET app POST_BUILD + COMMAND ${Python_EXECUTABLE} ${UF2CONV_PY} -f ${UF2_FAMILY_ID_${IDF_TARGET}} -b 0x0 -c -o ${CMAKE_BINARY_DIR}/update-tinyuf2.uf2 ${CMAKE_BINARY_DIR}/update-tinyuf2.bin + VERBATIM + ) diff --git a/ports/espressif/apps/self_update/main/CMakeLists.txt b/ports/espressif/apps/self_update/main/CMakeLists.txt new file mode 100644 index 000000000..018e68468 --- /dev/null +++ b/ports/espressif/apps/self_update/main/CMakeLists.txt @@ -0,0 +1,4 @@ +# Note: bootloader_bin.c is generated by tinyuf2 app target +idf_component_register(SRCS ${TOP}/apps/self_update/self_update.c bootloader_bin.c + INCLUDE_DIRS ${TOP}/src + REQUIRES boards) diff --git a/ports/espressif/apps/self_update/sdkconfig.defaults b/ports/espressif/apps/self_update/sdkconfig.defaults index f8f6106ec..9d26177ac 100644 --- a/ports/espressif/apps/self_update/sdkconfig.defaults +++ b/ports/espressif/apps/self_update/sdkconfig.defaults @@ -1,16 +1,16 @@ -CONFIG_IDF_CMAKE=y -CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y -CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y - -# Compiler options -CONFIG_COMPILER_OPTIMIZATION_SIZE=y -CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y - -# Newlib -CONFIG_NEWLIB_NANO_FORMAT=y - -# Virtual file system -CONFIG_VFS_SUPPORT_IO=n - -# Compatibility options -CONFIG_FLASHMODE_QIO=y +CONFIG_IDF_CMAKE=y +CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y + +# Compiler options +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y + +# Newlib +CONFIG_NEWLIB_NANO_FORMAT=y + +# Virtual file system +CONFIG_VFS_SUPPORT_IO=n + +# Compatibility options +CONFIG_FLASHMODE_QIO=y diff --git a/ports/espressif/boards/CMakeLists.txt b/ports/espressif/boards/CMakeLists.txt index 010dc6327..e9ed8a8c5 100644 --- a/ports/espressif/boards/CMakeLists.txt +++ b/ports/espressif/boards/CMakeLists.txt @@ -1,13 +1,3 @@ idf_component_register(SRCS boards.c board_flash.c ${BOARD_SOURCES} - INCLUDE_DIRS "." "${BOARD}" ${BOARD_INCLUDES} - #PRIV_REQUIRES "driver" - REQUIRES app_update spi_flash led_strip lcd ssd1306 XPowersLib) - -idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH) - -target_include_directories(${COMPONENT_TARGET} PUBLIC - "${FREERTOS_ORIG_INCLUDE_PATH}" - "${TOP}/src" - "${TOP}/lib/tinyusb/src" - "${TOP}/ports/espressif" -) + INCLUDE_DIRS "." "${BOARD}" ${BOARD_INCLUDES} ${TOP}/src + REQUIRES driver esp_timer app_update spi_flash led_strip lcd ssd1306 XPowersLib tinyusb_src) diff --git a/ports/espressif/boards/adafruit_camera_esp32s3/board.h b/ports/espressif/boards/adafruit_camera_esp32s3/board.h index c26b11af5..4e4bade0f 100644 --- a/ports/espressif/boards/adafruit_camera_esp32s3/board.h +++ b/ports/espressif/boards/adafruit_camera_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s2/board.h b/ports/espressif/boards/adafruit_feather_esp32s2/board.h index ad8ca6cc9..b868af231 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s2/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s2_reverse_tft/board.h b/ports/espressif/boards/adafruit_feather_esp32s2_reverse_tft/board.h index 8880c6ff2..e1b1af29d 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s2_reverse_tft/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s2_reverse_tft/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s2_tft/board.h b/ports/espressif/boards/adafruit_feather_esp32s2_tft/board.h index b040f7a0d..ecedf3db7 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s2_tft/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s2_tft/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s3/board.h b/ports/espressif/boards/adafruit_feather_esp32s3/board.h index 51715fee1..8ca73d1b4 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s3/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s3_nopsram/board.h b/ports/espressif/boards/adafruit_feather_esp32s3_nopsram/board.h index 16259021e..7596fd98c 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s3_nopsram/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s3_nopsram/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s3_reverse_tft/board.h b/ports/espressif/boards/adafruit_feather_esp32s3_reverse_tft/board.h index e98026545..52a89909b 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s3_reverse_tft/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s3_reverse_tft/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_feather_esp32s3_tft/board.h b/ports/espressif/boards/adafruit_feather_esp32s3_tft/board.h index c85ab331e..4889faddf 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s3_tft/board.h +++ b/ports/espressif/boards/adafruit_feather_esp32s3_tft/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_funhouse_esp32s2/board.h b/ports/espressif/boards/adafruit_funhouse_esp32s2/board.h index b2946dba4..7689cf4ca 100644 --- a/ports/espressif/boards/adafruit_funhouse_esp32s2/board.h +++ b/ports/espressif/boards/adafruit_funhouse_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_magtag_29gray/board.h b/ports/espressif/boards/adafruit_magtag_29gray/board.h index bcb83e527..25f35c5b5 100644 --- a/ports/espressif/boards/adafruit_magtag_29gray/board.h +++ b/ports/espressif/boards/adafruit_magtag_29gray/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_matrixportal_s3/board.h b/ports/espressif/boards/adafruit_matrixportal_s3/board.h index 1465e6f13..6c6557329 100644 --- a/ports/espressif/boards/adafruit_matrixportal_s3/board.h +++ b/ports/espressif/boards/adafruit_matrixportal_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_metro_esp32s2/board.h b/ports/espressif/boards/adafruit_metro_esp32s2/board.h index 0c4527b61..366516278 100644 --- a/ports/espressif/boards/adafruit_metro_esp32s2/board.h +++ b/ports/espressif/boards/adafruit_metro_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_metro_esp32s3/board.h b/ports/espressif/boards/adafruit_metro_esp32s3/board.h index 23b23f7d8..bff49a98d 100644 --- a/ports/espressif/boards/adafruit_metro_esp32s3/board.h +++ b/ports/espressif/boards/adafruit_metro_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_mylittlehacker_esp32s2/board.h b/ports/espressif/boards/adafruit_mylittlehacker_esp32s2/board.h index 51ecd6faf..e1188bc0e 100644 --- a/ports/espressif/boards/adafruit_mylittlehacker_esp32s2/board.h +++ b/ports/espressif/boards/adafruit_mylittlehacker_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_qtpy_esp32s2/board.h b/ports/espressif/boards/adafruit_qtpy_esp32s2/board.h index 547ba5563..84040f255 100644 --- a/ports/espressif/boards/adafruit_qtpy_esp32s2/board.h +++ b/ports/espressif/boards/adafruit_qtpy_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/adafruit_qtpy_esp32s3/board.h b/ports/espressif/boards/adafruit_qtpy_esp32s3/board.h index 3f6d8f5dc..c096f01b4 100644 --- a/ports/espressif/boards/adafruit_qtpy_esp32s3/board.h +++ b/ports/espressif/boards/adafruit_qtpy_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -73,7 +73,7 @@ #define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT #define UF2_BOARD_ID "ESP32S3-QTPy-A" #define UF2_VOLUME_LABEL "QTPYS3BOOT" -#define UF2_INDEX_URL "https://adafruit.com/product/5426" +#define UF2_INDEX_URL "https://adafruit.com/product/5426" #define TINYUF2_FAVICON_HEADER "favicon_adafruit_256.h" diff --git a/ports/espressif/boards/adafruit_tftexperimenter_esp32s3/board.h b/ports/espressif/boards/adafruit_tftexperimenter_esp32s3/board.h index b08f66d09..e6bfc5342 100644 --- a/ports/espressif/boards/adafruit_tftexperimenter_esp32s3/board.h +++ b/ports/espressif/boards/adafruit_tftexperimenter_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/artisense_rd00/board.h b/ports/espressif/boards/artisense_rd00/board.h index b3707a727..0126ca642 100644 --- a/ports/espressif/boards/artisense_rd00/board.h +++ b/ports/espressif/boards/artisense_rd00/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/atmegazero_esp32s2/board.h b/ports/espressif/boards/atmegazero_esp32s2/board.h index 53c332b82..4fb354858 100644 --- a/ports/espressif/boards/atmegazero_esp32s2/board.h +++ b/ports/espressif/boards/atmegazero_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/boards.c b/ports/espressif/boards/boards.c index a3f59032b..8d96aa394 100644 --- a/ports/espressif/boards/boards.c +++ b/ports/espressif/boards/boards.c @@ -24,18 +24,18 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" -#include "freertos/timers.h" -#include "esp_rom_gpio.h" +#include "driver/rmt.h" #include "hal/gpio_ll.h" #include "hal/usb_hal.h" #include "soc/usb_periph.h" - -#include "driver/periph_ctrl.h" -#include "driver/rmt.h" +#include "esp_private/periph_ctrl.h" #include "esp_partition.h" #include "esp_ota_ops.h" +#include "esp_mac.h" +#include "esp_timer.h" + #include "board_api.h" #ifndef TINYUF2_SELF_UPDATE @@ -161,16 +161,16 @@ void board_init(void) i2c_master_write_byte(cmd, TCA9554_CONFIGURATION_REG, true); i2c_master_write_byte(cmd, TCA9554_DEFAULT_CONFIG, true); i2c_master_stop(cmd); - i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS); + i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); - vTaskDelay(30 / portTICK_RATE_MS); + vTaskDelay(30 / portTICK_PERIOD_MS); cmd = i2c_cmd_link_create(); i2c_master_start(cmd); i2c_master_write_byte(cmd, TCA9554_ADDR << 1 | I2C_MASTER_WRITE, true); i2c_master_write_byte(cmd, TCA9554_OUTPUT_PORT_REG, true); i2c_master_write_byte(cmd, TCA9554_DEFAULT_VALUE, true); i2c_master_stop(cmd); - i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS); + i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); #endif @@ -182,7 +182,7 @@ void board_init(void) i2c_master_write_byte(cmd, AW9523_REG_SOFTRESET, true); i2c_master_write_byte(cmd, 0, true); i2c_master_stop(cmd); - i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS); + i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); cmd = i2c_cmd_link_create(); @@ -192,7 +192,7 @@ void board_init(void) i2c_master_write_byte(cmd, AW9523_DEFAULT_CONFIG >> 8, true); i2c_master_write_byte(cmd, AW9523_DEFAULT_CONFIG & 0xff, true); i2c_master_stop(cmd); - i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS); + i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); cmd = i2c_cmd_link_create(); @@ -202,7 +202,7 @@ void board_init(void) i2c_master_write_byte(cmd, AW9523_DEFAULT_OUTPUT >> 8, true); i2c_master_write_byte(cmd, AW9523_DEFAULT_OUTPUT & 0xff, true); i2c_master_stop(cmd); - i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS); + i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); #endif @@ -492,13 +492,14 @@ static void configure_pins(usb_hal_context_t *usb) esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false); } else { esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false); - if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH)) { + if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT)) { gpio_ll_input_enable(&GPIO, iopin->pin); } } esp_rom_gpio_pad_unhold(iopin->pin); } } + if (!usb->use_external_phy) { gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3); gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); diff --git a/ports/espressif/boards/boards.h b/ports/espressif/boards/boards.h index a3738b201..78ea702e4 100644 --- a/ports/espressif/boards/boards.h +++ b/ports/espressif/boards/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/bpi_bit_s2/board.h b/ports/espressif/boards/bpi_bit_s2/board.h index ffb57da1d..b29459f04 100644 --- a/ports/espressif/boards/bpi_bit_s2/board.h +++ b/ports/espressif/boards/bpi_bit_s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/bpi_leaf_s2/board.h b/ports/espressif/boards/bpi_leaf_s2/board.h index 75f920e07..a4d158cc8 100644 --- a/ports/espressif/boards/bpi_leaf_s2/board.h +++ b/ports/espressif/boards/bpi_leaf_s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/bpi_leaf_s3/board.h b/ports/espressif/boards/bpi_leaf_s3/board.h index 16c524ad8..63b6ecf21 100644 --- a/ports/espressif/boards/bpi_leaf_s3/board.h +++ b/ports/espressif/boards/bpi_leaf_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/bpi_picow_s3/board.h b/ports/espressif/boards/bpi_picow_s3/board.h index 7418b00cc..2e47a139f 100644 --- a/ports/espressif/boards/bpi_picow_s3/board.h +++ b/ports/espressif/boards/bpi_picow_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/cytron_maker_feather_aiot_s3/board.h b/ports/espressif/boards/cytron_maker_feather_aiot_s3/board.h index d414f7fa1..8d85b60c2 100644 --- a/ports/espressif/boards/cytron_maker_feather_aiot_s3/board.h +++ b/ports/espressif/boards/cytron_maker_feather_aiot_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/department_of_alchemy_minimain_esp32s2/board.h b/ports/espressif/boards/department_of_alchemy_minimain_esp32s2/board.h index 9f291c10c..ab4f3b53d 100644 --- a/ports/espressif/boards/department_of_alchemy_minimain_esp32s2/board.h +++ b/ports/espressif/boards/department_of_alchemy_minimain_esp32s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/es3ink/board.h b/ports/espressif/boards/es3ink/board.h index ab093ab01..75274b320 100644 --- a/ports/espressif/boards/es3ink/board.h +++ b/ports/espressif/boards/es3ink/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.cmake b/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.cmake new file mode 100644 index 000000000..abbdf7abc --- /dev/null +++ b/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.cmake @@ -0,0 +1,2 @@ +# Apply board specific content here +set(IDF_TARGET "esp32s2") diff --git a/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.h b/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.h new file mode 100644 index 000000000..9ca9276ce --- /dev/null +++ b/ports/espressif/boards/espressif_esp32s2_devkitc_1/board.h @@ -0,0 +1,75 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef ESPRESSIF_ESP32S2_DEVKITC_1_H_ +#define ESPRESSIF_ESP32S2_DEVKITC_1_H_ + +//--------------------------------------------------------------------+ +// Button +//--------------------------------------------------------------------+ + +// Enter UF2 mode if GPIO is pressed while 2nd stage bootloader indicator +// is on e.g RGB = Purple. If it is GPIO0, user should not hold this while +// reset since that will instead run the 1st stage ROM bootloader +#define PIN_BUTTON_UF2 0 + +// GPIO that implement 1-bit memory with RC components which hold the +// pin value long enough for double reset detection. +// #define PIN_DOUBLE_RESET_RC + +//--------------------------------------------------------------------+ +// LED +//--------------------------------------------------------------------+ + +// GPIO connected to Neopixel data +// Note: On the production version Saola (v1.2) it is GPIO 18, +// however on earlier revision v1.1 it is GPIO 17 +#define NEOPIXEL_PIN 18 + +// Brightness percentage from 1 to 255 +#define NEOPIXEL_BRIGHTNESS 0x10 + +// Number of neopixels +#define NEOPIXEL_NUMBER 1 + +// LED for indicator +// If not defined neopixel will be use for flash writing instead +// #define LED_PIN 33 +// #define LED_STATE_ON 0 + +//--------------------------------------------------------------------+ +// USB UF2 +//--------------------------------------------------------------------+ + +#define USB_VID 0x303a +#define USB_PID 0x7008 +#define USB_MANUFACTURER "Espressif" +#define USB_PRODUCT "ESP32S2 DevKitC 1" + +#define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT +#define UF2_BOARD_ID "ESP32S2-DevKitC-v1.0" +#define UF2_VOLUME_LABEL "S2DKC1BOOT" +#define UF2_INDEX_URL "https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/hw-reference/esp32s2/user-guide-s2-devkitc-1.html" + +#endif diff --git a/ports/espressif/boards/espressif_esp32s2_devkitc_1/sdkconfig b/ports/espressif/boards/espressif_esp32s2_devkitc_1/sdkconfig new file mode 100644 index 000000000..33a8c772b --- /dev/null +++ b/ports/espressif/boards/espressif_esp32s2_devkitc_1/sdkconfig @@ -0,0 +1,7 @@ +# Board Specific Config + +# Partition Table +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MB.csv" + +# Serial flasher config +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y diff --git a/ports/espressif/boards/espressif_esp32s3_box/board.h b/ports/espressif/boards/espressif_esp32s3_box/board.h index 2572a7974..2054e4788 100644 --- a/ports/espressif/boards/espressif_esp32s3_box/board.h +++ b/ports/espressif/boards/espressif_esp32s3_box/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_esp32s3_devkitc_1/board.h b/ports/espressif/boards/espressif_esp32s3_devkitc_1/board.h index 6daaf1b1f..0480abcfb 100644 --- a/ports/espressif/boards/espressif_esp32s3_devkitc_1/board.h +++ b/ports/espressif/boards/espressif_esp32s3_devkitc_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_esp32s3_devkitm_1/board.h b/ports/espressif/boards/espressif_esp32s3_devkitm_1/board.h index 7a8d9b87c..9b8b3ed7b 100644 --- a/ports/espressif/boards/espressif_esp32s3_devkitm_1/board.h +++ b/ports/espressif/boards/espressif_esp32s3_devkitm_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_esp32s3_eye/board.h b/ports/espressif/boards/espressif_esp32s3_eye/board.h index afad6247c..e8b3283fb 100644 --- a/ports/espressif/boards/espressif_esp32s3_eye/board.h +++ b/ports/espressif/boards/espressif_esp32s3_eye/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_hmi_1/board.h b/ports/espressif/boards/espressif_hmi_1/board.h index cfb7f88cb..fb5f923aa 100644 --- a/ports/espressif/boards/espressif_hmi_1/board.h +++ b/ports/espressif/boards/espressif_hmi_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -66,7 +66,7 @@ #define TCA9554_OUTPUT_PORT_REG 0x01 #define TCA9554_POLARITY_INVERSION_REG 0x02 #define TCA9554_CONFIGURATION_REG 0x03 -#define TCA9554_DEFAULT_CONFIG 0b10100000 +#define TCA9554_DEFAULT_CONFIG 0b10100000 #define TCA9554_DEFAULT_VALUE 0b11100000 //Enable peripheral power and ws2812 data in #define TCA9554_PERI_POWER_ON_VALUE 0b11100000 //Enable peripheral power and ws2812 data in #define TCA9554_PERI_POWER_OFF_VALUE 0b11110000 //Disable Peripheral power diff --git a/ports/espressif/boards/espressif_kaluga_1/board.h b/ports/espressif/boards/espressif_kaluga_1/board.h index 742fa18d4..04b9276c9 100644 --- a/ports/espressif/boards/espressif_kaluga_1/board.h +++ b/ports/espressif/boards/espressif_kaluga_1/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_saola_1_wroom/board.h b/ports/espressif/boards/espressif_saola_1_wroom/board.h index 178cb388d..6b876b916 100644 --- a/ports/espressif/boards/espressif_saola_1_wroom/board.h +++ b/ports/espressif/boards/espressif_saola_1_wroom/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/espressif_saola_1_wrover/board.h b/ports/espressif/boards/espressif_saola_1_wrover/board.h index d0d4c3816..7b73b4544 100644 --- a/ports/espressif/boards/espressif_saola_1_wrover/board.h +++ b/ports/espressif/boards/espressif_saola_1_wrover/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/heltec_wireless_tracker/board.h b/ports/espressif/boards/heltec_wireless_tracker/board.h index bbf1d3953..898576897 100644 --- a/ports/espressif/boards/heltec_wireless_tracker/board.h +++ b/ports/espressif/boards/heltec_wireless_tracker/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/hexky_s2/board.h b/ports/espressif/boards/hexky_s2/board.h index ee69afc67..582e5cab8 100644 --- a/ports/espressif/boards/hexky_s2/board.h +++ b/ports/espressif/boards/hexky_s2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/lilygo_ttgo_t8_s2_wroom/board.h b/ports/espressif/boards/lilygo_ttgo_t8_s2_wroom/board.h index 80e5c0e88..c6949b44b 100644 --- a/ports/espressif/boards/lilygo_ttgo_t8_s2_wroom/board.h +++ b/ports/espressif/boards/lilygo_ttgo_t8_s2_wroom/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2022 Fabian Affolter @@ -46,4 +46,3 @@ #define UF2_BOARD_ID "ESP32S2-TTGOS2-WROOM-v1.1" #define UF2_VOLUME_LABEL "TTGOS2BOOT" #define UF2_INDEX_URL "http://www.lilygo.cn/prod_view.aspx?TypeId=50063&Id=1320&FId=t3:50063:3" - diff --git a/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.cpp b/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.cpp index d420db3d5..0f37edbae 100644 --- a/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.cpp +++ b/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.cpp @@ -26,7 +26,7 @@ static XPowersPMU PMU; #endif /* CONFIG_XPOWERS_CHIP_AXP2102 */ -#define I2C_MASTER_NUM 1 +#define I2C_MASTER_NUM I2C_NUM_1 #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */ #define I2C_MASTER_SDA_IO (gpio_num_t) 8 #define I2C_MASTER_SCL_IO (gpio_num_t) 9 @@ -61,7 +61,7 @@ int pmu_register_read(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint8_t l i2c_master_write_byte(cmd, (devAddr << 1) | WRITE_BIT, ACK_CHECK_EN); i2c_master_write_byte(cmd, regAddr, ACK_CHECK_EN); i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU i2c_master_cmd_begin FAILED! > "); @@ -75,7 +75,7 @@ int pmu_register_read(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint8_t l } i2c_master_read_byte(cmd, &data[len - 1], NACK_VAL); i2c_master_stop(cmd); - ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU READ FAILED! > "); @@ -97,7 +97,7 @@ int pmu_register_write_byte(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uin i2c_master_write_byte(cmd, regAddr, ACK_CHECK_EN); i2c_master_write(cmd, data, len, ACK_CHECK_EN); i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU WRITE FAILED! < "); @@ -185,4 +185,3 @@ extern "C" bool board_init_extension() return true; } - diff --git a/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.h b/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.h index f470cbc9f..114d0846e 100644 --- a/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.h +++ b/ports/espressif/boards/lilygo_ttgo_t_twr_plus/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.cpp b/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.cpp index 3016393ae..2186ed05a 100644 --- a/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.cpp +++ b/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.cpp @@ -27,7 +27,7 @@ static XPowersPMU PMU; #endif /* CONFIG_XPOWERS_CHIP_AXP2102 */ -#define I2C_MASTER_NUM CONFIG_I2C_MASTER_PORT_NUM +#define I2C_MASTER_NUM ((i2c_port_t) CONFIG_I2C_MASTER_PORT_NUM) #define I2C_MASTER_FREQ_HZ CONFIG_I2C_MASTER_FREQUENCY /*!< I2C master clock frequency */ #define I2C_MASTER_SDA_IO (gpio_num_t)CONFIG_PMU_I2C_SDA #define I2C_MASTER_SCL_IO (gpio_num_t)CONFIG_PMU_I2C_SCL @@ -62,7 +62,7 @@ int pmu_register_read(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint8_t l i2c_master_write_byte(cmd, (devAddr << 1) | WRITE_BIT, ACK_CHECK_EN); i2c_master_write_byte(cmd, regAddr, ACK_CHECK_EN); i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU i2c_master_cmd_begin FAILED! > "); @@ -76,7 +76,7 @@ int pmu_register_read(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uint8_t l } i2c_master_read_byte(cmd, &data[len - 1], NACK_VAL); i2c_master_stop(cmd); - ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU READ FAILED! > "); @@ -98,7 +98,7 @@ int pmu_register_write_byte(uint8_t devAddr, uint8_t regAddr, uint8_t *data, uin i2c_master_write_byte(cmd, regAddr, ACK_CHECK_EN); i2c_master_write(cmd, data, len, ACK_CHECK_EN); i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + esp_err_t ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_PERIOD_MS); i2c_cmd_link_delete(cmd); if (ret != ESP_OK) { ESP_LOGE(TAG, "PMU WRITE FAILED! < "); @@ -194,4 +194,3 @@ extern "C" bool board_init_extension() return true; } - diff --git a/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.h b/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.h index ad5566158..0744d9562 100644 --- a/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.h +++ b/ports/espressif/boards/lilygo_ttgo_tbeam_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/lolin_s2_mini/board.h b/ports/espressif/boards/lolin_s2_mini/board.h index 925a68b1a..21fe4ffc3 100644 --- a/ports/espressif/boards/lolin_s2_mini/board.h +++ b/ports/espressif/boards/lolin_s2_mini/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -48,13 +48,13 @@ // Uncomment & wire-up NeoPixel to board for testing // // GPIOs connected to NeoPixel data & power // #define NEOPIXEL_PIN 01 -// +// // #define NEOPIXEL_POWER_PIN 02 // #define NEOPIXEL_POWER_STATE 1 -// +// // // Brightness percentage from 1 to 255 // #define NEOPIXEL_BRIGHTNESS 0x64 -// +// // // Number of neopixels // #define NEOPIXEL_NUMBER 1 diff --git a/ports/espressif/boards/lolin_s2_pico/board.h b/ports/espressif/boards/lolin_s2_pico/board.h index dffdef85b..7669b09a5 100644 --- a/ports/espressif/boards/lolin_s2_pico/board.h +++ b/ports/espressif/boards/lolin_s2_pico/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -50,7 +50,7 @@ //--------------------------------------------------------------------+ #define USB_VID 0x303A //Espressif USB VID -#define USB_PID 0x80C7 //Allocated by Espressif for this board and purpose. +#define USB_PID 0x80C7 //Allocated by Espressif for this board and purpose. #define USB_MANUFACTURER "Lolin" #define USB_PRODUCT "S2 Pico" diff --git a/ports/espressif/boards/lolin_s3/board.h b/ports/espressif/boards/lolin_s3/board.h index aeb2d8873..0f81a018d 100644 --- a/ports/espressif/boards/lolin_s3/board.h +++ b/ports/espressif/boards/lolin_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/m5stack_atoms3/board.h b/ports/espressif/boards/m5stack_atoms3/board.h index a9fb4650c..9f95e5ec2 100644 --- a/ports/espressif/boards/m5stack_atoms3/board.h +++ b/ports/espressif/boards/m5stack_atoms3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2023 CDarius diff --git a/ports/espressif/boards/m5stack_atoms3_lite/board.h b/ports/espressif/boards/m5stack_atoms3_lite/board.h index 46639253a..66cfdc6af 100644 --- a/ports/espressif/boards/m5stack_atoms3_lite/board.h +++ b/ports/espressif/boards/m5stack_atoms3_lite/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2023 CDarius @@ -64,6 +64,6 @@ #define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT #define UF2_BOARD_ID "ESP32S3-AtomS3Lite-01" #define UF2_VOLUME_LABEL "ATOMS3BOOT" -#define UF2_INDEX_URL "https://shop.m5stack.com/products/atoms3-lite-esp32s3-dev-kit" +#define UF2_INDEX_URL "https://shop.m5stack.com/products/atoms3-lite-esp32s3-dev-kit" #endif diff --git a/ports/espressif/boards/m5stack_atoms3u/board.h b/ports/espressif/boards/m5stack_atoms3u/board.h index e946e6065..a930df342 100644 --- a/ports/espressif/boards/m5stack_atoms3u/board.h +++ b/ports/espressif/boards/m5stack_atoms3u/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2023 Elviss Kustans @@ -64,6 +64,6 @@ #define UF2_PRODUCT_NAME USB_MANUFACTURER " " USB_PRODUCT #define UF2_BOARD_ID "ESP32S3-AtomS3U-01" #define UF2_VOLUME_LABEL "ATOMS3UBOOT" -#define UF2_INDEX_URL "https://docs.m5stack.com/en/core/AtomS3U" +#define UF2_INDEX_URL "https://docs.m5stack.com/en/core/AtomS3U" #endif diff --git a/ports/espressif/boards/magiclick_s3_n4r2/board.h b/ports/espressif/boards/magiclick_s3_n4r2/board.h index 990321ead..e7d42810f 100644 --- a/ports/espressif/boards/magiclick_s3_n4r2/board.h +++ b/ports/espressif/boards/magiclick_s3_n4r2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/maker_badge/board.h b/ports/espressif/boards/maker_badge/board.h index 6cd96286a..60629f4ce 100644 --- a/ports/espressif/boards/maker_badge/board.h +++ b/ports/espressif/boards/maker_badge/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/morpheans_morphesp-240/board.h b/ports/espressif/boards/morpheans_morphesp-240/board.h index 439f096c5..dfab8d852 100644 --- a/ports/espressif/boards/morpheans_morphesp-240/board.h +++ b/ports/espressif/boards/morpheans_morphesp-240/board.h @@ -59,7 +59,7 @@ #define DISPLAY_PIN_CS 10 #define DISPLAY_PIN_DC 14 #define DISPLAY_PIN_RST 9 -#define DISPLAY_PIN_BL 21 // TODO There is no backlight control on this board. Unused pin for now. Will have to PR tinyuf2 +#define DISPLAY_PIN_BL 21 // TODO There is no backlight control on this board. Unused pin for now. Will have to PR tinyuf2 #define DISPLAY_BL_ON 1 // GPIO state to enable back light #define DISPLAY_WIDTH 240 diff --git a/ports/espressif/boards/muselab_nanoesp32-s2_wroom/board.h b/ports/espressif/boards/muselab_nanoesp32-s2_wroom/board.h index 2cf9f4ee6..dbc38808d 100644 --- a/ports/espressif/boards/muselab_nanoesp32-s2_wroom/board.h +++ b/ports/espressif/boards/muselab_nanoesp32-s2_wroom/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/muselab_nanoesp32-s2_wrover/board.h b/ports/espressif/boards/muselab_nanoesp32-s2_wrover/board.h index 9762a7c86..d426a0ad7 100644 --- a/ports/espressif/boards/muselab_nanoesp32-s2_wrover/board.h +++ b/ports/espressif/boards/muselab_nanoesp32-s2_wrover/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/seeed_xiao_esp32s3/board.h b/ports/espressif/boards/seeed_xiao_esp32s3/board.h index 64394b742..4f320b3c8 100644 --- a/ports/espressif/boards/seeed_xiao_esp32s3/board.h +++ b/ports/espressif/boards/seeed_xiao_esp32s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/smartbeedesigns_bee_motion_s3/board.h b/ports/espressif/boards/smartbeedesigns_bee_motion_s3/board.h index 85bfb6b6d..69d603e59 100644 --- a/ports/espressif/boards/smartbeedesigns_bee_motion_s3/board.h +++ b/ports/espressif/boards/smartbeedesigns_bee_motion_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/smartbeedesigns_bee_s3/board.h b/ports/espressif/boards/smartbeedesigns_bee_s3/board.h index 24d4e42ba..137420c9d 100644 --- a/ports/espressif/boards/smartbeedesigns_bee_s3/board.h +++ b/ports/espressif/boards/smartbeedesigns_bee_s3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/targett_mcb_wroom/board.h b/ports/espressif/boards/targett_mcb_wroom/board.h index 734c983ef..585a19210 100644 --- a/ports/espressif/boards/targett_mcb_wroom/board.h +++ b/ports/espressif/boards/targett_mcb_wroom/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/targett_mcb_wrover/board.h b/ports/espressif/boards/targett_mcb_wrover/board.h index e4e61d153..91a908ff6 100644 --- a/ports/espressif/boards/targett_mcb_wrover/board.h +++ b/ports/espressif/boards/targett_mcb_wrover/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_feathers2/board.h b/ports/espressif/boards/unexpectedmaker_feathers2/board.h index 71a58cf29..0d2a68ff6 100644 --- a/ports/espressif/boards/unexpectedmaker_feathers2/board.h +++ b/ports/espressif/boards/unexpectedmaker_feathers2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_feathers2_neo/board.h b/ports/espressif/boards/unexpectedmaker_feathers2_neo/board.h index 101e276a7..c3c6b40ec 100644 --- a/ports/espressif/boards/unexpectedmaker_feathers2_neo/board.h +++ b/ports/espressif/boards/unexpectedmaker_feathers2_neo/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_feathers3/board.h b/ports/espressif/boards/unexpectedmaker_feathers3/board.h index f2e5e3bb5..61e8c458a 100644 --- a/ports/espressif/boards/unexpectedmaker_feathers3/board.h +++ b/ports/espressif/boards/unexpectedmaker_feathers3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_nanos3/board.h b/ports/espressif/boards/unexpectedmaker_nanos3/board.h index 92279d08e..5c233b705 100644 --- a/ports/espressif/boards/unexpectedmaker_nanos3/board.h +++ b/ports/espressif/boards/unexpectedmaker_nanos3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_pros3/board.h b/ports/espressif/boards/unexpectedmaker_pros3/board.h index 5521bc793..bfb504efd 100644 --- a/ports/espressif/boards/unexpectedmaker_pros3/board.h +++ b/ports/espressif/boards/unexpectedmaker_pros3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_tinys2/board.h b/ports/espressif/boards/unexpectedmaker_tinys2/board.h index bdba4f8c2..7836cb04a 100644 --- a/ports/espressif/boards/unexpectedmaker_tinys2/board.h +++ b/ports/espressif/boards/unexpectedmaker_tinys2/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/unexpectedmaker_tinys3/board.h b/ports/espressif/boards/unexpectedmaker_tinys3/board.h index 3ba58437c..f78a5f6e9 100644 --- a/ports/espressif/boards/unexpectedmaker_tinys3/board.h +++ b/ports/espressif/boards/unexpectedmaker_tinys3/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/waveshare_esp32_s2_pico_lcd/board.h b/ports/espressif/boards/waveshare_esp32_s2_pico_lcd/board.h index 205b87b7e..5a9b0dd70 100644 --- a/ports/espressif/boards/waveshare_esp32_s2_pico_lcd/board.h +++ b/ports/espressif/boards/waveshare_esp32_s2_pico_lcd/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/waveshare_esp32_s3_pico/board.h b/ports/espressif/boards/waveshare_esp32_s3_pico/board.h index 5b5ec5749..a2c6f171d 100644 --- a/ports/espressif/boards/waveshare_esp32_s3_pico/board.h +++ b/ports/espressif/boards/waveshare_esp32_s3_pico/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -36,7 +36,7 @@ // GPIO that implement 1-bit memory with RC components which hold the // pin value long enough for double reset detection. -// #define PIN_DOUBLE_RESET_RC +// #define PIN_DOUBLE_RESET_RC //--------------------------------------------------------------------+ // LED diff --git a/ports/espressif/boards/waveshare_esp32s2_pico/board.h b/ports/espressif/boards/waveshare_esp32s2_pico/board.h index 5daf7ef05..5775abcfc 100644 --- a/ports/espressif/boards/waveshare_esp32s2_pico/board.h +++ b/ports/espressif/boards/waveshare_esp32s2_pico/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/yd_esp32_s3_n16r8/board.h b/ports/espressif/boards/yd_esp32_s3_n16r8/board.h index def3120cb..ebe4aebde 100644 --- a/ports/espressif/boards/yd_esp32_s3_n16r8/board.h +++ b/ports/espressif/boards/yd_esp32_s3_n16r8/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/boards/yd_esp32_s3_n8r8/board.h b/ports/espressif/boards/yd_esp32_s3_n8r8/board.h index 0a92e10bd..a3fdcb1ac 100644 --- a/ports/espressif/boards/yd_esp32_s3_n8r8/board.h +++ b/ports/espressif/boards/yd_esp32_s3_n8r8/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/espressif/components/XPowersLib/.gitignore b/ports/espressif/components/XPowersLib/.gitignore index 21b68f901..0d0d0897f 100644 --- a/ports/espressif/components/XPowersLib/.gitignore +++ b/ports/espressif/components/XPowersLib/.gitignore @@ -3,4 +3,4 @@ test .travis.yml test -assets \ No newline at end of file +assets diff --git a/ports/espressif/components/XPowersLib/CMakeLists.txt b/ports/espressif/components/XPowersLib/CMakeLists.txt index c6640526c..cd3d375df 100644 --- a/ports/espressif/components/XPowersLib/CMakeLists.txt +++ b/ports/espressif/components/XPowersLib/CMakeLists.txt @@ -2,4 +2,3 @@ set(src_dirs ./src) set(include_dirs ./src ./src/REG) idf_component_register(SRC_DIRS ${src_dirs} INCLUDE_DIRS ${include_dirs}) - diff --git a/ports/espressif/components/XPowersLib/README.md b/ports/espressif/components/XPowersLib/README.md index baaaa15de..57430c6f1 100644 --- a/ports/espressif/components/XPowersLib/README.md +++ b/ports/espressif/components/XPowersLib/README.md @@ -13,9 +13,9 @@ ``` -🎉 LilyGo invests time and resources to provide this open source code, please support LilyGo +🎉 LilyGo invests time and resources to provide this open source code, please support LilyGo and open source hardware by purchasing products from LilyGo! -Written by Lewis He for LilyGo. MIT license, all text above must be included in +Written by Lewis He for LilyGo. MIT license, all text above must be included in any redistribution ``` diff --git a/ports/espressif/components/XPowersLib/keywords.txt b/ports/espressif/components/XPowersLib/keywords.txt index 1bd989959..7e9c42976 100644 --- a/ports/espressif/components/XPowersLib/keywords.txt +++ b/ports/espressif/components/XPowersLib/keywords.txt @@ -752,5 +752,3 @@ XPOWERS_DATA_BUFFER_SIZE LITERAL1 AXP192_SLAVE_ADDRESS LITERAL1 AXP202_SLAVE_ADDRESS LITERAL1 AXP2101_SLAVE_ADDRESS LITERAL1 - - diff --git a/ports/espressif/components/XPowersLib/library.json b/ports/espressif/components/XPowersLib/library.json index da21ba174..6b98d8f4b 100644 --- a/ports/espressif/components/XPowersLib/library.json +++ b/ports/espressif/components/XPowersLib/library.json @@ -27,4 +27,4 @@ "frameworks": ["arduino", "espidf"], "platforms": "esp32", "headers": "XPowersLib.h" -} \ No newline at end of file +} diff --git a/ports/espressif/components/XPowersLib/src/REG/AXP192Constants.h b/ports/espressif/components/XPowersLib/src/REG/AXP192Constants.h index c6f2a76ed..bde822def 100644 --- a/ports/espressif/components/XPowersLib/src/REG/AXP192Constants.h +++ b/ports/espressif/components/XPowersLib/src/REG/AXP192Constants.h @@ -179,4 +179,4 @@ #define XPOWERS_AXP192_INTERNAL_TEMP_H8 (0x5E) #define XPOWERS_AXP192_INTERNAL_TEMP_L4 (0x5F) #define XPOWERS_AXP192_INTERNAL_TEMP_STEP (0.1F) -#define XPOWERS_AXP192_INERNAL_TEMP_OFFSET (144.7) \ No newline at end of file +#define XPOWERS_AXP192_INERNAL_TEMP_OFFSET (144.7) diff --git a/ports/espressif/components/XPowersLib/src/REG/AXP202Constants.h b/ports/espressif/components/XPowersLib/src/REG/AXP202Constants.h index 534b64676..0a4113c73 100644 --- a/ports/espressif/components/XPowersLib/src/REG/AXP202Constants.h +++ b/ports/espressif/components/XPowersLib/src/REG/AXP202Constants.h @@ -146,6 +146,3 @@ #define XPOWERS_AXP202_INTERNAL_TEMP_STEP (0.1F) #define XPOWERS_AXP202_APS_VOLTAGE_STEP (1.4F) #define XPOWERS_AXP202_TS_PIN_OUT_STEP (0.8F) - - - diff --git a/ports/espressif/components/XPowersLib/src/XPowersAXP192.tpp b/ports/espressif/components/XPowersLib/src/XPowersAXP192.tpp index 88d11368b..b691e65d6 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersAXP192.tpp +++ b/ports/espressif/components/XPowersLib/src/XPowersAXP192.tpp @@ -868,7 +868,7 @@ public: } /* - * Power control EXTEN functions + * Power control EXTENT functions */ bool enableExternalPin(void) { @@ -919,7 +919,7 @@ public: } /** - * @brief Eanble PMU interrupt control mask . + * @brief Enable PMU interrupt control mask . * @param opt: View the related chip type xpowers_axp192_irq_t enumeration * parameters in "XPowersParams.hpp" * @retval @@ -2067,6 +2067,3 @@ private: uint8_t statusRegister[5]; xpowers_gpio_t gpio[6]; }; - - - diff --git a/ports/espressif/components/XPowersLib/src/XPowersAXP2101.tpp b/ports/espressif/components/XPowersLib/src/XPowersAXP2101.tpp index f91b423a2..7ad4c7373 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersAXP2101.tpp +++ b/ports/espressif/components/XPowersLib/src/XPowersAXP2101.tpp @@ -174,7 +174,7 @@ typedef enum { XPOWER_POWERON_SRC_BAT_CHARGE, //Vbus Insert and Good as POWERON Source XPOWER_POWERON_SRC_BAT_INSERT, //Battery Insert and Good as POWERON Source XPOWER_POWERON_SRC_ENMODE, //POWERON always high when EN Mode as POWERON Source - XPOWER_POWERON_SRC_UNKONW, //Unkonw + XPOWER_POWERON_SRC_UNKONW, //Unknown } xpower_power_on_source_t; typedef enum { @@ -186,7 +186,7 @@ typedef enum { XPOWER_POWEROFF_SRC_UNDER_VOL, //DCDC Under Voltage as POWEROFF Source XPOWER_POWEROFF_SRC_OVER_VOL, //DCDC Over Voltage as POWEROFF Source XPOWER_POWEROFF_SRC_OVER_TEMP, //Die Over Temperature as POWEROFF Source - XPOWER_POWEROFF_SRC_UNKONW, //Unkonw + XPOWER_POWEROFF_SRC_UNKONW, //Unknown } xpower_power_off_source_t; typedef enum { @@ -962,7 +962,8 @@ public: { int val = readRegister(XPOWERS_AXP2101_SLEEP_WAKEUP_CTRL); if (val == -1)return; - enable ? (val | opt) : (val & (~opt)); + //enable ? (val | opt) : (val & (~opt)); + (void) enable; writeRegister(XPOWERS_AXP2101_SLEEP_WAKEUP_CTRL, val | opt); } @@ -2079,7 +2080,7 @@ public: /* - * Power ON OFF IRQ TIMMING Control method + * Power ON OFF IRQ TIMING Control method */ void setIrqLevelTime(xpowers_irq_time_t opt) @@ -2502,7 +2503,7 @@ public: #endif /** - * @brief Eanble PMU interrupt control mask . + * @brief Enable PMU interrupt control mask . * @param opt: View the related chip type xpowers_axp2101_irq_t enumeration * parameters in "XPowersParams.hpp" * @retval @@ -2991,6 +2992,3 @@ private: uint8_t statusRegister[XPOWERS_AXP2101_INTSTS_CNT]; uint8_t intRegister[XPOWERS_AXP2101_INTSTS_CNT]; }; - - - diff --git a/ports/espressif/components/XPowersLib/src/XPowersCommon.tpp b/ports/espressif/components/XPowersLib/src/XPowersCommon.tpp index 5e2aad62c..486463dd8 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersCommon.tpp +++ b/ports/espressif/components/XPowersLib/src/XPowersCommon.tpp @@ -140,10 +140,10 @@ public: return -1; } - int readRegister(uint8_t reg, uint8_t *buf, uint8_t lenght) + int readRegister(uint8_t reg, uint8_t *buf, uint8_t length) { if (thisReadRegCallback) { - return thisReadRegCallback(__addr, reg, buf, lenght); + return thisReadRegCallback(__addr, reg, buf, length); } #if defined(ARDUINO) if (__wire) { @@ -152,23 +152,23 @@ public: if (__wire->endTransmission() != 0) { return -1; } - __wire->requestFrom(__addr, lenght); - return __wire->readBytes(buf, lenght) == lenght ? 0 : -1; + __wire->requestFrom(__addr, length); + return __wire->readBytes(buf, length) == length ? 0 : -1; } #endif return -1; } - int writeRegister(uint8_t reg, uint8_t *buf, uint8_t lenght) + int writeRegister(uint8_t reg, uint8_t *buf, uint8_t length) { if (thisWriteRegCallback) { - return thisWriteRegCallback(__addr, reg, buf, lenght); + return thisWriteRegCallback(__addr, reg, buf, length); } #if defined(ARDUINO) if (__wire) { __wire->beginTransmission(__addr); __wire->write(reg); - __wire->write(buf, lenght); + __wire->write(buf, length); return (__wire->endTransmission() == 0) ? 0 : -1; } #endif diff --git a/ports/espressif/components/XPowersLib/src/XPowersLib.h b/ports/espressif/components/XPowersLib/src/XPowersLib.h index 0b2e38540..f5f9ff558 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersLib.h +++ b/ports/espressif/components/XPowersLib/src/XPowersLib.h @@ -31,4 +31,4 @@ typedef XPowersAXP2101 XPowersPMU; -#endif /*__XPOWERSLIB_H__*/ \ No newline at end of file +#endif /*__XPOWERSLIB_H__*/ diff --git a/ports/espressif/components/XPowersLib/src/XPowersLibInterface.hpp b/ports/espressif/components/XPowersLib/src/XPowersLibInterface.hpp index e1f5ab619..27f36506a 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersLibInterface.hpp +++ b/ports/espressif/components/XPowersLib/src/XPowersLibInterface.hpp @@ -422,7 +422,7 @@ class XPowersLibInterface : public HasBatteryLevel virtual void clearIrqStatus() = 0; /** - * @brief Eanble PMU interrupt control mask . + * @brief Enable PMU interrupt control mask . * @param opt: View the related chip type xpowers_axpxxx_irq_t enumeration * parameters in "XPowersParams.hpp" * @retval true valid false invalid @@ -621,4 +621,3 @@ class XPowersLibInterface : public HasBatteryLevel uint32_t __protectedMask; }; - diff --git a/ports/espressif/components/XPowersLib/src/XPowersParams.hpp b/ports/espressif/components/XPowersLib/src/XPowersParams.hpp index 1bd539894..657ddbc5b 100644 --- a/ports/espressif/components/XPowersLib/src/XPowersParams.hpp +++ b/ports/espressif/components/XPowersLib/src/XPowersParams.hpp @@ -83,7 +83,7 @@ typedef enum __xpowers_axp2101_chg_vol { } xpowers_axp2101_chg_vol_t; /** - * @brief axp2101 charge currnet voltage parameters. + * @brief axp2101 charge current voltage parameters. */ typedef enum __xpowers_axp2101_chg_curr { XPOWERS_AXP2101_CHG_CUR_0MA, @@ -115,7 +115,7 @@ typedef enum __xpowers_axp192_chg_vol { } xpowers_axp192_chg_vol_t; /** - * @brief axp192 charge currnet voltage parameters. + * @brief axp192 charge current voltage parameters. */ typedef enum __xpowers_axp192_chg_curr { XPOWERS_AXP192_CHG_CUR_100MA, @@ -140,7 +140,7 @@ typedef enum __xpowers_axp192_chg_curr { /** - * @brief axp2101 vbus currnet limit parameters. + * @brief axp2101 vbus current limit parameters. */ typedef enum { XPOWERS_AXP2101_VBUS_CUR_LIM_100MA, @@ -152,7 +152,7 @@ typedef enum { } xpowers_axp2101_vbus_cur_limit_t; /** - * @brief axp192 vbus currnet limit parameters. + * @brief axp192 vbus current limit parameters. */ typedef enum { XPOWERS_AXP192_VBUS_CUR_LIM_500MA, @@ -255,32 +255,3 @@ typedef enum __xpowers_axp2101_irq { XPOWERS_AXP2101_ALL_IRQ = (0xFFFFFFFFUL) } xpowers_axp2101_irq_t; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/ports/espressif/components/bootloader/Kconfig.projbuild b/ports/espressif/components/bootloader/Kconfig.projbuild index 306e4dcd3..5a61b1210 100644 --- a/ports/espressif/components/bootloader/Kconfig.projbuild +++ b/ports/espressif/components/bootloader/Kconfig.projbuild @@ -94,6 +94,7 @@ menu "Bootloader config" choice BOOTLOADER_VDDSDIO_BOOST bool "VDDSDIO LDO voltage" default BOOTLOADER_VDDSDIO_BOOST_1_9V + depends on SOC_CONFIGURABLE_VDDSDIO_SUPPORTED help If this option is enabled, and VDDSDIO LDO is set to 1.8V (using eFuse or MTDI bootstrapping pin), bootloader will change LDO settings to @@ -113,6 +114,7 @@ menu "Bootloader config" config BOOTLOADER_FACTORY_RESET bool "GPIO triggers factory reset" default N + select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED help Allows to reset the device to factory settings: - clear one or more data partitions; @@ -185,6 +187,20 @@ menu "Bootloader config" (factory or OTA[x]). Note that GPIO34-39 do not have an internal pullup and an external one must be provided. + choice BOOTLOADER_APP_TEST_PIN_LEVEL + bool "App test GPIO level" + depends on BOOTLOADER_APP_TEST + default BOOTLOADER_APP_TEST_PIN_LOW + help + Pin level for app test, can be triggered on low or high. + + config BOOTLOADER_APP_TEST_PIN_LOW + bool "Enter test app on GPIO low" + + config BOOTLOADER_APP_TEST_PIN_HIGH + bool "Enter test app on GPIO high" + endchoice + config BOOTLOADER_HOLD_TIME_GPIO int "Hold time of GPIO for reset/test mode (seconds)" depends on BOOTLOADER_FACTORY_RESET || BOOTLOADER_APP_TEST @@ -193,6 +209,14 @@ menu "Bootloader config" The GPIO must be held low continuously for this period of time after reset before a factory reset or test partition boot (as applicable) is performed. + config BOOTLOADER_REGION_PROTECTION_ENABLE + bool "Enable protection for unmapped memory regions" + default y + help + Protects the unmapped memory regions of the entire address space from unintended accesses. + This will ensure that an exception will be triggered whenever the CPU performs a memory + operation on unmapped regions of the address space. + config BOOTLOADER_WDT_ENABLE bool "Use RTC watchdog in start code" default y @@ -204,7 +228,7 @@ menu "Bootloader config" source for slow_clk - and ends calling app_main. Re-set timeout is needed due to WDT uses a SLOW_CLK clock source. After changing a frequency slow_clk a time of WDT needs to re-set for new frequency. - slow_clk depends on ESP32_RTC_CLK_SRC (INTERNAL_RC or EXTERNAL_CRYSTAL). + slow_clk depends on RTC_CLK_SRC (INTERNAL_RC or EXTERNAL_CRYSTAL). config BOOTLOADER_WDT_DISABLE_IN_USER_CODE bool "Allows RTC watchdog disable in user code" @@ -273,6 +297,8 @@ menu "Bootloader config" depends on BOOTLOADER_APP_ANTI_ROLLBACK range 1 32 if IDF_TARGET_ESP32 default 32 if IDF_TARGET_ESP32 + range 1 4 if IDF_TARGET_ESP32C2 + default 4 if IDF_TARGET_ESP32C2 range 1 16 default 16 help @@ -288,7 +314,7 @@ menu "Bootloader config" select EFUSE_VIRTUAL_KEEP_IN_FLASH help This option allows to emulate read/write operations with all eFuses and efuse secure version. - It allows to test anti-rollback implemention without permanent write eFuse bits. + It allows to test anti-rollback implementation without permanent write eFuse bits. There should be an entry in partition table with following details: `emul_efuse, data, efuse, , 0x2000`. This option enables: EFUSE_VIRTUAL and EFUSE_VIRTUAL_KEEP_IN_FLASH. @@ -299,8 +325,9 @@ menu "Bootloader config" # options, allowing to turn on "allow insecure options" and have secure boot with # "skip validation when existing deep sleep". Keeping this to avoid a breaking change, # but - as noted in help - it invalidates the integrity of Secure Boot checks - depends on (SECURE_BOOT && SECURE_BOOT_INSECURE) || !SECURE_BOOT + depends on SOC_RTC_FAST_MEM_SUPPORTED && ((SECURE_BOOT && SECURE_BOOT_INSECURE) || !SECURE_BOOT) default n + select BOOTLOADER_RESERVE_RTC_MEM help This option disables the normal validation of an image coming out of deep sleep (checksums, SHA256, and signature). This is a trade-off @@ -342,7 +369,7 @@ menu "Bootloader config" # only available if both Secure Boot and Check Signature on Boot are disabled depends on !SECURE_SIGNED_ON_BOOT default n - select BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP + select BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP if SOC_RTC_FAST_MEM_SUPPORTED select BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON help Selecting this option prevents the bootloader from ever validating the app image before @@ -355,7 +382,8 @@ menu "Bootloader config" config BOOTLOADER_RESERVE_RTC_SIZE hex - default 0x10 if BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP || BOOTLOADER_CUSTOM_RESERVE_RTC + depends on SOC_RTC_FAST_MEM_SUPPORTED + default 0x10 if BOOTLOADER_RESERVE_RTC_MEM default 0 help Reserve RTC FAST memory for Skip image validation. This option in bytes. @@ -366,18 +394,19 @@ menu "Bootloader config" config BOOTLOADER_CUSTOM_RESERVE_RTC bool "Reserve RTC FAST memory for custom purposes" + depends on SOC_RTC_FAST_MEM_SUPPORTED + select BOOTLOADER_RESERVE_RTC_MEM default n help This option allows the customer to place data in the RTC FAST memory, this area remains valid when rebooted, except for power loss. This memory is located at a fixed address and is available for both the bootloader and the application. - (The application and bootoloader must be compiled with the same option). + (The application and bootloader must be compiled with the same option). The RTC FAST memory has access only through PRO_CPU. config BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE hex "Size in bytes for custom purposes" - range 0 0x10 default 0 depends on BOOTLOADER_CUSTOM_RESERVE_RTC help @@ -386,6 +415,15 @@ menu "Bootloader config" in this area of memory, you can increase it. It must be a multiple of 4 bytes. This area (rtc_retain_mem_t) is reserved and has access from the bootloader and an application. + config BOOTLOADER_RESERVE_RTC_MEM + bool + depends on SOC_RTC_FAST_MEM_SUPPORTED + help + This option reserves an area in RTC FAST memory for the following features: + - "Skip image validation when exiting deep sleep" + - "Reserve RTC FAST memory for custom purposes" + - "GPIO triggers factory reset" + config BOOTLOADER_FLASH_XMC_SUPPORT bool "Enable the support for flash chips of XMC (READ HELP FIRST)" default y @@ -421,16 +459,39 @@ menu "Security features" select MBEDTLS_ECDSA_C depends on SECURE_SIGNED_ON_BOOT || SECURE_SIGNED_ON_UPDATE - config SECURE_BOOT_SUPPORTS_RSA + config SECURE_BOOT_V2_RSA_SUPPORTED bool default y - depends on ESP32_REV_MIN_3 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 + # RSA secure boot is supported in ESP32 revision >= v3.0 + depends on (IDF_TARGET_ESP32 && ESP32_REV_MIN_FULL >= 300) || SOC_SECURE_BOOT_V2_RSA - config SECURE_TARGET_HAS_SECURE_ROM_DL_MODE + config SECURE_BOOT_V2_ECC_SUPPORTED bool default y - depends on IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 + depends on SOC_SECURE_BOOT_V2_ECC + config SECURE_BOOT_V1_SUPPORTED + bool + default y + depends on SOC_SECURE_BOOT_V1 + + config SECURE_BOOT_V2_PREFERRED + bool + default y + depends on ESP32_REV_MIN_FULL >= 300 + + config SECURE_BOOT_V2_ECDSA_ENABLED + bool + default y if SECURE_BOOT_V2_ENABLED && SECURE_BOOT_V2_ECC_SUPPORTED + + config SECURE_BOOT_V2_RSA_ENABLED + bool + default y if SECURE_BOOT_V2_ENABLED && SECURE_BOOT_V2_RSA_SUPPORTED + + config SECURE_BOOT_FLASH_ENC_KEYS_BURN_TOGETHER + bool + default y if SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK && SECURE_BOOT && SECURE_FLASH_ENC_ENABLED + # ESP32-C2 has one key block for SB and FE keys. These keys must be burned at the same time. config SECURE_SIGNED_APPS_NO_SECURE_BOOT bool "Require signed app images" @@ -447,29 +508,66 @@ menu "Security features" bool "App Signing Scheme" depends on SECURE_BOOT || SECURE_SIGNED_APPS_NO_SECURE_BOOT default SECURE_SIGNED_APPS_ECDSA_SCHEME if SECURE_BOOT_V1_ENABLED - default SECURE_SIGNED_APPS_RSA_SCHEME if SECURE_BOOT_V2_ENABLED + default SECURE_SIGNED_APPS_RSA_SCHEME if SECURE_BOOT_V2_RSA_SUPPORTED + default SECURE_SIGNED_APPS_ECDSA_V2_SCHEME if SECURE_BOOT_V2_ECC_SUPPORTED help Select the Secure App signing scheme. Depends on the Chip Revision. - There are two options: - 1. ECDSA based secure boot scheme. (Only choice for Secure Boot V1) - Supported in ESP32 and ESP32-ECO3. - 2. The RSA based secure boot scheme. (Only choice for Secure Boot V2) - Supported in ESP32-ECO3 (ESP32 Chip Revision 3 onwards), ESP32-S2, ESP32-C3, ESP32-S3. + There are two secure boot versions: + + 1. Secure boot V1 + - Legacy custom secure boot scheme. Supported in ESP32 SoC. + + 2. Secure boot V2 + - RSA based secure boot scheme. + Supported in ESP32-ECO3 (ESP32 Chip Revision 3 onwards), ESP32-S2, ESP32-C3, ESP32-S3 SoCs. + + - ECDSA based secure boot scheme. Supported in ESP32-C2 SoC. config SECURE_SIGNED_APPS_ECDSA_SCHEME bool "ECDSA" - depends on IDF_TARGET_ESP32 && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V1_ENABLED) + depends on SECURE_BOOT_V1_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V1_ENABLED) help Embeds the ECDSA public key in the bootloader and signs the application with an ECDSA key. - Refer to the documentation before enabling. config SECURE_SIGNED_APPS_RSA_SCHEME bool "RSA" - depends on SECURE_BOOT_SUPPORTS_RSA && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V2_ENABLED) + depends on SECURE_BOOT_V2_RSA_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V2_ENABLED) help Appends the RSA-3072 based Signature block to the application. Refer to before enabling. + + config SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + bool "ECDSA (V2)" + depends on SECURE_BOOT_V2_ECC_SUPPORTED && (SECURE_SIGNED_APPS_NO_SECURE_BOOT || SECURE_BOOT_V2_ENABLED) + help + For Secure boot V2 (e.g., ESP32-C2 SoC), appends ECDSA based signature block to the application. + Refer to documentation before enabling. + + endchoice + + choice SECURE_BOOT_ECDSA_KEY_LEN_SIZE + bool "ECDSA key size" + depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + default SECURE_BOOT_ECDSA_KEY_LEN_256_BITS + help + Select the ECDSA key size. Two key sizes are supported + + - 192 bit key using NISTP192 curve + - 256 bit key using NISTP256 curve (Recommended) + + The advantage of using 256 bit key is the extra randomness which makes it difficult to be + bruteforced compared to 192 bit key. + At present, both key sizes are practically implausible to bruteforce. + + config SECURE_BOOT_ECDSA_KEY_LEN_192_BITS + bool "Using ECC curve NISTP192" + depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + + config SECURE_BOOT_ECDSA_KEY_LEN_256_BITS + bool "Using ECC curve NISTP256 (Recommended)" + depends on SECURE_SIGNED_APPS_ECDSA_V2_SCHEME + endchoice config SECURE_SIGNED_ON_BOOT_NO_SECURE_BOOT @@ -501,7 +599,8 @@ menu "Security features" config SECURE_BOOT bool "Enable hardware Secure Boot in bootloader (READ DOCS FIRST)" default n - depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || ESP32C3_REV_MIN_3 || IDF_TARGET_ESP32S3 + # Secure boot is not supported for ESP32-C3 revision < v0.3 + depends on SOC_SECURE_BOOT_SUPPORTED && !(IDF_TARGET_ESP32C3 && ESP32C3_REV_MIN_FULL < 3) select ESPTOOLPY_NO_STUB if !IDF_TARGET_ESP32 && !IDF_TARGET_ESP32S2 help Build a bootloader which enables Secure Boot on first boot. @@ -514,25 +613,31 @@ menu "Security features" choice SECURE_BOOT_VERSION bool "Select secure boot version" - default SECURE_BOOT_V2_ENABLED if ESP32_REV_MIN_3 + default SECURE_BOOT_V2_ENABLED if SECURE_BOOT_V2_PREFERRED depends on SECURE_BOOT help Select the Secure Boot Version. Depends on the Chip Revision. - Secure Boot V2 is the new RSA based secure boot scheme. - Supported in ESP32-ECO3 (ESP32 Chip Revision 3 onwards), ESP32-S2, ESP32-C3 ECO3. - Secure Boot V1 is the AES based secure boot scheme. - Supported in ESP32 and ESP32-ECO3. + Secure Boot V2 is the new RSA / ECDSA based secure boot scheme. + + - RSA based scheme is supported in ESP32 (Revision 3 onwards), ESP32-S2, ESP32-C3 (ECO3), ESP32-S3. + - ECDSA based scheme is supported in ESP32-C2 SoC. + + Please note that, RSA or ECDSA secure boot is property of specific SoC based on its HW design, supported + crypto accelerators, die-size, cost and similar parameters. Please note that RSA scheme has requirement + for bigger key sizes but at the same time it is comparatively faster than ECDSA verification. + + Secure Boot V1 is the AES based (custom) secure boot scheme supported in ESP32 SoC. config SECURE_BOOT_V1_ENABLED bool "Enable Secure Boot version 1" - depends on IDF_TARGET_ESP32 + depends on SECURE_BOOT_V1_SUPPORTED help Build a bootloader which enables secure boot version 1 on first boot. Refer to the Secure Boot section of the ESP-IDF Programmer's Guide for this version before enabling. config SECURE_BOOT_V2_ENABLED bool "Enable Secure Boot version 2" - depends on SECURE_BOOT_SUPPORTS_RSA + depends on SECURE_BOOT_V2_RSA_SUPPORTED || SECURE_BOOT_V2_ECC_SUPPORTED help Build a bootloader which enables Secure Boot version 2 on first boot. Refer to Secure Boot V2 section of the ESP-IDF Programmer's Guide for this version before enabling. @@ -599,14 +704,12 @@ menu "Security features" config SECURE_BOOT_VERIFICATION_KEY string "Secure boot public signature verification key" - depends on SECURE_SIGNED_APPS && !SECURE_BOOT_BUILD_SIGNED_BINARIES && !SECURE_SIGNED_APPS_RSA_SCHEME + depends on SECURE_SIGNED_APPS && SECURE_SIGNED_APPS_ECDSA_SCHEME && !SECURE_BOOT_BUILD_SIGNED_BINARIES default "signature_verification_key.bin" help Path to a public key file used to verify signed images. Secure Boot V1: This ECDSA public key is compiled into the bootloader and/or app, to verify app images. - Secure Boot V2: This RSA public key is compiled into the signature block at - the end of the bootloader/app. Key file is in raw binary format, and can be extracted from a PEM formatted private key using the espsecure.py @@ -614,6 +717,22 @@ menu "Security features" Refer to the Secure Boot section of the ESP-IDF Programmer's Guide for this version before enabling. + config SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE + bool "Enable Aggressive key revoke strategy" + depends on SECURE_BOOT && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY + default N + help + If this option is set, ROM bootloader will revoke the public key digest burned in efuse block + if it fails to verify the signature of software bootloader with it. + Revocation of keys does not happen when enabling secure boot. Once secure boot is enabled, + key revocation checks will be done on subsequent boot-up, while verifying the software bootloader + + This feature provides a strong resistance against physical attacks on the device. + + NOTE: Once a digest slot is revoked, it can never be used again to verify an image + This can lead to permanent bricking of the device, in case all keys are revoked + because of signature verification failure. + choice SECURE_BOOTLOADER_KEY_ENCODING bool "Hardware Key Encoding" depends on SECURE_BOOTLOADER_REFLASHABLE @@ -665,21 +784,29 @@ menu "Security features" choice SECURE_FLASH_ENCRYPTION_KEYSIZE bool "Size of generated AES-XTS key" default SECURE_FLASH_ENCRYPTION_AES128 - depends on (IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3) && SECURE_FLASH_ENC_ENABLED + depends on SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS && SECURE_FLASH_ENC_ENABLED help Size of generated AES-XTS key. - AES-128 uses a 256-bit key (32 bytes) which occupies one Efuse key block. - AES-256 uses a 512-bit key (64 bytes) which occupies two Efuse key blocks. + - AES-128 uses a 256-bit key (32 bytes) derived from 128 bits (16 bytes) burned in half Efuse key block. + Internally, it calculates SHA256(128 bits) + - AES-128 uses a 256-bit key (32 bytes) which occupies one Efuse key block. + - AES-256 uses a 512-bit key (64 bytes) which occupies two Efuse key blocks. This setting is ignored if either type of key is already burned to Efuse before the first boot. In this case, the pre-burned key is used and no new key is generated. + config SECURE_FLASH_ENCRYPTION_AES128_DERIVED + bool "AES-128 key derived from 128 bits (SHA256(128 bits))" + depends on SOC_FLASH_ENCRYPTION_XTS_AES_128_DERIVED + config SECURE_FLASH_ENCRYPTION_AES128 bool "AES-128 (256-bit key)" + depends on SOC_FLASH_ENCRYPTION_XTS_AES_128 && !(IDF_TARGET_ESP32C2 && SECURE_BOOT) config SECURE_FLASH_ENCRYPTION_AES256 bool "AES-256 (512-bit key)" + depends on SOC_FLASH_ENCRYPTION_XTS_AES_256 endchoice choice SECURE_FLASH_ENCRYPTION_MODE @@ -695,6 +822,10 @@ menu "Security features" Release mode should always be selected for production or manufacturing. Once enabled it's no longer possible for the device in ROM Download Mode to use the flash encryption hardware. + When EFUSE_VIRTUAL is enabled, SECURE_FLASH_ENCRYPTION_MODE_RELEASE is not available. + For CI tests we use IDF_CI_BUILD to bypass it ("export IDF_CI_BUILD=1"). + We do not recommend bypassing it for other purposes. + Refer to the Flash Encryption section of the ESP-IDF Programmer's Guide for details. config SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT @@ -703,12 +834,17 @@ menu "Security features" config SECURE_FLASH_ENCRYPTION_MODE_RELEASE bool "Release" - select PARTITION_TABLE_MD5 if !ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS + select PARTITION_TABLE_MD5 if !APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS + depends on !EFUSE_VIRTUAL || IDF_CI_BUILD endchoice + config SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE + bool + default y if (SOC_EFUSE_DIS_ICACHE || IDF_TARGET_ESP32) && SECURE_FLASH_ENC_ENABLED + menu "Potentially insecure options" - visible if SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT || SECURE_BOOT_INSECURE + visible if SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT || SECURE_BOOT_INSECURE || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT # NOERROR # NOTE: Options in this menu NEED to have SECURE_BOOT_INSECURE # and/or SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT in "depends on", as the menu @@ -733,6 +869,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_JTAG bool "Allow JTAG Debugging" depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE default N help If not set (default), the bootloader will permanently disable JTAG (across entire chip) on first boot @@ -745,7 +882,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_SHORT_APP_PARTITION bool "Allow app partition length not 64KB aligned" - depends on SECURE_BOOT_INSECURE + depends on SECURE_BOOT_INSECURE || SECURE_SIGNED_ON_UPDATE_NO_SECURE_BOOT help If not set (default), app partition size must be a multiple of 64KB. App images are padded to 64KB length, and the bootloader checks any trailing bytes after the signature (before the next 64KB @@ -779,7 +916,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS bool "Leave unused digest slots available (not revoke)" - depends on SECURE_BOOT_INSECURE && !IDF_TARGET_ESP32 + depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS default N help If not set (default), during startup in the app all unused digest slots will be revoked. @@ -790,6 +927,7 @@ menu "Security features" config SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC bool "Leave UART bootloader encryption enabled" depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE default N help If not set (default), the bootloader will permanently disable UART bootloader encryption access on @@ -810,8 +948,9 @@ menu "Security features" config SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE bool "Leave UART bootloader flash cache enabled" - depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && (IDF_TARGET_ESP32 || SOC_EFUSE_DIS_DOWNLOAD_ICACHE || SOC_EFUSE_DIS_DOWNLOAD_DCACHE) # NOERROR default N + select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE help If not set (default), the bootloader will permanently disable UART bootloader flash cache access on first boot. If set, the UART bootloader will still be able to access the flash cache. @@ -832,6 +971,40 @@ menu "Security features" Only use this option in testing environments, to avoid accidentally enabling flash encryption on the wrong device. The device needs to have flash encryption already enabled using espefuse.py. + config SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE + bool "Skip write-protection of DIS_CACHE (DIS_ICACHE, DIS_DCACHE)" + default n + depends on SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE + help + If not set (default, recommended), on the first boot the bootloader will burn the write-protection of + DIS_CACHE(for ESP32) or DIS_ICACHE/DIS_DCACHE(for other chips) eFuse when Flash Encryption is enabled. + Write protection for cache disable efuse prevents the chip from being blocked if it is set by accident. + App and bootloader use cache so disabling it makes the chip useless for IDF. + Due to other eFuses are linked with the same write protection bit (see the list below) then + write-protection will not be done if these SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC, + SECURE_BOOT_ALLOW_JTAG or SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE options are selected + to give a chance to turn on the chip into the release mode later. + + List of eFuses with the same write protection bit: + ESP32: MAC, MAC_CRC, DISABLE_APP_CPU, DISABLE_BT, DIS_CACHE, VOL_LEVEL_HP_INV. + + ESP32-C3: DIS_ICACHE, DIS_USB_JTAG, DIS_DOWNLOAD_ICACHE, DIS_USB_SERIAL_JTAG, + DIS_FORCE_DOWNLOAD, DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT. + + ESP32-C6: SWAP_UART_SDIO_EN, DIS_ICACHE, DIS_USB_JTAG, DIS_DOWNLOAD_ICACHE, + DIS_USB_SERIAL_JTAG, DIS_FORCE_DOWNLOAD, DIS_TWAI, JTAG_SEL_ENABLE, + DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT. + + ESP32-H2: DIS_ICACHE, DIS_USB_JTAG, POWERGLITCH_EN, DIS_FORCE_DOWNLOAD, SPI_DOWNLOAD_MSPI_DIS, + DIS_TWAI, JTAG_SEL_ENABLE, DIS_PAD_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT. + + ESP32-S2: DIS_ICACHE, DIS_DCACHE, DIS_DOWNLOAD_ICACHE, DIS_DOWNLOAD_DCACHE, + DIS_FORCE_DOWNLOAD, DIS_USB, DIS_TWAI, DIS_BOOT_REMAP, SOFT_DIS_JTAG, + HARD_DIS_JTAG, DIS_DOWNLOAD_MANUAL_ENCRYPT. + + ESP32-S3: DIS_ICACHE, DIS_DCACHE, DIS_DOWNLOAD_ICACHE, DIS_DOWNLOAD_DCACHE, + DIS_FORCE_DOWNLOAD, DIS_USB_OTG, DIS_TWAI, DIS_APP_CPU, DIS_PAD_JTAG, + DIS_DOWNLOAD_MANUAL_ENCRYPT, DIS_USB_JTAG, DIS_USB_SERIAL_JTAG, STRAP_JTAG_SEL, USB_PHY_SEL. endmenu # Potentially Insecure config SECURE_FLASH_CHECK_ENC_EN_IN_APP @@ -846,12 +1019,16 @@ menu "Security features" If not set, the app does not care if the flash encryption eFuse bit is set or not. + config SECURE_ROM_DL_MODE_ENABLED + bool + default y if SOC_SUPPORTS_SECURE_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT + choice SECURE_UART_ROM_DL_MODE bool "UART ROM download mode" - default SECURE_ENABLE_SECURE_ROM_DL_MODE if SECURE_TARGET_HAS_SECURE_ROM_DL_MODE && !SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT # NOERROR + default SECURE_ENABLE_SECURE_ROM_DL_MODE if SECURE_ROM_DL_MODE_ENABLED # NOERROR default SECURE_INSECURE_ALLOW_DL_MODE depends on SECURE_BOOT_V2_ENABLED || SECURE_FLASH_ENC_ENABLED - depends on !IDF_TARGET_ESP32 || ESP32_REV_MIN_3 + depends on !(IDF_TARGET_ESP32 && ESP32_REV_MIN_FULL < 300) config SECURE_DISABLE_ROM_DL_MODE bool "UART ROM download mode (Permanently disabled (recommended))" @@ -870,16 +1047,16 @@ menu "Security features" config SECURE_ENABLE_SECURE_ROM_DL_MODE bool "UART ROM download mode (Permanently switch to Secure mode (recommended))" - depends on SECURE_TARGET_HAS_SECURE_ROM_DL_MODE + depends on SOC_SUPPORTS_SECURE_DL_MODE select ESPTOOLPY_NO_STUB help If set, during startup the app will burn an eFuse bit to permanently switch the UART ROM Download Mode into a separate Secure Download mode. This option can only work if Download Mode is not already disabled by eFuse. - Secure Download mode limits the use of Download Mode functions to simple flash read, - write and erase operations, plus a command to return a summary of currently enabled - security features. + Secure Download mode limits the use of Download Mode functions to update SPI config, + changing baud rate, basic flash write and a command to return a summary of currently + enabled security features (`get_security_info`). Secure Download mode is not compatible with the esptool.py flasher stub feature, espefuse.py, read/writing memory or registers, encrypted download, or any other diff --git a/ports/espressif/components/bootloader/Makefile.projbuild b/ports/espressif/components/bootloader/Makefile.projbuild deleted file mode 100644 index 565d197fd..000000000 --- a/ports/espressif/components/bootloader/Makefile.projbuild +++ /dev/null @@ -1,167 +0,0 @@ -# Bootloader component (top-level project parts) -# -# The bootloader is not a real component that gets linked into the project. -# Instead it is an entire standalone project (in subproject/) that gets -# built in the upper project's build directory. This Makefile.projbuild provides -# the glue to build the bootloader project from the original project. It -# basically runs Make in the subproject/ directory but it needs to -# zero some variables the ESP-IDF project.mk makefile exports first, to not -# let them interfere. -# -BOOTLOADER_COMPONENT_PATH := $(COMPONENT_PATH) -BOOTLOADER_BUILD_DIR=$(abspath $(BUILD_DIR_BASE)/bootloader) -BOOTLOADER_BIN=$(BOOTLOADER_BUILD_DIR)/bootloader.bin - -# signing key path is resolved relative to the project directory -CONFIG_SECURE_BOOT_SIGNING_KEY ?= -SECURE_BOOT_SIGNING_KEY=$(abspath $(call dequote,$(CONFIG_SECURE_BOOT_SIGNING_KEY))) -export SECURE_BOOT_SIGNING_KEY # used by bootloader_support component - -BOOTLOADER_SIGNED_BIN ?= - -# Has a matching value in bootloader_support esp_flash_partitions.h -BOOTLOADER_OFFSET := 0x1000 - -# Custom recursive make for bootloader sub-project -# -# NB: Some variables are cleared in the environment, not -# overriden, because they need to be re-defined in the child -# project. -# -# Pass PROJECT_PATH variable, it will let the subproject look -# for user defined bootloader component(s). -BOOTLOADER_MAKE= +\ - PROJECT_PATH= \ - COMPONENT_DIRS= \ - $(MAKE) -C $(BOOTLOADER_COMPONENT_PATH)/subproject \ - V=$(V) \ - BUILD_DIR_BASE=$(BOOTLOADER_BUILD_DIR) \ - TEST_COMPONENTS= \ - TESTS_ALL= \ - EXCLUDE_COMPONENTS= \ - PROJECT_SOURCE_DIR=$(PROJECT_PATH) - -.PHONY: bootloader-clean bootloader-flash bootloader-list-components bootloader $(BOOTLOADER_BIN) - -$(BOOTLOADER_BIN): $(SDKCONFIG_MAKEFILE) - $(BOOTLOADER_MAKE) $@ - -clean: bootloader-clean - -bootloader-list-components: - $(BOOTLOADER_MAKE) list-components - -ifndef CONFIG_SECURE_BOOT -# If secure boot disabled, bootloader flashing is integrated -# with 'make flash' and no warnings are printed. - -bootloader: $(BOOTLOADER_BIN) | check_python_dependencies - @echo $(SEPARATOR) - @echo "Bootloader built. Default flash command is:" - @echo "$(ESPTOOLPY_WRITE_FLASH) $(BOOTLOADER_OFFSET) $^" - -ESPTOOL_ALL_FLASH_ARGS += $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN) -UF2_ADD_BINARIES += $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN) - -bootloader-flash: $(BOOTLOADER_BIN) $(call prereq_if_explicit,erase_flash) | check_python_dependencies - $(ESPTOOLPY_WRITE_FLASH) 0x1000 $^ - -else ifdef CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH - -# One time flashing requires user to run esptool.py command themselves, -# and warning is printed about inability to reflash. -# -# The flashing command is deliberately printed without an auto-reset -# step, so the device doesn't immediately reset to flash itself. - -bootloader: $(BOOTLOADER_BIN) | check_python_dependencies - @echo $(SEPARATOR) - @echo "Bootloader built. One-time flash command is:" - @echo "$(subst hard_reset,no_reset,$(ESPTOOLPY_WRITE_FLASH)) $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN)" - @echo $(SEPARATOR) - @echo "* IMPORTANT: After first boot, BOOTLOADER CANNOT BE RE-FLASHED on same device" - -else ifdef CONFIG_SECURE_BOOTLOADER_REFLASHABLE -# Reflashable secure bootloader -# generates a digest binary (bootloader + digest) - -ifdef CONFIG_SECURE_BOOTLOADER_KEY_ENCODING_192BIT -KEY_DIGEST_LEN=192 -else -KEY_DIGEST_LEN=256 -endif - -BOOTLOADER_DIGEST_BIN := $(BOOTLOADER_BUILD_DIR)/bootloader-reflash-digest.bin -SECURE_BOOTLOADER_KEY := $(BOOTLOADER_BUILD_DIR)/secure-bootloader-key-$(KEY_DIGEST_LEN).bin - -ifdef CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES -$(SECURE_BOOTLOADER_KEY): $(SECURE_BOOT_SIGNING_KEY) | check_python_dependencies - $(ESPSECUREPY) digest_private_key --keylen $(KEY_DIGEST_LEN) -k $< $@ -else -$(SECURE_BOOTLOADER_KEY): - @echo "No pre-generated key for a reflashable secure bootloader is available, due to signing configuration." - @echo "To generate one, you can use this command:" - @echo "espsecure.py generate_flash_encryption_key $@" - @echo "then re-run make." - exit 1 -endif - -bootloader: $(BOOTLOADER_DIGEST_BIN) - @echo $(SEPARATOR) - @echo "Bootloader built and secure digest generated. First time flash command is:" - @echo "$(ESPEFUSEPY) burn_key secure_boot_v1 $(SECURE_BOOTLOADER_KEY)" - @echo "$(ESPTOOLPY_WRITE_FLASH) $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN)" - @echo $(SEPARATOR) - @echo "To reflash the bootloader after initial flash:" - @echo "$(ESPTOOLPY_WRITE_FLASH) 0x0 $(BOOTLOADER_DIGEST_BIN)" - @echo $(SEPARATOR) - @echo "* After first boot, only re-flashes of this kind (with same key) will be accepted." - @echo "* Not recommended to re-use the same secure boot keyfile on multiple production devices." - -$(BOOTLOADER_DIGEST_BIN): $(BOOTLOADER_BIN) $(SECURE_BOOTLOADER_KEY) | check_python_dependencies - @echo "DIGEST $(notdir $@)" - $(ESPSECUREPY) digest_secure_bootloader -k $(SECURE_BOOTLOADER_KEY) -o $@ $< - -else ifdef CONFIG_SECURE_BOOT_V2_ENABLED -BOOTLOADER_SIGNED_BIN := $(BOOTLOADER_BUILD_DIR)/bootloader-signed.bin -ifdef CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES -bootloader: $(BOOTLOADER_BIN) $(SDKCONFIG_MAKEFILE) | check_python_dependencies - $(ESPSECUREPY) sign_data --keyfile $(SECURE_BOOT_SIGNING_KEY) --version 2 \ - -o $(BOOTLOADER_SIGNED_BIN) $(BOOTLOADER_BIN) -else -bootloader: $(BOOTLOADER_BIN) $(SDKCONFIG_MAKEFILE) | check_python_dependencies - @echo "Bootloader not signed. Sign the bootloader before flashing." - @echo "To sign the bootloader, you can use this command:" - @echo "espsecure.py sign_data --keyfile SECURE_BOOT_SIGNING_KEY --version 2 $(BOOTLOADER_BIN)" -endif - @echo $(SEPARATOR) - @echo "Use the following command to flash the bootloader:" -ifdef CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES - @echo "$(ESPTOOLPY_WRITE_FLASH) $(BOOTLOADER_OFFSET) $(BOOTLOADER_SIGNED_BIN)" -else - @echo "$(ESPTOOLPY_WRITE_FLASH) $(BOOTLOADER_OFFSET) $(BOOTLOADER_BIN)" -endif - @echo $(SEPARATOR) - -else # CONFIG_SECURE_BOOT && !CONFIG_SECURE_BOOTLOADER_REFLASHABLE \ -&& !CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH && !CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME -bootloader: - @echo "Invalid bootloader target: bad sdkconfig?" - @exit 1 -endif - -ifndef CONFIG_SECURE_BOOT -# don't build bootloader by default if secure boot is enabled -all_binaries: $(BOOTLOADER_BIN) -endif - -bootloader-clean: $(SDKCONFIG_MAKEFILE) - $(BOOTLOADER_MAKE) app-clean -ifdef CONFIG_SECURE_BOOTLOADER_REFLASHABLE - rm -f $(SECURE_BOOTLOADER_KEY) $(BOOTLOADER_DIGEST_BIN) -endif -ifdef CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME -ifdef CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES - rm -f $(BOOTLOADER_SIGNED_BIN) -endif -endif diff --git a/ports/espressif/components/bootloader/component.mk b/ports/espressif/components/bootloader/component.mk deleted file mode 100644 index 0ec5d93c3..000000000 --- a/ports/espressif/components/bootloader/component.mk +++ /dev/null @@ -1,6 +0,0 @@ -# bootloader component is special, as bootloader is also a project. -# -# This top-level component is only configuration files for the IDF project. -# -# See Makefile.projbuild for the targets which actually build the bootloader. -COMPONENT_CONFIG_ONLY := 1 diff --git a/ports/espressif/components/bootloader/project_include.cmake b/ports/espressif/components/bootloader/project_include.cmake index 359d8cefa..a1f3d247e 100644 --- a/ports/espressif/components/bootloader/project_include.cmake +++ b/ports/espressif/components/bootloader/project_include.cmake @@ -11,8 +11,9 @@ endif() # idf_build_get_property(build_dir BUILD_DIR) set(BOOTLOADER_BUILD_DIR "${build_dir}/bootloader") +set(BOOTLOADER_ELF_FILE "${BOOTLOADER_BUILD_DIR}/bootloader.elf") set(bootloader_binary_files - "${BOOTLOADER_BUILD_DIR}/bootloader.elf" + "${BOOTLOADER_ELF_FILE}" "${BOOTLOADER_BUILD_DIR}/bootloader.bin" "${BOOTLOADER_BUILD_DIR}/bootloader.map" ) @@ -30,9 +31,9 @@ if(CONFIG_SECURE_SIGNED_APPS) add_custom_target(gen_secure_boot_keys) if(CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME) - set(secure_apps_signing_scheme "1") - elseif(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME) - set(secure_apps_signing_scheme "2") + set(secure_apps_signing_version "1") + elseif(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME OR CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME) + set(secure_apps_signing_version "2") endif() if(CONFIG_SECURE_BOOT_V1_ENABLED) @@ -64,10 +65,22 @@ if(CONFIG_SECURE_SIGNED_APPS) # If the signing key is not found, create a phony gen_secure_boot_signing_key target that # fails the build. fail_at_build_time causes a cmake run next time # (to pick up a new signing key if one exists, etc.) - fail_at_build_time(gen_secure_boot_signing_key - "Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:" - "\tespsecure.py generate_signing_key --version ${secure_apps_signing_scheme} \ - ${CONFIG_SECURE_BOOT_SIGNING_KEY}") + if(CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME) + fail_at_build_time(gen_secure_boot_signing_key + "Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:" + "\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \ + ${CONFIG_SECURE_BOOT_SIGNING_KEY}") + else() + if(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_192_BITS) + set(scheme "ecdsa192") + elseif(CONFIG_SECURE_BOOT_ECDSA_KEY_LEN_256_BITS) + set(scheme "ecdsa256") + endif() + fail_at_build_time(gen_secure_boot_signing_key + "Secure Boot Signing Key ${CONFIG_SECURE_BOOT_SIGNING_KEY} does not exist. Generate using:" + "\tespsecure.py generate_signing_key --version ${secure_apps_signing_version} \ + --scheme ${scheme} ${CONFIG_SECURE_BOOT_SIGNING_KEY}") + endif() else() add_custom_target(gen_secure_boot_signing_key) endif() @@ -120,10 +133,6 @@ externalproject_add(bootloader -DPROJECT_SOURCE_DIR=${PROJECT_SOURCE_DIR} -DBOARD=${BOARD} ${sign_key_arg} ${ver_key_arg} - # LEGACY_INCLUDE_COMMON_HEADERS has to be passed in via cache variable since - # the bootloader common component requirements depends on this and - # config variables are not available before project() call. - -DLEGACY_INCLUDE_COMMON_HEADERS=${CONFIG_LEGACY_INCLUDE_COMMON_HEADERS} ${extra_cmake_args} INSTALL_COMMAND "" BUILD_ALWAYS 1 # no easy way around this... @@ -140,5 +149,5 @@ endif() # # So for now we just have the top-level build remove the final build products... set_property(DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}" APPEND PROPERTY - ADDITIONAL_MAKE_CLEAN_FILES + ADDITIONAL_CLEAN_FILES ${bootloader_binary_files}) diff --git a/ports/espressif/components/bootloader/subproject/CMakeLists.txt b/ports/espressif/components/bootloader/subproject/CMakeLists.txt index f2df83fab..2daf4d90e 100644 --- a/ports/espressif/components/bootloader/subproject/CMakeLists.txt +++ b/ports/espressif/components/bootloader/subproject/CMakeLists.txt @@ -1,4 +1,4 @@ -cmake_minimum_required(VERSION 3.5) +cmake_minimum_required(VERSION 3.16) if(NOT SDKCONFIG) message(FATAL_ERROR "Bootloader subproject expects the SDKCONFIG variable to be passed " @@ -37,7 +37,9 @@ set(COMPONENTS # Make EXTRA_COMPONENT_DIRS variable to point to the bootloader_components directory # of the project being compiled set(PROJECT_EXTRA_COMPONENTS "${PROJECT_SOURCE_DIR}/bootloader_components") -list(APPEND EXTRA_COMPONENT_DIRS "${PROJECT_EXTRA_COMPONENTS}") +if(EXISTS ${PROJECT_EXTRA_COMPONENTS}) + list(APPEND EXTRA_COMPONENT_DIRS "${PROJECT_EXTRA_COMPONENTS}") +endif() # Consider each directory in project's bootloader_components as a component to be compiled file(GLOB proj_components RELATIVE ${PROJECT_EXTRA_COMPONENTS} ${PROJECT_EXTRA_COMPONENTS}/*) @@ -50,15 +52,12 @@ endforeach() set(BOOTLOADER_BUILD 1) include("${IDF_PATH}/tools/cmake/project.cmake") -set(common_req log esp_rom esp_common esp_hw_support hal newlib) -if(LEGACY_INCLUDE_COMMON_HEADERS) - list(APPEND common_req soc hal) -endif() +set(common_req log esp_rom esp_common esp_hw_support newlib) idf_build_set_property(__COMPONENT_REQUIRES_COMMON "${common_req}") idf_build_set_property(__OUTPUT_SDKCONFIG 0) project(bootloader) -idf_build_set_property(COMPILE_DEFINITIONS "-DBOOTLOADER_BUILD=1" APPEND) +idf_build_set_property(COMPILE_DEFINITIONS "BOOTLOADER_BUILD=1" APPEND) idf_build_set_property(COMPILE_OPTIONS "-fno-stack-protector" APPEND) idf_component_get_property(main_args esptool_py FLASH_ARGS) diff --git a/ports/espressif/components/bootloader/subproject/Makefile b/ports/espressif/components/bootloader/subproject/Makefile deleted file mode 100644 index 5db762b78..000000000 --- a/ports/espressif/components/bootloader/subproject/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -# -# This is a project Makefile. It is assumed the directory this Makefile resides in is a -# project subdirectory. -# -ifeq ("$(MAKELEVEL)","0") -$(error Bootloader makefile expects to be run as part of 'make bootloader' from a top-level project.) -endif - -PROJECT_NAME := bootloader - -COMPONENTS := esp_hw_support esptool_py bootloader_support log spi_flash micro-ecc soc main efuse esp_rom hal xtensa - -# Clear C and CXX from top level project -CFLAGS = -CXXFLAGS = - -#We cannot include the some components like idf_target, esp_common directly but we need their includes. -CFLAGS += -I $(IDF_PATH)/components/$(IDF_TARGET)/include -CFLAGS += -I $(IDF_PATH)/components/esp_common/include -CFLAGS += -I $(IDF_PATH)/components/newlib/platform_include -CFLAGS += -I $(IDF_PATH)/components/xtensa/include -I $(IDF_PATH)/components/xtensa/$(IDF_TARGET)/include - -# The bootloader pseudo-component is also included in this build, for its Kconfig.projbuild to be included. -# -# IS_BOOTLOADER_BUILD tells the component Makefile.projbuild to be a no-op -IS_BOOTLOADER_BUILD := 1 -export IS_BOOTLOADER_BUILD - -# BOOTLOADER_BUILD macro is the same, for source file changes -CFLAGS += -D BOOTLOADER_BUILD=1 - -# include the top-level "project" include directory, for sdkconfig.h -CFLAGS += -I$(BUILD_DIR_BASE)/../include - -include $(IDF_PATH)/make/project.mk diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/component.mk b/ports/espressif/components/bootloader/subproject/components/micro-ecc/component.mk deleted file mode 100644 index 0ce055be0..000000000 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/component.mk +++ /dev/null @@ -1,6 +0,0 @@ -# only compile the "uECC_verify_antifault.c" file which includes the "micro-ecc/uECC.c" source file -COMPONENT_SRCDIRS := . - -COMPONENT_ADD_INCLUDEDIRS := . micro-ecc - -COMPONENT_SUBMODULES := micro-ecc diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore index cd812eb91..96c82b14d 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/.gitignore @@ -5,4 +5,4 @@ __pycache__ *.pyd *.pyz *.egg-info/ -.DS_Store \ No newline at end of file +.DS_Store diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md index 21e184466..111321bf7 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/README.md @@ -19,7 +19,7 @@ Features Usage Notes ----------- ### Point Representation ### -Compressed points are represented in the standard format as defined in http://www.secg.org/collateral/sec1_final.pdf; uncompressed points are represented in standard format, but without the `0x04` prefix. All functions except `uECC_compress()` only accept uncompressed points; use `uECC_compress()` and `uECC_decompress()` to convert between compressed and uncompressed point representations. +Compressed points are represented in the standard format as defined in http://www.secg.org/sec1-v2.pdf; uncompressed points are represented in standard format, but without the `0x04` prefix. All functions except `uECC_decompress()` only accept uncompressed points; use `uECC_compress()` and `uECC_decompress()` to convert between compressed and uncompressed point representations. Private keys are represented in the standard format. diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc index c98804032..c14bf5554 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/asm_avr.inc @@ -37,12 +37,12 @@ uECC_VLI_API void uECC_vli_clear(uECC_word_t *vli, wordcount_t num_words) { "sbc r31, __zero_reg__ \n\t" IJMP #endif - + REPEAT(uECC_MAX_WORDS, "st x+, __zero_reg__ \n\t") "1: \n\t" : "+x" (v) : [num] "r" (num_words) - : + : #if (uECC_MAX_WORDS != uECC_MIN_WORDS) "r30", "r31", "cc" #endif @@ -60,16 +60,16 @@ uECC_VLI_API void uECC_vli_set(uECC_word_t *dest, const uECC_word_t *src, wordco "sbc r31, __zero_reg__ \n\t" IJMP #endif - + REPEAT(uECC_MAX_WORDS, "ld r0, y+ \n\t" "st x+, r0 \n\t") "1: \n\t" : "+x" (d), "+y" (src) : [num] "r" ((uint8_t)(num_words * 2)) - : "r0", + : "r0" #if (uECC_MAX_WORDS != uECC_MIN_WORDS) - "r30", "r31", "cc" + , "r30", "r31", "cc" #endif ); } @@ -84,7 +84,7 @@ uECC_VLI_API void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words) { "sub r30, %[jump] \n\t" "sbc r31, __zero_reg__ \n\t" #endif - + "add r26, %[num] \n\t" "adc r27, __zero_reg__ \n\t" "ld r0, -x \n\t" @@ -93,7 +93,7 @@ uECC_VLI_API void uECC_vli_rshift1(uECC_word_t *vli, wordcount_t num_words) { #if (uECC_MAX_WORDS != uECC_MIN_WORDS) IJMP #endif - + REPEAT(DEC(uECC_MAX_WORDS), "ld r0, -x \n\t" "ror r0 \n\t" @@ -137,15 +137,15 @@ uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result, "sub r30, %[num] \n\t" "sbc r31, __zero_reg__ \n\t" #endif - + "clc \n\t" #if (uECC_MAX_WORDS != uECC_MIN_WORDS) IJMP REPEATM(uECC_MAX_WORDS, ADD_RJPM_TABLE) #endif - + REPEATM(uECC_MAX_WORDS, ADD_RJPM_DEST) - + "mov %[clb], __zero_reg__ \n\t" "adc %[clb], %[clb] \n\t" /* Store carry bit. */ @@ -184,15 +184,15 @@ uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result, "sub r30, %[num] \n\t" "sbc r31, __zero_reg__ \n\t" #endif - + "clc \n\t" #if (uECC_MAX_WORDS != uECC_MIN_WORDS) IJMP REPEATM(uECC_MAX_WORDS, SUB_RJPM_TABLE) #endif - + REPEATM(uECC_MAX_WORDS, SUB_RJPM_DEST) - + "mov %[clb], __zero_reg__ \n\t" "adc %[clb], %[clb] \n\t" /* Store carry bit. */ @@ -216,7 +216,7 @@ uECC_VLI_API void uECC_vli_mult(uECC_word_t *result, wordcount_t num_words) { /* num_words should already be in r18. */ register wordcount_t r18 __asm__("r18") = num_words; - + __asm__ volatile ( "push r18 \n\t" #if (uECC_MIN_WORDS == 20) @@ -268,7 +268,7 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, wordcount_t num_words) { /* num_words should already be in r20. */ register wordcount_t r20 __asm__("r20") = num_words; - + __asm__ volatile ( "push r20 \n\t" #if (uECC_MIN_WORDS == 20) @@ -329,7 +329,7 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { "out __SP_H__, r31 \n\t" "out __SREG__, r0 \n\t" "out __SP_L__, r30 \n\t" - + "adiw r30, 25 \n\t" /* we are shifting by 31 bits, so shift over 4 bytes (+ 1 since z initially points below the stack) */ "adiw r26, 40 \n\t" /* end of product */ @@ -384,10 +384,10 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { "ld r18, z \n\t" "adc r18, r1 \n\t" "st z+, r18 \n\t" - + "sbiw r30, 24 \n\t" /* move z back to point at tmp */ "sbiw r26, 40 \n\t" /* move x back to point at product */ - + /* add low bytes of tmp to product, storing in result */ "ld r18, z+ \n\t" "ld r19, x+ \n\t" @@ -403,13 +403,13 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { z is 20 bytes into tmp */ "sbiw r28, 20 \n\t" /* move y back to point at result */ "adiw r30, 4 \n\t" /* move z to point to the end of tmp */ - + /* do omega_mult again with the 4 relevant bytes */ /* z points to the end of tmp, x points to the end of product */ "ld r18, -z \n\t" /* Load word. */ "lsr r18 \n\t" /* Shift. */ "st -x, r18 \n\t" /* Store the first result word. */ - + "ld r18, -z \n\t" "ror r18 \n\t" "st -x, r18 \n\t" @@ -419,11 +419,11 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { "ld r18, -z \n\t" "ror r18 \n\t" "st -x, r18 \n\t" - + "eor r18, r18 \n\t" /* r18 = 0 */ "ror r18 \n\t" /* get last bit */ "st -x, r18 \n\t" /* store it */ - + "sbiw r26, 3 \n\t" /* move x back to point at beginning */ /* now we add a copy of the 4 bytes */ "ld r18, z+ \n\t" @@ -432,29 +432,29 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { "st x+, r18 \n\t" "ld r18, z+ \n\t" "st x+, r18 \n\t" - + "ld r18, z+ \n\t" "ld r19, x \n\t" "add r18, r19 \n\t" "st x+, r18 \n\t" - + /* Propagate over the remaining bytes */ "ld r18, x \n\t" "adc r18, r1 \n\t" "st x+, r18 \n\t" - + "ld r18, x \n\t" "adc r18, r1 \n\t" "st x+, r18 \n\t" - + "ld r18, x \n\t" "adc r18, r1 \n\t" "st x+, r18 \n\t" - + "ld r18, x \n\t" "adc r18, r1 \n\t" "st x+, r18 \n\t" - + /* now z points to the end of tmp, x points to the end of product (y still points at result) */ "sbiw r26, 8 \n\t" /* move x back to point at beginning of actual data */ @@ -468,23 +468,23 @@ static void vli_mmod_fast_secp160r1(uECC_word_t *result, uECC_word_t *product) { "ld r19, y \n\t" "adc r18, r19 \n\t" "st y+, r18 \n\t") - + /* Done adding, now propagate carry bit */ REPEAT(12, "ld r18, y \n\t" "adc r18, __zero_reg__ \n\t" "st y+, r18 \n\t") - + "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */ "sbiw r28, 20 \n\t" /* move y back to point at result */ - + "sbiw r30, 1 \n\t" /* fix stack pointer */ "in r0, __SREG__ \n\t" "cli \n\t" "out __SP_H__, r31 \n\t" "out __SREG__, r0 \n\t" "out __SP_L__, r30 \n\t" - + : "+x" (product), [carry] "+r" (carry) : "y" (result) : "r0", "r18", "r19", "r30", "r31", "cc" @@ -517,7 +517,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "out __SP_H__, r31 \n\t" "out __SREG__, r0 \n\t" "out __SP_L__, r30 \n\t" - + "adiw r30, 1 \n\t" /* add 1 since z initially points below the stack */ "adiw r26, 32 \n\t" /* product + uECC_WORDS */ "ldi r25, 0x03 \n\t" @@ -526,12 +526,12 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "ld r19, x+ \n\t" "ld r20, x+ \n\t" "ld r21, x+ \n\t" - + "mul r24, r18 \n\t" "st z+, r0 \n\t" "mov r22, r1 \n\t" "ldi r23, 0 \n\t" - + "mul r24, r19 \n\t" "add r22, r0 \n\t" "adc r23, r1 \n\t" /* can't overflow */ @@ -540,7 +540,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" /* can't overflow */ "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + "mul r24, r20 \n\t" "add r23, r0 \n\t" "adc r22, r1 \n\t" @@ -549,7 +549,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "mul r24, r21 \n\t" "add r22, r0 \n\t" "adc r23, r1 \n\t" @@ -558,7 +558,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + /* now we start adding the 2^32 part as well */ "add r23, r18 \n\t" // 28 "adc r22, r22 \n\t" @@ -571,7 +571,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r19 \n\t" // 27 "adc r23, r23 \n\t" "ld r19, x+ \n\t" @@ -583,7 +583,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + REPEAT(6, // 26 - 3 "add r23, r20 \n\t" "adc r22, r22 \n\t" @@ -596,7 +596,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r21 \n\t" "adc r23, r23 \n\t" "ld r21, x+ \n\t" @@ -608,7 +608,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + "add r23, r18 \n\t" "adc r22, r22 \n\t" "ld r18, x+ \n\t" @@ -620,7 +620,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r19 \n\t" "adc r23, r23 \n\t" "ld r19, x+ \n\t" @@ -644,7 +644,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r21 \n\t" // 1 "adc r23, r23 \n\t" "ld r21, x+ \n\t" @@ -656,7 +656,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + /* Now finish the carries etc */ "add r23, r18 \n\t" "adc r22, r22 \n\t" @@ -665,27 +665,27 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r19 \n\t" "adc r23, r23 \n\t" "st z+, r22 \n\t" "ldi r22, 0 \n\t" - + "add r23, r20 \n\t" "adc r22, r22 \n\t" "st z+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r21 \n\t" "adc r23, r23 \n\t" "st z+, r22 \n\t" "st z+, r23 \n\t" "eor r1, r1 \n\t" /* make r1 be 0 again */ - + "sbiw r30, 37 \n\t" /* move z back to point at tmp */ "subi r26, 64 \n\t" /* move x back to point at product */ "sbc r27, __zero_reg__ \n\t" - + /* add low bytes of tmp to product, storing in result */ "ld r18, z+ \n\t" "ld r19, x+ \n\t" @@ -696,7 +696,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "ld r19, x+ \n\t" "adc r18, r19 \n\t" "st y+, r18 \n\t") - + "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */ /* at this point x is at the end of product, y is at the end of result, z is 32 bytes into tmp */ @@ -710,12 +710,12 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "ld r19, z+ \n\t" "ld r20, z+ \n\t" "ld r21, z+ \n\t" - + "mul r24, r18 \n\t" "st x+, r0 \n\t" "mov r22, r1 \n\t" "ldi r23, 0 \n\t" - + "mul r24, r19 \n\t" "add r22, r0 \n\t" "adc r23, r1 \n\t" /* can't overflow */ @@ -724,7 +724,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" /* can't overflow */ "st x+, r22 \n\t" "ldi r22, 0 \n\t" - + "mul r24, r20 \n\t" "add r23, r0 \n\t" "adc r22, r1 \n\t" @@ -733,7 +733,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st x+, r23 \n\t" "ldi r23, 0 \n\t" - + "mul r24, r21 \n\t" "add r22, r0 \n\t" "adc r23, r1 \n\t" @@ -742,7 +742,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st x+, r22 \n\t" "ldi r22, 0 \n\t" - + "add r23, r18 \n\t" "adc r22, r22 \n\t" "ld r18, z+ \n\t" @@ -754,7 +754,7 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r22, r1 \n\t" "st x+, r23 \n\t" "ldi r23, 0 \n\t" - + /* Now finish the carries etc */ "add r22, r19 \n\t" "adc r23, r23 \n\t" @@ -763,23 +763,23 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "adc r23, r1 \n\t" "st x+, r22 \n\t" "ldi r22, 0 \n\t" - + "add r23, r20 \n\t" "adc r22, r22 \n\t" "st x+, r23 \n\t" "ldi r23, 0 \n\t" - + "add r22, r21 \n\t" "adc r23, r23 \n\t" "st x+, r22 \n\t" "ldi r22, 0 \n\t" - + "add r23, r18 \n\t" "adc r22, r22 \n\t" "st x+, r23 \n\t" "st x+, r22 \n\t" "eor r1, r1 \n\t" /* make r1 be 0 again */ - + /* now z points to the end of tmp, x points to the end of product (y still points at result) */ "sbiw r26, 10 \n\t" /* move x back to point at beginning of actual data */ @@ -793,28 +793,28 @@ static void vli_mmod_fast_secp256k1(uECC_word_t *result, uECC_word_t *product) { "ld r19, y \n\t" "adc r18, r19 \n\t" "st y+, r18 \n\t") - + /* Done adding, now propagate carry bit */ REPEAT(22, "ld r18, y \n\t" "adc r18, __zero_reg__ \n\t" "st y+, r18 \n\t") - + "adc %[carry], __zero_reg__ \n\t" /* Store carry bit (carry flag is cleared). */ "sbiw r28, 32 \n\t" /* move y back to point at result */ - + "sbiw r30, 1 \n\t" /* fix stack pointer */ "in r0, __SREG__ \n\t" "cli \n\t" "out __SP_H__, r31 \n\t" "out __SREG__, r0 \n\t" "out __SP_L__, r30 \n\t" - + : "+x" (product), [carry] "+r" (carry) : "y" (result) : "r0", "r18", "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r30", "r31", "cc" ); - + if (carry > 0) { --carry; uECC_vli_sub(result, result, curve_secp256k1.p, 32); @@ -845,7 +845,7 @@ uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result, __asm__ volatile ( "clc \n\t" - + "1: \n\t" "ld %[left], x+ \n\t" /* Load left byte. */ "ld %[right], y+ \n\t" /* Load right byte. */ @@ -853,12 +853,12 @@ uECC_VLI_API uECC_word_t uECC_vli_add(uECC_word_t *result, "st z+, %[left] \n\t" /* Store the result. */ "dec %[i] \n\t" "brne 1b \n\t" - + "adc %[carry], %[carry] \n\t" /* Store carry bit. */ : "+z" (r), "+x" (left), "+y" (right), [i] "+r" (num_words), [carry] "+r" (carry), [left] "=&r" (left_byte), [right] "=&r" (right_byte) - : + : : "cc" ); return carry; @@ -878,7 +878,7 @@ uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result, __asm__ volatile ( "clc \n\t" - + "1: \n\t" "ld %[left], x+ \n\t" /* Load left byte. */ "ld %[right], y+ \n\t" /* Load right byte. */ @@ -886,10 +886,10 @@ uECC_VLI_API uECC_word_t uECC_vli_sub(uECC_word_t *result, "st z+, %[left] \n\t" /* Store the result. */ "dec %[i] \n\t" "brne 1b \n\t" - + "adc %[borrow], %[borrow] \n\t" /* Store carry bit in borrow. */ - : "+z" (r), "+x" (left), "+y" (right), [i] "+r" (i), + : "+z" (r), "+x" (left), "+y" (right), [i] "+r" (num_words), [borrow] "+r" (borrow), [left] "=&r" (left_byte), [right] "=&r" (right_byte) : : "cc" @@ -911,86 +911,86 @@ uECC_VLI_API void uECC_vli_mult(uECC_word_t *result, uint8_t r2 = 0; uint8_t zero = 0; uint8_t k, i; - + __asm__ volatile ( "ldi %[k], 1 \n\t" /* k = 1; k < num_words; ++k */ - + "1: \n\t" "ldi %[i], 0 \n\t" /* i = 0; i < k; ++i */ - + "add r28, %[k] \n\t" /* pre-add right ptr */ "adc r29, %[zero] \n\t" - + "2: \n\t" "ld r0, x+ \n\t" "ld r1, -y \n\t" "mul r0, r1 \n\t" - + "add %[r0], r0 \n\t" "adc %[r1], r1 \n\t" "adc %[r2], %[zero] \n\t" - + "inc %[i] \n\t" "cp %[i], %[k] \n\t" "brlo 2b \n\t" /* loop if i < k */ - + "sub r26, %[k] \n\t" /* fix up left ptr */ "sbc r27, %[zero] \n\t" - + "st z+, %[r0] \n\t" /* Store the result. */ "mov %[r0], %[r1] \n\t" "mov %[r1], %[r2] \n\t" "mov %[r2], %[zero] \n\t" - + "inc %[k] \n\t" "cp %[k], %[num] \n\t" "brlo 1b \n\t" /* loop if k < num_words */ - + /* second half */ "mov %[k], %[num] \n\t" /* k = num_words; k > 0; --k */ "add r28, %[num] \n\t" /* move right ptr to point at the end of right */ "adc r29, %[zero] \n\t" - + "1: \n\t" "ldi %[i], 0 \n\t" /* i = 0; i < k; ++i */ - + "2: \n\t" "ld r0, x+ \n\t" "ld r1, -y \n\t" "mul r0, r1 \n\t" - + "add %[r0], r0 \n\t" "adc %[r1], r1 \n\t" "adc %[r2], %[zero] \n\t" - + "inc %[i] \n\t" "cp %[i], %[k] \n\t" "brlo 2b \n\t" /* loop if i < k */ - + "add r28, %[k] \n\t" /* fix up right ptr */ "adc r29, %[zero] \n\t" - + "st z+, %[r0] \n\t" /* Store the result. */ "mov %[r0], %[r1] \n\t" "mov %[r1], %[r2] \n\t" "mov %[r2], %[zero] \n\t" - + "dec %[k] \n\t" "sub r26, %[k] \n\t" /* fix up left ptr (after k is decremented, so next time we start 1 higher) */ "sbc r27, %[zero] \n\t" - + "cp %[k], %[zero] \n\t" "brne 1b \n\t" /* loop if k > 0 */ - + "st z+, %[r0] \n\t" /* Store last result byte. */ "eor r1, r1 \n\t" /* fix r1 to be 0 again */ - + : "+z" (result), "+x" (left), "+y" (right), [r0] "+r" (r0), [r1] "+r" (r1), [r2] "+r" (r2), [zero] "+r" (zero), [num] "+r" (num_words), [k] "=&r" (k), [i] "=&r" (i) - : + : : "r0", "cc" ); } @@ -1007,18 +1007,18 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, uint8_t r2 = 0; uint8_t zero = 0; uint8_t k; - + __asm__ volatile ( "ldi %[k], 1 \n\t" /* k = 1; k < num_words * 2; ++k */ - + "1: \n\t" - + "movw r26, %[orig] \n\t" /* copy orig ptr to 'left' ptr */ "movw r30, %[orig] \n\t" /* copy orig ptr to 'right' ptr */ "cp %[k], %[num] \n\t" "brlo 2f \n\t" "breq 2f \n\t" - + /* when k > num_words, we start from (k - num_words) on the 'left' ptr */ "add r26, %[k] \n\t" "adc r27, %[zero] \n\t" @@ -1027,11 +1027,11 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, "add r30, %[num] \n\t" /* move right ptr to point at the end */ "adc r31, %[zero] \n\t" "rjmp 3f \n\t" - + "2: \n\t" /* when k <= num_words, we add k to the 'right' ptr */ "add r30, %[k] \n\t" /* pre-add 'right' ptr */ "adc r31, %[zero] \n\t" - + "3: \n\t" "ld r0, x+ \n\t" "cp r26, r30 \n\t" /* if left == right here, then we are done after this mult @@ -1039,7 +1039,7 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, "breq 4f \n\t" "ld r1, -z \n\t" "mul r0, r1 \n\t" - + /* add twice since it costs the same as doubling */ "add %[r0], r0 \n\t" "adc %[r1], r1 \n\t" @@ -1047,18 +1047,18 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, "add %[r0], r0 \n\t" "adc %[r1], r1 \n\t" "adc %[r2], %[zero] \n\t" - + "cpse r26, r30 \n\t" /* if left == right here, then we are done */ "rjmp 3b \n\t" "rjmp 5f \n\t" /* skip code for non-doubled mult */ - + "4: \n\t" "ld r1, -z \n\t" "mul r0, r1 \n\t" "add %[r0], r0 \n\t" "adc %[r1], r1 \n\t" "adc %[r2], %[zero] \n\t" - + "5: \n\t" "movw r30, %[result] \n\t" /* make z point to result */ "st z+, %[r0] \n\t" /* Store the result. */ @@ -1066,15 +1066,15 @@ uECC_VLI_API void uECC_vli_square(uECC_word_t *result, "mov %[r0], %[r1] \n\t" "mov %[r1], %[r2] \n\t" "mov %[r2], %[zero] \n\t" - + "inc %[k] \n\t" "cp %[k], %[max] \n\t" "brlo 1b \n\t" /* loop if k < num_words * 2 */ - + "movw r30, %[result] \n\t" /* make z point to result */ "st z+, %[r0] \n\t" /* Store last result byte. */ "eor r1, r1 \n\t" /* fix r1 to be 0 again */ - + : [result] "+r" (r), [r0] "+r" (r0), [r1] "+r" (r1), [r2] "+r" (r2), [zero] "+r" (zero), [k] "=&a" (k) diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py index 940fadc2a..957dd7920 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/emk_project.py @@ -12,6 +12,11 @@ c_link_flags = [] cxx_link_flags = ["-fno-rtti", "-fno-exceptions"] +if "root" in emk.options: + root = emk.options["root"] +else: + root = "/" + def setup_build_dir(): build_arch = None if "arch" in emk.options: @@ -54,9 +59,9 @@ def setup_avr(): global c global link - c.compiler = c.GccCompiler("/Projects/avr-tools/bin/avr-") + c.compiler = c.GccCompiler(root + "Projects/avr-tools/bin/avr-") c.flags += ["-mmcu=atmega256rfr2", "-ffunction-sections", "-fdata-sections"] - link.linker = link.GccLinker("/Projects/avr-tools/bin/avr-") + link.linker = link.GccLinker(root + "Projects/avr-tools/bin/avr-") link.flags += ["-mmcu=atmega256rfr2", "-mrelax", "-Wl,--gc-sections"] link.strip = True @@ -66,30 +71,30 @@ def setup_arm_thumb(): global asm global utils - asm.assembler = asm.GccAssembler("/cross/arm_cortex/bin/arm-none-eabi-") - c.compiler = c.GccCompiler("/cross/arm_cortex/bin/arm-none-eabi-") - link.linker = link.GccLinker("/cross/arm_cortex/bin/arm-none-eabi-") + asm.assembler = asm.GccAssembler(root + "cross/arm_cortex/bin/arm-none-eabi-") + c.compiler = c.GccCompiler(root + "cross/arm_cortex/bin/arm-none-eabi-") + link.linker = link.GccLinker(root + "cross/arm_cortex/bin/arm-none-eabi-") c.flags.extend(["-mcpu=cortex-m0", "-mthumb", "-ffunction-sections", "-fdata-sections", "-fno-builtin-fprintf", "-fno-builtin-printf"]) c.defines["LPC11XX"] = 1 - + link.local_flags.extend(["-mcpu=cortex-m0", "-mthumb", "-nostartfiles", "-nostdlib", "-Wl,--gc-sections"]) - link.local_flags.extend(["-Tflash.lds", "-L/Projects/lpc11xx/core", "/Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o"]) + link.local_flags.extend(["-Tflash.lds", "-L" + root + "Projects/lpc11xx/core", root + "Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o"]) link.local_syslibs += ["gcc"] - link.depdirs += ["/Projects/lpc11xx/stdlib"] + link.depdirs += [root + "Projects/lpc11xx/stdlib"] def do_objcopy(produces, requires): - utils.call("/cross/arm_cortex/bin/arm-none-eabi-objcopy", "-O", "binary", requires[0], produces[0]) + utils.call(root + "cross/arm_cortex/bin/arm-none-eabi-objcopy", "-O", "binary", requires[0], produces[0]) def handle_exe(path): - emk.depend(path, "/Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o") + emk.depend(path, root + "Projects/lpc11xx/core/" + emk.build_dir + "/board_cstartup.o") emk.rule(do_objcopy, path + ".bin", path, cwd_safe=True, ex_safe=True) emk.autobuild(path + ".bin") link.exe_funcs.append(handle_exe) link.strip = True - - emk.recurse("/Projects/lpc11xx/core") + + emk.recurse(root + "Projects/lpc11xx/core") def setup_linux_rpi(): global c @@ -97,7 +102,7 @@ def setup_linux_rpi(): c.compiler = c.GccCompiler("/Volumes/xtools/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-") link.linker = link.GccLinker("/Volumes/xtools/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi-") - + c.flags.extend(["-fomit-frame-pointer"]) setup_build_dir() diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino index c3c8900d8..64a0be50f 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/examples/ecc_test/ecc_test.ino @@ -1,7 +1,5 @@ #include -extern "C" { - static int RNG(uint8_t *dest, unsigned size) { // Use the least-significant bits from the ADC for an unconnected pin (or connected to a source of // random noise). This can take a long time to generate random data if the result of analogRead(0) @@ -29,8 +27,6 @@ static int RNG(uint8_t *dest, unsigned size) { return 1; } -} // extern "C" - void setup() { Serial.begin(115200); Serial.print("Testing ecc\n"); @@ -82,4 +78,3 @@ void loop() { Serial.print("Shared secrets are identical\n"); } } - diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc index 148cafc95..7e0373f50 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/platform-specific.inc @@ -66,6 +66,29 @@ static int default_RNG(uint8_t *dest, unsigned size) { } #define default_RNG_defined 1 +#elif defined(RIOT_VERSION) + +#include + +static int default_RNG(uint8_t *dest, unsigned size) { + random_bytes(dest, size); + return 1; +} +#define default_RNG_defined 1 + +#elif defined(NRF52_SERIES) + +#include "app_error.h" +#include "nrf_crypto_rng.h" + +static int default_RNG(uint8_t *dest, unsigned size) +{ + // make sure to call nrf_crypto_init and nrf_crypto_rng_init first + ret_code_t ret_code = nrf_crypto_rng_vector_generate(dest, size); + return (ret_code == NRF_SUCCESS) ? 1 : 0; +} +#define default_RNG_defined 1 + #endif /* platform */ #endif /* _UECC_PLATFORM_SPECIFIC_H_ */ diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c new file mode 100644 index 000000000..1e902b266 --- /dev/null +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/test/ecdsa_test_vectors.c @@ -0,0 +1,128 @@ +/* Copyright 2020, Kenneth MacKay. Licensed under the BSD 2-clause license. */ + +#include "uECC.h" + +#include +#include +#include + +typedef struct { + const char* private_key; + const char* public_key; + const char* k; + const char* hash; + const char* r; + const char* s; +} Test; + +Test secp256k1_tests[] = { + { + "ebb2c082fd7727890a28ac82f6bdf97bad8de9f5d7c9028692de1a255cad3e0f", + "779dd197a5df977ed2cf6cb31d82d43328b790dc6b3b7d4437a427bd5847dfcde94b724a555b6d017bb7607c3e3281daf5b1699d6ef4124975c9237b917d426f", + "49a0d7b786ec9cde0d0721d72804befd06571c974b191efb42ecf322ba9ddd9a", + "4b688df40bcedbe641ddb16ff0a1842d9c67ea1c3bf63f3e0471baa664531d1a", + "241097efbf8b63bf145c8961dbdf10c310efbb3b2676bbc0f8b08505c9e2f795", + "021006b7838609339e8b415a7f9acb1b661828131aef1ecbc7955dfb01f3ca0e" + }, +}; + +extern int uECC_sign_with_k(const uint8_t *private_key, + const uint8_t *message_hash, + unsigned hash_size, + const uint8_t *k, + uint8_t *signature, + uECC_Curve curve); + + +void vli_print(uint8_t *vli, unsigned int size) { + for(unsigned i=0; i +#include +#include + +typedef struct { + const char* k; + const char* Q; + int success; +} Test; + +Test secp160r1_tests[] = { + /* Note, I couldn't find any test vectors for secp160r1 online, so these are just + generated on my desktop using uECC. */ + { + "000000000000000000000000000000000000000000", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "000000000000000000000000000000000000000001", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "000000000000000000000000000000000000000002", + "02F997F33C5ED04C55D3EDF8675D3E92E8F46686F083A323482993E9440E817E21CFB7737DF8797B", + 1 + }, + { + "000000000000000000000000000000000000000003", + "7B76FF541EF363F2DF13DE1650BD48DAA958BC59C915CA790D8C8877B55BE0079D12854FFE9F6F5A", + 1 + }, + { /* n - 4 */ + "0100000000000000000001F4C8F927AED3CA752253", + "B4041D8683BE99F0AFE01C307B1AD4C100CF2A88C0CD35127BE0F73FF99F338B350B5A42864112F7", + 1 + }, + { /* n - 3 */ + "0100000000000000000001F4C8F927AED3CA752254", + "7B76FF541EF363F2DF13DE1650BD48DAA958BC5936EA3586F27377884AA41FF862ED7AAF816090A5", + 1 + }, + { /* n - 2 */ + "0100000000000000000001F4C8F927AED3CA752255", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { /* n - 1 */ + "0100000000000000000001F4C8F927AED3CA752256", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { /* n */ + "0100000000000000000001F4C8F927AED3CA752257", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, +}; + + +Test secp192r1_tests[] = { + { + "000000000000000000000000000000000000000000000000", + "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "000000000000000000000000000000000000000000000001", + "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF101207192B95FFC8DA78631011ED6B24CDD573F977A11E794811", + 0 + }, + { + "000000000000000000000000000000000000000000000002", + "DAFEBF5828783F2AD35534631588A3F629A70FB16982A888DD6BDA0D993DA0FA46B27BBC141B868F59331AFA5C7E93AB", + 1 + }, + { + "000000000000000000000000000000000000000000000003", + "76E32A2557599E6EDCD283201FB2B9AADFD0D359CBB263DA782C37E372BA4520AA62E0FED121D49EF3B543660CFD05FD", + 1 + }, + { /* n - 4 */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282D", + "35433907297CC378B0015703374729D7A4FE46647084E4BA5D9B667B0DECA3CFE15C534F88932B0DDAC764CEE24C41CD", + 1 + }, + { /* n - 3 */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282E", + "76E32A2557599E6EDCD283201FB2B9AADFD0D359CBB263DA87D3C81C8D45BADF559D1F012EDE2B600C4ABC99F302FA02", + 1 + }, + { /* n - 2 */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D2282F", + "DAFEBF5828783F2AD35534631588A3F629A70FB16982A888229425F266C25F05B94D8443EBE4796FA6CCE505A3816C54", + 0 + }, + { /* n - 1 */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22830", + "188DA80EB03090F67CBF20EB43A18800F4FF0AFD82FF1012F8E6D46A003725879CEFEE1294DB32298C06885EE186B7EE", + 0 + }, + { /* n */ + "FFFFFFFFFFFFFFFFFFFFFFFF99DEF836146BC9B1B4D22831", + "000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, +}; + +Test secp224r1_tests[] = { + { + "00000000000000000000000000000000000000000000000000000000", + "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "00000000000000000000000000000000000000000000000000000001", + "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D21BD376388B5F723FB4C22DFE6CD4375A05A07476444D5819985007E34", + 0 + }, + { + "00000000000000000000000000000000000000000000000000000002", + "706A46DC76DCB76798E60E6D89474788D16DC18032D268FD1A704FA61C2B76A7BC25E7702A704FA986892849FCA629487ACF3709D2E4E8BB", + 1 + }, + { + "00000000000000000000000000000000000000000000000000000003", + "DF1B1D66A551D0D31EFF822558B9D2CC75C2180279FE0D08FD896D04A3F7F03CADD0BE444C0AA56830130DDF77D317344E1AF3591981A925", + 1 + }, + { /* n - 4 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A39", + "AE99FEEBB5D26945B54892092A8AEE02912930FA41CD114E40447301FB7DA7F5F13A43B81774373C879CD32D6934C05FA758EEB14FCFAB38", + 1 + }, + { /* n - 3 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3A", + "DF1B1D66A551D0D31EFF822558B9D2CC75C2180279FE0D08FD896D045C080FC3522F41BBB3F55A97CFECF21F882CE8CBB1E50CA6E67E56DC", + 1 + }, + { /* n - 2 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3B", + "706A46DC76DCB76798E60E6D89474788D16DC18032D268FD1A704FA6E3D4895843DA188FD58FB0567976D7B50359D6B78530C8F62D1B1746", + 0 + }, + { /* n - 1 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3C", + "B70E0CBD6BB4BF7F321390B94A03C1D356C21122343280D6115C1D2142C89C774A08DC04B3DD201932BC8A5EA5F8B89BBB2A7E667AFF81CD", + 0 + }, + { /* n */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFF16A2E0B8F03E13DD29455C5C2A3D", + "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, +}; + +Test secp256r1_tests[] = { + { + "0000000000000000000000000000000000000000000000000000000000000000", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "0000000000000000000000000000000000000000000000000000000000000001", + "6B17D1F2E12C4247F8BCE6E563A440F277037D812DEB33A0F4A13945D898C2964FE342E2FE1A7F9B8EE7EB4A7C0F9E162BCE33576B315ECECBB6406837BF51F5", + 0 + }, + { + "0000000000000000000000000000000000000000000000000000000000000002", + "7CF27B188D034F7E8A52380304B51AC3C08969E277F21B35A60B48FC4766997807775510DB8ED040293D9AC69F7430DBBA7DADE63CE982299E04B79D227873D1", + 1 + }, + { + "0000000000000000000000000000000000000000000000000000000000000003", + "5ECBE4D1A6330A44C8F7EF951D4BF165E6C6B721EFADA985FB41661BC6E7FD6C8734640C4998FF7E374B06CE1A64A2ECD82AB036384FB83D9A79B127A27D5032", + 1 + }, + { /* n - 4 */ + "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254D", + "E2534A3532D08FBBA02DDE659EE62BD0031FE2DB785596EF509302446B0308521F0EA8A4B39CC339E62011A02579D289B103693D0CF11FFAA3BD3DC0E7B12739", + 1 + }, + { /* n - 3 */ + "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254E", + "5ECBE4D1A6330A44C8F7EF951D4BF165E6C6B721EFADA985FB41661BC6E7FD6C78CB9BF2B6670082C8B4F931E59B5D1327D54FCAC7B047C265864ED85D82AFCD", + 1 + }, + { /* n - 2 */ + "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC63254F", + "7CF27B188D034F7E8A52380304B51AC3C08969E277F21B35A60B48FC47669978F888AAEE24712FC0D6C26539608BCF244582521AC3167DD661FB4862DD878C2E", + 0 + }, + { /* n - 1 */ + "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC632550", + "6B17D1F2E12C4247F8BCE6E563A440F277037D812DEB33A0F4A13945D898C296B01CBD1C01E58065711814B583F061E9D431CCA994CEA1313449BF97C840AE0A", + 0 + }, + { /* n */ + "FFFFFFFF00000000FFFFFFFFFFFFFFFFBCE6FAADA7179E84F3B9CAC2FC632551", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, +}; + +Test secp256k1_tests[] = { + { + "0000000000000000000000000000000000000000000000000000000000000000", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, + { + "0000000000000000000000000000000000000000000000000000000000000001", + "79BE667EF9DCBBAC55A06295CE870B07029BFCDB2DCE28D959F2815B16F81798483ADA7726A3C4655DA4FBFC0E1108A8FD17B448A68554199C47D08FFB10D4B8", + 0 + }, + { + "0000000000000000000000000000000000000000000000000000000000000002", + "C6047F9441ED7D6D3045406E95C07CD85C778E4B8CEF3CA7ABAC09B95C709EE51AE168FEA63DC339A3C58419466CEAEEF7F632653266D0E1236431A950CFE52A", + 1 + }, + { + "0000000000000000000000000000000000000000000000000000000000000003", + "F9308A019258C31049344F85F89D5229B531C845836F99B08601F113BCE036F9388F7B0F632DE8140FE337E62A37F3566500A99934C2231B6CB9FD7584B8E672", + 1 + }, + { /* n - 4 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413D", + "E493DBF1C10D80F3581E4904930B1404CC6C13900EE0758474FA94ABE8C4CD13AE1266C15F2BAA48A9BD1DF6715AEBB7269851CC404201BF30168422B88C630D", + 1 + }, + { /* n - 3 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413E", + "F9308A019258C31049344F85F89D5229B531C845836F99B08601F113BCE036F9C77084F09CD217EBF01CC819D5C80CA99AFF5666CB3DDCE4934602897B4715BD", + 1 + }, + { /* n - 2 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD036413F", + "C6047F9441ED7D6D3045406E95C07CD85C778E4B8CEF3CA7ABAC09B95C709EE5E51E970159C23CC65C3A7BE6B99315110809CD9ACD992F1EDC9BCE55AF301705", + 0 + }, + { /* n - 1 */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD0364140", + "79BE667EF9DCBBAC55A06295CE870B07029BFCDB2DCE28D959F2815B16F81798B7C52588D95C3B9AA25B0403F1EEF75702E84BB7597AABE663B82F6F04EF2777", + 0 + }, + { /* n */ + "FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFEBAAEDCE6AF48A03BBFD25E8CD0364141", + "00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000", + 0 + }, +}; + + +void vli_print(uint8_t *vli, unsigned int size) { + for(unsigned i=0; i> ((bitcount_t)(num_words * uECC_WORD_SIZE * 8 - num_bits)); + if (!uECC_vli_isZero(random, num_words) && + uECC_vli_cmp(top, random, num_words) == 1) { + return 1; + } + } + return 0; +} + static uECC_word_t EccPoint_compute_public_key(uECC_word_t *result, uECC_word_t *private_key, uECC_Curve curve) { uECC_word_t tmp1[uECC_MAX_WORDS]; uECC_word_t tmp2[uECC_MAX_WORDS]; uECC_word_t *p2[2] = {tmp1, tmp2}; + uECC_word_t *initial_Z = 0; uECC_word_t carry; /* Regularize the bitcount for the private key so that attackers cannot use a side channel attack to learn the number of leading zeros. */ carry = regularize_k(private_key, tmp1, tmp2, curve); - EccPoint_mult(result, curve->G, p2[!carry], 0, curve->num_n_bits + 1, curve); + /* If an RNG function was specified, try to get a random initial Z value to improve + protection against side-channel attacks. */ + if (g_rng_function) { + if (!uECC_generate_random_int(p2[carry], curve->p, curve->num_words)) { + return 0; + } + initial_Z = p2[carry]; + } + EccPoint_mult(result, curve->G, p2[!carry], initial_Z, curve->num_n_bits + 1, curve); if (EccPoint_isZero(result, curve)) { return 0; @@ -954,7 +994,7 @@ uECC_VLI_API void uECC_vli_bytesToNative(uint8_t *native, uECC_VLI_API void uECC_vli_nativeToBytes(uint8_t *bytes, int num_bytes, const uECC_word_t *native) { - wordcount_t i; + int i; for (i = 0; i < num_bytes; ++i) { unsigned b = num_bytes - 1 - i; bytes[i] = native[b / uECC_WORD_SIZE] >> (8 * (b % uECC_WORD_SIZE)); @@ -964,7 +1004,7 @@ uECC_VLI_API void uECC_vli_nativeToBytes(uint8_t *bytes, uECC_VLI_API void uECC_vli_bytesToNative(uECC_word_t *native, const uint8_t *bytes, int num_bytes) { - wordcount_t i; + int i; uECC_vli_clear(native, (num_bytes + (uECC_WORD_SIZE - 1)) / uECC_WORD_SIZE); for (i = 0; i < num_bytes; ++i) { unsigned b = num_bytes - 1 - i; @@ -975,32 +1015,6 @@ uECC_VLI_API void uECC_vli_bytesToNative(uECC_word_t *native, #endif /* uECC_WORD_SIZE */ -/* Generates a random integer in the range 0 < random < top. - Both random and top have num_words words. */ -uECC_VLI_API int uECC_generate_random_int(uECC_word_t *random, - const uECC_word_t *top, - wordcount_t num_words) { - uECC_word_t mask = (uECC_word_t)-1; - uECC_word_t tries; - bitcount_t num_bits = uECC_vli_numBits(top, num_words); - - if (!g_rng_function) { - return 0; - } - - for (tries = 0; tries < uECC_RNG_MAX_TRIES; ++tries) { - if (!g_rng_function((uint8_t *)random, num_words * uECC_WORD_SIZE)) { - return 0; - } - random[num_words - 1] &= mask >> ((bitcount_t)(num_words * uECC_WORD_SIZE * 8 - num_bits)); - if (!uECC_vli_isZero(random, num_words) && - uECC_vli_cmp(top, random, num_words) == 1) { - return 1; - } - } - return 0; -} - int uECC_make_key(uint8_t *public_key, uint8_t *private_key, uECC_Curve curve) { @@ -1115,7 +1129,7 @@ void uECC_decompress(const uint8_t *compressed, uint8_t *public_key, uECC_Curve } #endif /* uECC_SUPPORT_COMPRESSED_POINT */ -int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve) { +uECC_VLI_API int uECC_valid_point(const uECC_word_t *point, uECC_Curve curve) { uECC_word_t tmp1[uECC_MAX_WORDS]; uECC_word_t tmp2[uECC_MAX_WORDS]; wordcount_t num_words = curve->num_words; @@ -1210,7 +1224,7 @@ static void bits2int(uECC_word_t *native, bcopy((uint8_t *) native, bits, bits_size); #else uECC_vli_bytesToNative(native, bits, bits_size); -#endif +#endif if (bits_size * 8 <= (unsigned)curve->num_n_bits) { return; } @@ -1229,7 +1243,7 @@ static void bits2int(uECC_word_t *native, } } -static int uECC_sign_with_k(const uint8_t *private_key, +static int uECC_sign_with_k_internal(const uint8_t *private_key, const uint8_t *message_hash, unsigned hash_size, uECC_word_t *k, @@ -1239,6 +1253,7 @@ static int uECC_sign_with_k(const uint8_t *private_key, uECC_word_t tmp[uECC_MAX_WORDS]; uECC_word_t s[uECC_MAX_WORDS]; uECC_word_t *k2[2] = {tmp, s}; + uECC_word_t *initial_Z = 0; #if uECC_VLI_NATIVE_LITTLE_ENDIAN uECC_word_t *p = (uECC_word_t *)signature; #else @@ -1255,7 +1270,15 @@ static int uECC_sign_with_k(const uint8_t *private_key, } carry = regularize_k(k, tmp, s, curve); - EccPoint_mult(p, curve->G, k2[!carry], 0, num_n_bits + 1, curve); + /* If an RNG function was specified, try to get a random initial Z value to improve + protection against side-channel attacks. */ + if (g_rng_function) { + if (!uECC_generate_random_int(k2[carry], curve->p, num_words)) { + return 0; + } + initial_Z = k2[carry]; + } + EccPoint_mult(p, curve->G, k2[!carry], initial_Z, num_n_bits + 1, curve); if (uECC_vli_isZero(p, num_words)) { return 0; } @@ -1299,10 +1322,22 @@ static int uECC_sign_with_k(const uint8_t *private_key, bcopy((uint8_t *) signature + curve->num_bytes, (uint8_t *) s, curve->num_bytes); #else uECC_vli_nativeToBytes(signature + curve->num_bytes, curve->num_bytes, s); -#endif +#endif return 1; } +/* For testing - sign with an explicitly specified k value */ +int uECC_sign_with_k(const uint8_t *private_key, + const uint8_t *message_hash, + unsigned hash_size, + const uint8_t *k, + uint8_t *signature, + uECC_Curve curve) { + uECC_word_t k2[uECC_MAX_WORDS]; + bits2int(k2, k, BITS_TO_BYTES(curve->num_n_bits), curve); + return uECC_sign_with_k_internal(private_key, message_hash, hash_size, k2, signature, curve); +} + int uECC_sign(const uint8_t *private_key, const uint8_t *message_hash, unsigned hash_size, @@ -1316,7 +1351,7 @@ int uECC_sign(const uint8_t *private_key, return 0; } - if (uECC_sign_with_k(private_key, message_hash, hash_size, k, signature, curve)) { + if (uECC_sign_with_k_internal(private_key, message_hash, hash_size, k, signature, curve)) { return 1; } } @@ -1432,7 +1467,7 @@ int uECC_sign_deterministic(const uint8_t *private_key, mask >> ((bitcount_t)(num_n_words * uECC_WORD_SIZE * 8 - num_n_bits)); } - if (uECC_sign_with_k(private_key, message_hash, hash_size, T, signature, curve)) { + if (uECC_sign_with_k_internal(private_key, message_hash, hash_size, T, signature, curve)) { return 1; } @@ -1472,7 +1507,7 @@ int uECC_verify(const uint8_t *public_key, uECC_word_t *_public = (uECC_word_t *)public_key; #else uECC_word_t _public[uECC_MAX_WORDS * 2]; -#endif +#endif uECC_word_t r[uECC_MAX_WORDS], s[uECC_MAX_WORDS]; wordcount_t num_words = curve->num_words; wordcount_t num_n_words = BITS_TO_WORDS(curve->num_n_bits); diff --git a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h index 43a19d63c..dcbdbfa8b 100644 --- a/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h +++ b/ports/espressif/components/bootloader/subproject/components/micro-ecc/micro-ecc/uECC.h @@ -38,12 +38,12 @@ faster somewhat faster, but increases the code size. */ #endif /* uECC_VLI_NATIVE_LITTLE_ENDIAN - If enabled (defined as nonzero), this will switch to native -little-endian format for *all* arrays passed in and out of the public API. This includes public -and private keys, shared secrets, signatures and message hashes. +little-endian format for *all* arrays passed in and out of the public API. This includes public +and private keys, shared secrets, signatures and message hashes. Using this switch reduces the amount of call stack memory used by uECC, since less intermediate -translations are required. +translations are required. Note that this will *only* work on native little-endian processors and it will treat the uint8_t -arrays passed into the public API as word arrays, therefore requiring the provided byte arrays +arrays passed into the public API as word arrays, therefore requiring the provided byte arrays to be word aligned on architectures that do not support unaligned accesses. IMPORTANT: Keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=1 are incompatible with keys and signatures generated with uECC_VLI_NATIVE_LITTLE_ENDIAN=0; all parties must use @@ -166,7 +166,9 @@ Returns 1 if the key pair was generated successfully, 0 if an error occurred. int uECC_make_key(uint8_t *public_key, uint8_t *private_key, uECC_Curve curve); /* uECC_shared_secret() function. -Compute a shared secret given your secret key and someone else's public key. +Compute a shared secret given your secret key and someone else's public key. If the public key +is not from a trusted source and has not been previously verified, you should verify it first +using uECC_valid_public_key(). Note: It is recommended that you hash the result of uECC_shared_secret() before using it for symmetric encryption or HMAC. diff --git a/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt b/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt index 257dd41b0..159260adb 100644 --- a/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt +++ b/ports/espressif/components/bootloader/subproject/main/CMakeLists.txt @@ -1,14 +1,11 @@ idf_component_register(SRCS "bootloader_start.c" INCLUDE_DIRS "../../../../boards/${BOARD}" - REQUIRES bootloader bootloader_support) + REQUIRES bootloader bootloader_support hal) idf_build_get_property(target IDF_TARGET) set(scripts "ld/${target}/bootloader.ld") -if(NOT CONFIG_IDF_TARGET_ESP32H2) - list(APPEND scripts "ld/${target}/bootloader.rom.ld") -endif() - +list(APPEND scripts "ld/${target}/bootloader.rom.ld") target_linker_script(${COMPONENT_LIB} INTERFACE "${scripts}") target_link_libraries(${COMPONENT_LIB} INTERFACE "-u bootloader_hooks_include") diff --git a/ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h b/ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h index eeaa1b96d..504534f03 100644 --- a/ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h +++ b/ports/espressif/components/bootloader/subproject/main/bootloader_hooks.h @@ -16,7 +16,7 @@ #define BOOTLOADER_HOOKS_H /** - * @file The 2nd stage bootloader can be overriden or completed by an application. + * @file The 2nd stage bootloader can be overridden or completed by an application. * The functions declared here are weak, and thus, are meant to be defined by a user * project, if required. * Please check `custom_bootloader` ESP-IDF examples for more details about this feature. diff --git a/ports/espressif/components/bootloader/subproject/main/bootloader_start.c b/ports/espressif/components/bootloader/subproject/main/bootloader_start.c index 7cdb4148d..d0d77eb2b 100644 --- a/ports/espressif/components/bootloader/subproject/main/bootloader_start.c +++ b/ports/espressif/components/bootloader/subproject/main/bootloader_start.c @@ -1,36 +1,27 @@ -// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include "esp_log.h" +#include "esp_rom_sys.h" #include "bootloader_init.h" #include "bootloader_utility.h" #include "bootloader_common.h" #include "bootloader_hooks.h" -// components/esp_rom -#include "esp_rom_sys.h" +#include "rom/ets_sys.h" +#include "rom/rtc.h" #include "esp_rom_gpio.h" - -#include "soc/cpu.h" -#include "hal/gpio_ll.h" +#include "esp_cpu.h" +#include "hal/gpio_hal.h" // Specific board header specified with -DBOARD= #include "board.h" #ifdef TCA9554_ADDR #include "hal/i2c_types.h" - // Using GPIO expander requires long reset delay (somehow) #define NEOPIXEL_RESET_DELAY ns2cycle(1000*1000) #endif @@ -40,7 +31,6 @@ #define NEOPIXEL_RESET_DELAY ns2cycle(200*1000) #endif - // Reset Reason Hint to enter UF2. Check out esp_reset_reason_t for other Espressif pre-defined values #define APP_REQUEST_UF2_RESET_HINT 0x11F2 @@ -73,8 +63,7 @@ static void board_led_off(void); #define RST_REASON_MASK 0x7FFF #define RST_REASON_SHIFT 16 -uint32_t /*IRAM_ATTR*/ esp_reset_reason_get_hint(void) -{ +uint32_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; uint32_t low = reset_reason_hint & RST_REASON_MASK; @@ -84,8 +73,7 @@ uint32_t /*IRAM_ATTR*/ esp_reset_reason_get_hint(void) return low; } -static void esp_reset_reason_clear_hint(void) -{ +static void esp_reset_reason_clear_hint(void) { REG_WRITE(RTC_RESET_CAUSE_REG, 0); } @@ -147,15 +135,14 @@ static int select_partition_number(bootloader_state_t *bs) * Selects a boot partition. * The conditions for switching to another firmware are checked. */ -static int selected_boot_partition(const bootloader_state_t *bs) -{ +static int selected_boot_partition(const bootloader_state_t *bs) { int boot_index = bootloader_utility_get_selected_boot_partition(bs); if (boot_index == INVALID_INDEX) { return boot_index; // Unrecoverable failure (not due to corrupt ota data or bad partition contents) } - RESET_REASON reset_reason = bootloader_common_get_reset_reason(0); - if (reset_reason != DEEPSLEEP_RESET) { + soc_reset_reason_t reset_reason = esp_rom_get_reset_reason(0); + if (reset_reason != RESET_REASON_CORE_DEEP_SLEEP) { // Factory firmware. #ifdef CONFIG_BOOTLOADER_FACTORY_RESET bool reset_level = false; @@ -173,12 +160,19 @@ static int selected_boot_partition(const bootloader_state_t *bs) if (bootloader_common_erase_part_type_data(list_erase, ota_data_erase) == false) { ESP_LOGE(TAG, "Not all partitions were erased"); } +#ifdef CONFIG_BOOTLOADER_RESERVE_RTC_MEM + bootloader_common_set_rtc_retain_mem_factory_reset_state(); +#endif return bootloader_utility_get_selected_boot_partition(bs); } -#endif +#endif // CONFIG_BOOTLOADER_FACTORY_RESET // TEST firmware. #ifdef CONFIG_BOOTLOADER_APP_TEST - if (bootloader_common_check_long_hold_gpio(CONFIG_BOOTLOADER_NUM_PIN_APP_TEST, CONFIG_BOOTLOADER_HOLD_TIME_GPIO) == 1) { + bool app_test_level = false; +#if CONFIG_BOOTLOADER_APP_TEST_PIN_HIGH + app_test_level = true; +#endif + if (bootloader_common_check_long_hold_gpio_level(CONFIG_BOOTLOADER_NUM_PIN_APP_TEST, CONFIG_BOOTLOADER_HOLD_TIME_GPIO, app_test_level) == GPIO_LONG_HOLD) { ESP_LOGI(TAG, "Detect a boot condition of the test firmware"); if (bs->test.offset != 0) { boot_index = TEST_APP_INDEX; @@ -188,17 +182,14 @@ static int selected_boot_partition(const bootloader_state_t *bs) return INVALID_INDEX; } } -#endif +#endif // CONFIG_BOOTLOADER_APP_TEST // UF2: check if Application want to load uf2 "bootloader" with reset reason hint. - if ( boot_index != FACTORY_INDEX ) - { + if ( boot_index != FACTORY_INDEX ) { // Application request to enter UF2 with Software Reset with reason hint - if ( reset_reason == RTC_SW_SYS_RESET || reset_reason == RTC_SW_CPU_RESET ) - { + if ( reset_reason == RESET_REASON_CORE_SW || reset_reason == RESET_REASON_CPU0_SW ) { uint32_t const reset_hint = (uint32_t) esp_reset_reason_get_hint(); - if ( APP_REQUEST_UF2_RESET_HINT == reset_hint ) - { + if ( APP_REQUEST_UF2_RESET_HINT == reset_hint ) { esp_reset_reason_clear_hint(); // clear the hint ESP_LOGI(TAG, "Detect application request to enter UF2 bootloader"); boot_index = FACTORY_INDEX; @@ -208,46 +199,38 @@ static int selected_boot_partition(const bootloader_state_t *bs) // UF2: check if GPIO0 is pressed and/or 1-bit RC on specific GPIO detect double reset // during this time. If yes then to load uf2 "bootloader". - if ( boot_index != FACTORY_INDEX ) - { + if ( boot_index != FACTORY_INDEX ) { board_led_on(); #ifdef PIN_DOUBLE_RESET_RC // Double reset detect if board implements 1-bit memory with RC components esp_rom_gpio_pad_select_gpio(PIN_DOUBLE_RESET_RC); PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[PIN_DOUBLE_RESET_RC]); - if ( gpio_ll_get_level(&GPIO, PIN_DOUBLE_RESET_RC) == 1 ) - { + if ( gpio_ll_get_level(&GPIO, PIN_DOUBLE_RESET_RC) == 1 ) { ESP_LOGI(TAG, "Detect double reset using RC on GPIO %d to enter UF2 bootloader", PIN_DOUBLE_RESET_RC); boot_index = FACTORY_INDEX; } - else - { + else { gpio_ll_output_enable(&GPIO, PIN_DOUBLE_RESET_RC); gpio_ll_set_level(&GPIO, PIN_DOUBLE_RESET_RC, 1); } #endif - - if ( boot_index != FACTORY_INDEX ) - { + if ( boot_index != FACTORY_INDEX ) { esp_rom_gpio_pad_select_gpio(PIN_BUTTON_UF2); PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[PIN_BUTTON_UF2]); esp_rom_gpio_pad_pullup_only(PIN_BUTTON_UF2); - + // run the GPIO detection at least once even if UF2_DETECTION_DELAY_MS is set to zero uint32_t tm_start = esp_log_early_timestamp(); - do - { - if ( gpio_ll_get_level(&GPIO, PIN_BUTTON_UF2) == 0 ) - { + do { + if ( gpio_ll_get_level(&GPIO, PIN_BUTTON_UF2) == 0 ) { ESP_LOGI(TAG, "Detect GPIO %d active to enter UF2 bootloader", PIN_BUTTON_UF2); // Simply return factory index without erasing any other partition boot_index = FACTORY_INDEX; break; } - } - while (UF2_DETECTION_DELAY_MS > (esp_log_early_timestamp() - tm_start) ); + } while (UF2_DETECTION_DELAY_MS > (esp_log_early_timestamp() - tm_start) ); } #if PIN_DOUBLE_RESET_RC @@ -276,8 +259,7 @@ struct _reent *__getreent(void) // Board LED Indicator //--------------------------------------------------------------------+ -static inline uint32_t ns2cycle(uint32_t ns) -{ +static inline uint32_t ns2cycle(uint32_t ns) { uint32_t tick_per_us; #if CONFIG_IDF_TARGET_ESP32S3 @@ -290,11 +272,10 @@ static inline uint32_t ns2cycle(uint32_t ns) return (tick_per_us*ns) / 1000; } -static inline uint32_t delay_cycle(uint32_t cycle) -{ +static inline uint32_t delay_cycle(uint32_t cycle) { uint32_t ccount; - uint32_t start = esp_cpu_get_ccount(); - while( (ccount = esp_cpu_get_ccount()) - start < cycle ) {} + uint32_t start = esp_cpu_get_cycle_count(); + while( (ccount = esp_cpu_get_cycle_count()) - start < cycle ) {} return ccount; } @@ -305,27 +286,24 @@ static inline uint32_t delay_cycle(uint32_t cycle) #define HIGH 0x01 #define ACK 0x00 #define NACK 0x01 -#define CLOCK_STRETCH_TIMEOUT 1000 +#define CLOCK_STRETCH_TIMEOUT 1000 #endif #ifdef NEOPIXEL_PIN -static inline uint8_t color_brightness(uint8_t color, uint8_t brightness) -{ +static inline uint8_t color_brightness(uint8_t color, uint8_t brightness) { return (uint8_t) ((color*brightness) >> 8); } -static void board_neopixel_set(uint32_t num_pin, uint8_t const rgb[]) -{ +static void board_neopixel_set(uint32_t num_pin, uint8_t const rgb[]) { // WS2812B should be uint32_t const time0 = ns2cycle(400); uint32_t const time1 = ns2cycle(800); uint32_t const period = ns2cycle(1250); - + uint8_t pixels[3*NEOPIXEL_NUMBER]; - for(uint32_t i=0; i 0; mask >>= 1) { uint32_t ccount; - while( (ccount = esp_cpu_get_ccount()) - cyc < period ) {} + while( (ccount = esp_cpu_get_cycle_count()) - cyc < period ) {} // gpio_ll_set_level() only take 6 cycles, while GPIO_OUTPUT_SET() take 40 cycles to set/clear gpio_ll_set_level(&GPIO, num_pin, 1); cyc = ccount; uint32_t const t_hi = (pix & mask) ? time1 : time0; - while( (ccount = esp_cpu_get_ccount()) - cyc < t_hi ) {} + while( (ccount = esp_cpu_get_cycle_count()) - cyc < t_hi ) {} gpio_ll_set_level(&GPIO, num_pin, 0); } } - while(esp_cpu_get_ccount() - cyc < period) {} + while(esp_cpu_get_cycle_count() - cyc < period) {} } #endif #ifdef DOTSTAR_PIN_DATA //Bit bang out 8 bits -static void SPI_write(int32_t pin_data,uint32_t pin_sck,uint8_t c) -{ +static void SPI_write(int32_t pin_data,uint32_t pin_sck,uint8_t c) { uint8_t i; - for (i=0; i<8 ;i++) - { + for (i=0; i<8 ;i++) { if (!(c&0x80)) { gpio_ll_set_level(&GPIO, pin_data, 0); } @@ -377,8 +353,7 @@ static void SPI_write(int32_t pin_data,uint32_t pin_sck,uint8_t c) } } -static void board_dotstar_set(uint32_t pin_data, uint32_t pin_sck, uint8_t const rgb[]) -{ +static void board_dotstar_set(uint32_t pin_data, uint32_t pin_sck, uint8_t const rgb[]) { // convert from 0-255 (8 bit) to 0-31 (5 bit) uint8_t const ds_brightness = (DOTSTAR_BRIGHTNESS * 32) / 256; @@ -388,8 +363,7 @@ static void board_dotstar_set(uint32_t pin_data, uint32_t pin_sck, uint8_t const SPI_write(pin_data, pin_sck, 0x00); SPI_write(pin_data, pin_sck, 0x00); - for(uint32_t i=0; i>=1) - { - if (mask & b) - { + for (uint8_t mask=0x80; mask!=0; mask>>=1) { + if (mask & b) { gpio_ll_set_level(&GPIO, I2C_MASTER_SDA_IO, HIGH); } - else - { + else { gpio_ll_set_level(&GPIO, I2C_MASTER_SDA_IO, LOW); } delay_cycle( ns2cycle(I2C_WAIT/2*1000) ) ; @@ -441,8 +410,7 @@ uint8_t sw_i2c_write_byte(uint8_t b) } // I2C Start and Address -void sw_i2c_begin(uint8_t address) -{ +void sw_i2c_begin(uint8_t address) { // Start signal gpio_ll_set_level(&GPIO, I2C_MASTER_SDA_IO, LOW); delay_cycle( ns2cycle(I2C_WAIT*1000) ) ; @@ -452,18 +420,16 @@ void sw_i2c_begin(uint8_t address) sw_i2c_write_byte(address); } -void sw_i2c_end() -{ +void sw_i2c_end() { gpio_ll_set_level(&GPIO, I2C_MASTER_SDA_IO, LOW); - delay_cycle( ns2cycle(I2C_WAIT*1000) ) ; + delay_cycle( ns2cycle(I2C_WAIT*1000) ) ; gpio_ll_set_level(&GPIO, I2C_MASTER_SCL_IO, HIGH); - delay_cycle( ns2cycle(I2C_WAIT*1000) ) ; + delay_cycle( ns2cycle(I2C_WAIT*1000) ) ; gpio_ll_set_level(&GPIO, I2C_MASTER_SDA_IO, HIGH); } // Initialize I2C pins -void sw_i2c_init() -{ +void sw_i2c_init() { esp_rom_gpio_pad_select_gpio(I2C_MASTER_SDA_IO); gpio_ll_input_enable(&GPIO, I2C_MASTER_SDA_IO); gpio_ll_output_enable(&GPIO, I2C_MASTER_SDA_IO); @@ -477,15 +443,14 @@ void sw_i2c_init() gpio_ll_input_disable(&GPIO, I2C_MASTER_SCL_IO); gpio_ll_output_enable(&GPIO, I2C_MASTER_SCL_IO); gpio_ll_od_enable(&GPIO, I2C_MASTER_SCL_IO); - gpio_ll_pullup_en(&GPIO, I2C_MASTER_SCL_IO); + gpio_ll_pullup_en(&GPIO, I2C_MASTER_SCL_IO); gpio_ll_pulldown_dis(&GPIO, I2C_MASTER_SCL_IO); - gpio_ll_intr_disable(&GPIO, I2C_MASTER_SCL_IO); + gpio_ll_intr_disable(&GPIO, I2C_MASTER_SCL_IO); gpio_ll_set_level(&GPIO, I2C_MASTER_SCL_IO, HIGH); } -//Turn on Peripheral power. -void init_tca9554() -{ +//Turn on Peripheral power. +void init_tca9554() { sw_i2c_begin(TCA9554_ADDR << 1); sw_i2c_write_byte(TCA9554_CONFIGURATION_REG); sw_i2c_write_byte(TCA9554_DEFAULT_CONFIG); @@ -500,18 +465,15 @@ void init_tca9554() } #endif -static void board_led_on(void) -{ - +static void board_led_on(void) { #ifdef NEOPIXEL_PIN - #ifdef TCA9554_ADDR sw_i2c_init(); - // For some reason this delay is required after the pins are initialized before being used. + // For some reason this delay is required after the pins are initialized before being used. delay_cycle( ns2cycle(30000*1000) ); init_tca9554(); #endif - + #ifdef NEOPIXEL_POWER_PIN esp_rom_gpio_pad_select_gpio(NEOPIXEL_POWER_PIN); gpio_ll_input_disable(&GPIO, NEOPIXEL_POWER_PIN); @@ -560,8 +522,7 @@ static void board_led_on(void) #endif } -static void board_led_off(void) -{ +static void board_led_off(void) { #ifdef NEOPIXEL_PIN board_neopixel_set(NEOPIXEL_PIN, RGB_OFF); diff --git a/ports/espressif/components/bootloader/subproject/main/component.mk b/ports/espressif/components/bootloader/subproject/main/component.mk deleted file mode 100644 index c41e8b709..000000000 --- a/ports/espressif/components/bootloader/subproject/main/component.mk +++ /dev/null @@ -1,27 +0,0 @@ -# -# Main bootloader Makefile. -# -# This is basically the same as a component makefile, but in the case of the bootloader -# we pull in bootloader-specific linker arguments. -# - -LINKER_SCRIPTS := \ - $(COMPONENT_PATH)/ld/$(IDF_TARGET)/bootloader.ld \ - $(COMPONENT_PATH)/ld/$(IDF_TARGET)/bootloader.rom.ld \ - $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.ld \ - $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.newlib-funcs.ld \ - $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.api.ld - -# SPI driver patch for ROM is only needed in ESP32 -ifdef CONFIG_IDF_TARGET_ESP32 - ifndef CONFIG_SPI_FLASH_ROM_DRIVER_PATCH - LINKER_SCRIPTS += $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.spiflash.ld - endif - ifdef CONFIG_ESP32_REV_MIN_3 - LINKER_SCRIPTS += $(IDF_PATH)/components/esp_rom/$(IDF_TARGET)/ld/$(IDF_TARGET).rom.eco3.ld - endif -endif - -COMPONENT_ADD_LDFLAGS += -L $(COMPONENT_PATH) $(addprefix -T ,$(LINKER_SCRIPTS)) - -COMPONENT_ADD_LINKER_DEPS := $(LINKER_SCRIPTS) diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld index 30e5a79c4..6516fc3c2 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.ld @@ -1,3 +1,8 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /* Linker file used to link the bootloader. */ @@ -20,7 +25,7 @@ MEMORY */ iram_seg (RWX) : org = 0x40080400, len = 0xfc00 /* 64k at the end of DRAM, after ROM bootloader stack */ - dram_seg (RW) : org = 0x3FFF0000, len = 0x10000 + dram_seg (RW) : org = 0x3FFF0000, len = 0x6000 } /* Default entry point: */ @@ -44,7 +49,7 @@ SECTIONS *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) - *libbootloader_support.a:bootloader_efuse_esp32.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) @@ -60,9 +65,12 @@ SECTIONS *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) *libspi_flash.a:*.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libefuse.a:*.*(.literal .text .literal.* .text.*) + *libesp_rom.a:*.*(.literal .text .literal.* .text.*) *(.fini.literal) *(.fini) *(.gnu.version) @@ -111,8 +119,6 @@ SECTIONS *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) _data_end = ABSOLUTE(.); @@ -125,6 +131,7 @@ SECTIONS *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) + *(.sdata2 .sdata2.*) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table) @@ -183,4 +190,23 @@ SECTIONS _etext = .; } > iram_seg + /** This section will be used by the debugger and disassembler to get more information + * about raw data present in the code. + * Indeed, it may be required to add some padding at some points in the code + * in order to align a branch/jump destination on a particular bound. + * Padding these instructions will generate null bytes that shall be + * interpreted as data, and not code by the debugger or disassembler. + * This section will only be present in the ELF file, not in the final binary + * For more details, check GCC-212 + */ + .xt.prop 0 : + { + KEEP (*(.xt.prop .gnu.linkonce.prop.*)) + } + + .xt.lit 0 : + { + KEEP (*(.xt.lit .gnu.linkonce.p.*)) + } + } diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld index c9639540a..e69de29bb 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld @@ -1,9 +0,0 @@ -PROVIDE ( ets_update_cpu_frequency = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */ -PROVIDE ( MD5Final = 0x4005db1c ); -PROVIDE ( MD5Init = 0x4005da7c ); -PROVIDE ( MD5Update = 0x4005da9c ); - -/* bootloader will use following functions from xtensa hal library */ -xthal_get_ccount = 0x4000c050; -xthal_get_ccompare = 0x4000c078; -xthal_set_ccompare = 0x4000c058; diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld index c9b2da761..68e3a1c38 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld @@ -1,16 +1,55 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /** Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. - * We put 2nd bootloader in the high address space (before ROM stack/data/bss). - * See memory usage for ROM bootloader at the end of this file. + * + * ESP32-C3 ROM static data usage is as follows: + * - 0x3fccae00 - 0x3fcdc710: Shared buffers, used in UART/USB/SPI download mode only + * - 0x3fcdc710 - 0x3fcde710: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x3fcde710 - 0x3fce0000: ROM .bss and .data (not easily reclaimable) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x3fcdc710). */ +/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */ +iram_dram_offset = 0x700000; + +/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. + */ + +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x3fcdc710; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0x5000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x2000; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset; +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; + MEMORY { - iram_seg (RWX) : org = 0x403CE000, len = 0x2000 - iram_loader_seg (RWX) : org = 0x403D0000, len = 0x6000 - dram_seg (RW) : org = 0x3FCD6000, len = 0x4000 + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len } +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update (SRAM_DRAM_END + I_D_SRAM_OFFSET) in components/esp_system/ld/esp32c3/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x403ce710, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); + /* Default entry point: */ ENTRY(call_start_cpu0); @@ -22,7 +61,7 @@ SECTIONS . = ALIGN (16); _loader_text_start = ABSOLUTE(.); *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ *liblog.a:(.literal .text .literal.* .text.*) *libgcc.a:(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) @@ -31,7 +70,7 @@ SECTIONS *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libbootloader_support.a:bootloader_efuse_esp32c3.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) @@ -47,6 +86,9 @@ SECTIONS *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) *libspi_flash.a:*.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) @@ -99,8 +141,6 @@ SECTIONS *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) _data_end = ABSOLUTE(.); @@ -113,6 +153,7 @@ SECTIONS *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) + *(.sdata2 .sdata2.* .srodata .srodata.*) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table) @@ -177,17 +218,34 @@ SECTIONS /** * Appendix: Memory Usage of ROM bootloader * - * +--------+--------------+------+ 0x3FCC_AE00 - * | ^ | - * | | | - * | | data/bss | - * | | | - * | v | - * +------------------------------+ 0x3FCD_C710 - * | ^ | - * | | | - * | | stack | - * | | | - * | v | - * +------------------------------+ 0x3FCD_E710 + * 0x3fccae00 ------------------> _dram0_0_start + * | | + * | | + * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h + * | | + * | | + * 0x3fcdc710 ------------------> __stack_sentry + * | | + * | | 2. Startup pro cpu stack (freed when IDF app is running) + * | | + * 0x3fcde710 ------------------> __stack (pro cpu) + * | | + * | | + * | | 3. Shared memory only used in startup code or nonos/early boot* + * | | (can be freed when IDF runs) + * | | + * | | + * 0x3fcdf060 ------------------> _dram0_rtos_reserved_start + * | | + * | | + * | | 4. Shared memory used in startup code and when IDF runs + * | | + * | | + * 0x3fcdf664 ------------------> _dram0_rtos_reserved_end + * | | + * 0x3fcdf830 ------------------> _data_start_interface + * | | + * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible) + * | | + * 0x3fce0000 ------------------> _data_end_interface */ diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld index c5648b815..b40c4ed46 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32h2/bootloader.ld @@ -1,16 +1,53 @@ +/* + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /** Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. - * We put 2nd bootloader in the high address space (before ROM stack/data/bss). - * See memory usage for ROM bootloader at the end of this file. + * + * ESP32-H2 ROM static data usage is as follows: + * - 0x4083ba78 - 0x4084d380: Shared buffers, used in UART/USB/SPI download mode only + * - 0x4084d380 - 0x4084f380: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x4084f380 - 0x4084fee0: ROM .bss and .data used in startup code or nonos/early boot (can be freed when IDF runs) + * - 0x4084fee0 - 0x40850000: ROM .bss and .data used in startup code and when IDF runs (cannot be freed) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x4084d380). + */ + +/* We consider 0x3fcdc710 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. */ +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x4084cfd0; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0x5000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x2000; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len; +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; + MEMORY { - iram_seg (RWX) : org = 0x403CE000, len = 0x2000 - iram_loader_seg (RWX) : org = 0x403D0000, len = 0x6000 - dram_seg (RW) : org = 0x3FCD6000, len = 0x4000 + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len } +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32h2/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x4083EFD0, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END"); + /* Default entry point: */ ENTRY(call_start_cpu0); @@ -22,7 +59,7 @@ SECTIONS . = ALIGN (16); _loader_text_start = ABSOLUTE(.); *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ + *(.iram1 .iram1.*) /* catch stray IRAM_ATTR */ *liblog.a:(.literal .text .literal.* .text.*) *libgcc.a:(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_clock_loader.*(.literal .text .literal.* .text.*) @@ -31,7 +68,7 @@ SECTIONS *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) - *libbootloader_support.a:bootloader_efuse_esp32h2.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) @@ -39,12 +76,17 @@ SECTIONS *libbootloader_support.a:bootloader_soc.*(.literal .text .literal.* .text.*) *libbootloader_support.a:esp_image_format.*(.literal .text .literal.* .text.*) *libbootloader_support.a:flash_encrypt.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:flash_encryption_secure_features.*(.literal .text .literal.* .text.*) *libbootloader_support.a:flash_partitions.*(.literal .text .literal.* .text.*) *libbootloader_support.a:secure_boot.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:secure_boot_secure_features.*(.literal .text .literal.* .text.*) *libbootloader_support.a:secure_boot_signatures_bootloader.*(.literal .text .literal.* .text.*) *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) *libspi_flash.a:*.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) @@ -97,8 +139,6 @@ SECTIONS *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) _data_end = ABSOLUTE(.); @@ -111,6 +151,7 @@ SECTIONS *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) + *(.sdata2 .sdata2.* .srodata .srodata.*) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table) @@ -174,17 +215,34 @@ SECTIONS /** * Appendix: Memory Usage of ROM bootloader * - * +--------+--------------+------+ 0x3FCC_B900 - * | ^ | - * | | | - * | | data/bss | - * | | | - * | v | - * +------------------------------+ 0x3FCD_D210 - * | ^ | - * | | | - * | | stack | - * | | | - * | v | - * +------------------------------+ 0x3FCD_F210 + * 0x4083ba78 ------------------> _dram0_0_start + * | | + * | | + * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h + * | | + * | | + * 0x4084d380 ------------------> __stack_sentry + * | | + * | | 2. Startup pro cpu stack (freed when IDF app is running) + * | | + * 0x4084f380 ------------------> __stack (pro cpu) + * | | + * | | + * | | 3. Shared memory only used in startup code or nonos/early boot* + * | | (can be freed when IDF runs) + * | | + * | | + * 0x4084fee0 ------------------> _dram0_rtos_reserved_start + * | | + * | | + * | | 4. Shared memory used in startup code and when IDF runs + * | | + * | | + * 0x4084ffc0 ------------------> _dram0_rtos_reserved_end + * | | + * 0x4084ffc8 ------------------> _data_start_interface + * | | + * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible) + * | | + * 0x40850000 ------------------> _data_end_interface */ diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld index 92e0126cf..e3e8edab1 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld @@ -1,3 +1,8 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /* Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. */ @@ -5,8 +10,8 @@ MEMORY { - iram_seg (RWX) : org = 0x4004c000, len = 0x4000 /* SRAM Block 13 */ - iram_loader_seg (RWX) : org = 0x40050000, len = 0x6000 /* SRAM Block 14 & part of 15 */ + iram_seg (RWX) : org = 0x4004B000, len = 0x4000 /* SRAM part of block 12 and 13 */ + iram_loader_seg (RWX) : org = 0x4004F000, len = 0x7000 /* SRAM part of block 13, Block 14 & part of 15 */ dram_seg (RW) : org = 0x3FFE6000, len = 0x4B00 /* Part SRAM Blocks 15 & 16, ROM static buffer starts at end of this region (reclaimed after app runs) */ } @@ -31,7 +36,7 @@ SECTIONS *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) - *libbootloader_support.a:bootloader_efuse_esp32s2.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) @@ -47,10 +52,14 @@ SECTIONS *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) *libspi_flash.a:*.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) *libefuse.a:*.*(.literal .text .literal.* .text.*) + *libesp_rom.a:esp_rom_regi2c.*(.literal .text .literal.* .text.*) *(.fini.literal) *(.fini) *(.gnu.version) @@ -99,8 +108,6 @@ SECTIONS *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) _data_end = ABSOLUTE(.); @@ -113,6 +120,7 @@ SECTIONS *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) + *(.sdata2 .sdata2.*) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table) @@ -171,4 +179,23 @@ SECTIONS _etext = .; } > iram_seg + /** This section will be used by the debugger and disassembler to get more information + * about raw data present in the code. + * Indeed, it may be required to add some padding at some points in the code + * in order to align a branch/jump destination on a particular bound. + * Padding these instructions will generate null bytes that shall be + * interpreted as data, and not code by the debugger or disassembler. + * This section will only be present in the ELF file, not in the final binary + * For more details, check GCC-212 + */ + .xt.prop 0 : + { + KEEP (*(.xt.prop .gnu.linkonce.prop.*)) + } + + .xt.lit 0 : + { + KEEP (*(.xt.lit .gnu.linkonce.p.*)) + } + } diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld index 0a600f8dc..e69de29bb 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32s2/bootloader.rom.ld @@ -1,13 +0,0 @@ -/* - * ESP32S2 ROM address table - * Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796 -*/ -PROVIDE (ets_update_cpu_frequency = 0x4000d8a4); - -PROVIDE (MD5Final = 0x4000530c); -PROVIDE (MD5Init = 0x4000526c); -PROVIDE (MD5Update = 0x4000528c); -/* bootloader will use following functions from xtensa hal library */ -xthal_get_ccount = 0x4001aa90; -xthal_get_ccompare = 0x4001aabc; -xthal_set_ccompare = 0x4001aa98; diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld index 244482f82..9f6e17b2b 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld @@ -1,16 +1,56 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ /** Simplified memory map for the bootloader. * Make sure the bootloader can load into main memory without overwriting itself. - * We put 2nd bootloader in the high address space (before ROM stack/data/bss). - * See memory usage for ROM bootloader at the end of this file. + * + * ESP32-S3 ROM static data usage is as follows: + * - 0x3fcd7e00 - 0x3fce9704: Shared buffers, used in UART/USB/SPI download mode only + * - 0x3fce9710 - 0x3fceb710: PRO CPU stack, can be reclaimed as heap after RTOS startup + * - 0x3fceb710 - 0x3fced710: APP CPU stack, can be reclaimed as heap after RTOS startup + * - 0x3fced710 - 0x3fcf0000: ROM .bss and .data (not easily reclaimable) + * + * The 2nd stage bootloader can take space up to the end of ROM shared + * buffers area (0x3fce9704). For alignment purpose we shall use value (0x3fce9700). */ +/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */ +iram_dram_offset = 0x6f0000; + +/* We consider 0x3fce9700 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, + * and work out iram_seg and iram_loader_seg addresses from there, backwards. + */ + +/* These lengths can be adjusted, if necessary: */ +bootloader_usable_dram_end = 0x3fce9700; +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ +bootloader_dram_seg_len = 0x4000; +bootloader_iram_loader_seg_len = 0x7000; +bootloader_iram_seg_len = 0x3000; + +/* Start of the lower region is determined by region size and the end of the higher region */ +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset; +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; + MEMORY { - iram_seg (RWX) : org = 0x403B6000, len = 0x4000 - iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000 - dram_seg (RW) : org = 0x3FCD0000, len = 0x4000 + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len } +/* The app may use RAM for static allocations up to the start of iram_loader_seg. + * If you have changed something above and this assert fails: + * 1. Check what the new value of bootloader_iram_loader_seg start is. + * 2. Update the value in this assert. + * 3. Update SRAM_IRAM_END in components/esp_system/ld/esp32s3/memory.ld.in to the same value. + */ +ASSERT(bootloader_iram_loader_seg_start == 0x403cc700, "bootloader_iram_loader_seg_start inconsistent with SRAM_IRAM_END"); + /* Default entry point: */ ENTRY(call_start_cpu0); @@ -30,9 +70,8 @@ SECTIONS *libbootloader_support.a:bootloader_flash.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_disable .text.bootloader_random_disable) - *libbootloader_support.a:bootloader_random*.*(.literal.bootloader_random_enable .text.bootloader_random_enable) *libesp_common.a:fpga_overrides.*(.literal.bootloader_fill_random .text.bootloader_fill_random) - *libbootloader_support.a:bootloader_efuse_esp32s3.*(.literal .text .literal.* .text.*) + *libbootloader_support.a:bootloader_efuse.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_utility.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_sha.*(.literal .text .literal.* .text.*) *libbootloader_support.a:bootloader_console_loader.*(.literal .text .literal.* .text.*) @@ -48,6 +87,9 @@ SECTIONS *libmicro-ecc.a:*.*(.literal .text .literal.* .text.*) *libspi_flash.a:*.*(.literal .text .literal.* .text.*) *libhal.a:wdt_hal_iram.*(.literal .text .literal.* .text.*) + *libhal.a:mmu_hal.*(.literal .text .literal.* .text.*) + *libhal.a:cache_hal.*(.literal .text .literal.* .text.*) + *libhal.a:efuse_hal.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_clk.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) @@ -100,8 +142,6 @@ SECTIONS *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) - *(.sdata2) - *(.sdata2.*) *(.gnu.linkonce.s2.*) *(.jcr) _data_end = ABSOLUTE(.); @@ -114,6 +154,7 @@ SECTIONS *(.rodata.*) *(.gnu.linkonce.r.*) *(.rodata1) + *(.sdata2 .sdata2.*) __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); *(.xt_except_table) *(.gcc_except_table) @@ -172,29 +213,62 @@ SECTIONS _etext = .; } > iram_seg -} + /** This section will be used by the debugger and disassembler to get more information + * about raw data present in the code. + * Indeed, it may be required to add some padding at some points in the code + * in order to align a branch/jump destination on a particular bound. + * Padding these instructions will generate null bytes that shall be + * interpreted as data, and not code by the debugger or disassembler. + * This section will only be present in the ELF file, not in the final binary + * For more details, check GCC-212 + */ + .xt.prop 0 : + { + KEEP (*(.xt.prop .gnu.linkonce.prop.*)) + } + + .xt.lit 0 : + { + KEEP (*(.xt.lit .gnu.linkonce.p.*)) + } +} /** * Appendix: Memory Usage of ROM bootloader * - * +--------+--------------+------+ 0x3FCD_8000 - * | ^ | - * | | | - * | | data/bss | - * | | | - * | v | - * +------------------------------+ 0x3FCE_9910 - * | ^ | - * | | | - * | | stack (pro) | - * | | | - * | v | - * +------------------------------+ 0x3FCE_B910 - * | ^ | - * | | | - * | | stack (app) | - * | | | - * | v | - * +--------+--------------+------+ 0x3FCE_D910 + * 0x3fcd7e00 ------------------> _dram0_0_start + * | | + * | | + * | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h + * | | + * | | + * 0x3fce9710 ------------------> __stack_sentry + * | | + * | | 2. Startup pro cpu stack (freed when IDF app is running) + * | | + * 0x3fceb710 ------------------> __stack (pro cpu) + * | | + * | | Startup app cpu stack + * | | + * 0x3fced710 ------------------> __stack_app (app cpu) + * | | + * | | + * | | 3. Shared memory only used in startup code or nonos/early boot* + * | | (can be freed when IDF runs) + * | | + * | | + * 0x3fceee34 ------------------> _dram0_rtos_reserved_start + * | | + * | | + * | | 4. Shared memory used in startup code and when IDF runs + * | | + * | | + * 0x3fcef770 ------------------> _dram0_rtos_reserved_end + * | | + * 0x3fcef81c ------------------> _data_start_interface + * | | + * | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible) + * | | + * 0x3fcf0000 ------------------> _data_end_interface */ diff --git a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld index 7a21fa746..e69de29bb 100644 --- a/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld +++ b/ports/espressif/components/bootloader/subproject/main/ld/esp32s3/bootloader.rom.ld @@ -1,6 +0,0 @@ -/** - * ESP32S3 ROM address table - * Generated for ROM with MD5sum: d20fb231463ce337432b1fa9cba0b3c9 - */ - -PROVIDE ( ets_update_cpu_frequency = 0x40043164 ); diff --git a/ports/espressif/components/lcd/include/lcd.h b/ports/espressif/components/lcd/include/lcd.h index cce8edce0..057d9f8e2 100644 --- a/ports/espressif/components/lcd/include/lcd.h +++ b/ports/espressif/components/lcd/include/lcd.h @@ -45,7 +45,7 @@ typedef enum { /** * @brief This function is called (in irq context!) just before a transmission starts. It will - * set the D/C line to the value indicated in the user field. + * set the D/C line to the value indicated in the user field. * * @param t The parameters required for this callback function. */ diff --git a/ports/espressif/components/lcd/lcd.c b/ports/espressif/components/lcd/lcd.c index bb99da7da..aea2141c3 100644 --- a/ports/espressif/components/lcd/lcd.c +++ b/ports/espressif/components/lcd/lcd.c @@ -95,7 +95,7 @@ DRAM_ATTR static const lcd_init_cmd_t st_init_cmds[] = { }; DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[] = { - /* Power contorl B, power control = 0, DC_ENA = 1 */ + /* Power control B, power control = 0, DC_ENA = 1 */ {0xCF, {0x00, 0x83, 0X30}, 3}, /* Power on sequence control, * cp1 keeps 1 frame, 1st frame enable @@ -160,27 +160,27 @@ DRAM_ATTR static const lcd_init_cmd_t gc_init_cmds[] = { // {0xfe, {0}, 0x80}, // {0xef, {0}, 0x80}, /* Interface Pixel Format, 16bits/pixel for RGB/MCU interface */ - {0xB0, {0xC0},1}, - {0xB2, {0x2F},1}, - {0xB3, {0x03},1}, - {0xB6, {0x19},1}, - {0xB7, {0x01},1}, - {0xAC, {0xCB},1}, - {0xAB, {0x0e},1}, - {0xB4, {0x04},1}, - {0xA8, {0x19},1}, - {0x3A, {0x05},1}, + {0xB0, {0xC0}, 1}, + {0xB2, {0x2F}, 1}, + {0xB3, {0x03}, 1}, + {0xB6, {0x19}, 1}, + {0xB7, {0x01}, 1}, + {0xAC, {0xCB}, 1}, + {0xAB, {0x0e}, 1}, + {0xB4, {0x04}, 1}, + {0xA8, {0x19}, 1}, + {0x3A, {0x05}, 1}, // Memory Data Access Control {0x36, {DISPLAY_MADCTL}, 1}, // Vertical Scroll Start Address of RAM // {0x37, {DISPLAY_VSCSAD >> 8, DISPLAY_VSCSAD & 0x00FF}, 2}, - {0xb8, {0x08},1}, - {0xE8, {0x24},1}, - {0xE9, {0x48},1}, - {0xea, {0x22},1}, - {0xC6, {0x30},1}, - {0xC7, {0x18},1}, + {0xb8, {0x08}, 1}, + {0xE8, {0x24}, 1}, + {0xE9, {0x48}, 1}, + {0xea, {0x22}, 1}, + {0xC6, {0x30}, 1}, + {0xC7, {0x18}, 1}, /* Positive Voltage Gamma Control */ {0xF0, {0x1F, 0x28, 0x04, 0x3E, 0x2A, 0x2E, 0x20, 0x00, 0x0C, 0x06, 0x00, 0x1C, 0x1F, 0x0F}, 14}, /* Negative Voltage Gamma Control */ @@ -301,9 +301,9 @@ esp_err_t lcd_init(spi_device_handle_t spi) /*!< Reset the display */ #if defined(DISPLAY_PIN_RST) && DISPLAY_PIN_RST != -1 gpio_set_level(DISPLAY_PIN_RST, 0); - vTaskDelay(100 / portTICK_RATE_MS); + vTaskDelay(100 / portTICK_PERIOD_MS); gpio_set_level(DISPLAY_PIN_RST, 1); - vTaskDelay(100 / portTICK_RATE_MS); + vTaskDelay(100 / portTICK_PERIOD_MS); #endif int lcd_type; @@ -346,7 +346,7 @@ esp_err_t lcd_init(spi_device_handle_t spi) lcd_init_cmds = st_init_cmds; } else if(lcd_type == LCD_TYPE_GC) { ESP_LOGI(TAG, "GC9107 initialization."); - lcd_init_cmds = gc_init_cmds; + lcd_init_cmds = gc_init_cmds; } else { ESP_LOGI(TAG, "ILI9341 initialization."); lcd_init_cmds = ili_init_cmds; @@ -358,7 +358,7 @@ esp_err_t lcd_init(spi_device_handle_t spi) lcd_data(spi, lcd_init_cmds[cmd].data, lcd_init_cmds[cmd].databytes & 0x1F); if (lcd_init_cmds[cmd].databytes & 0x80) { - vTaskDelay(100 / portTICK_RATE_MS); + vTaskDelay(100 / portTICK_PERIOD_MS); } cmd++; diff --git a/ports/espressif/components/led_strip/CMakeLists.txt b/ports/espressif/components/led_strip/CMakeLists.txt index 6d0fcbc86..8266c5a1c 100644 --- a/ports/espressif/components/led_strip/CMakeLists.txt +++ b/ports/espressif/components/led_strip/CMakeLists.txt @@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}" PRIV_INCLUDE_DIRS "" PRIV_REQUIRES "driver" REQUIRES "") - diff --git a/ports/espressif/components/led_strip/src/led_strip_rmt_ws2812.c b/ports/espressif/components/led_strip/src/led_strip_rmt_ws2812.c index 7ac447854..ddcffbfbd 100644 --- a/ports/espressif/components/led_strip/src/led_strip_rmt_ws2812.c +++ b/ports/espressif/components/led_strip/src/led_strip_rmt_ws2812.c @@ -51,7 +51,7 @@ typedef struct { } ws2812_t; /** - * @brief Conver RGB data to RMT format. + * @brief Convert RGB data to RMT format. * * @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t) * diff --git a/ports/espressif/components/ssd1306/Kconfig.projbuild b/ports/espressif/components/ssd1306/Kconfig.projbuild index a84d38ec3..7b5a4bfd3 100644 --- a/ports/espressif/components/ssd1306/Kconfig.projbuild +++ b/ports/espressif/components/ssd1306/Kconfig.projbuild @@ -144,4 +144,3 @@ menu "SSD1306 Configuration" GPIOs 35-39 are input-only so cannot be used as outputs. endmenu - diff --git a/ports/espressif/components/ssd1306/font8x8_basic.h b/ports/espressif/components/ssd1306/font8x8_basic.h index 413825efc..3b96c90b7 100644 --- a/ports/espressif/components/ssd1306/font8x8_basic.h +++ b/ports/espressif/components/ssd1306/font8x8_basic.h @@ -10,16 +10,16 @@ /* Constant: font8x8_basic_tr - Contains an 90 digree transposed 8x8 font map for unicode points + Contains an 90 digree transposed 8x8 font map for unicode points U+0000 - U+007F (basic latin) - + To make it easy to use with SSD1306's GDDRAM mapping and API, this constant is an 90 degree transposed. - The original version written by Marcel Sondaar is availble at: - https://github.com/dhepper/font8x8/blob/master/font8x8_basic.h + The original version written by Marcel Sondaar is available at: + https://github.com/dhepper/font8x8/blob/master/font8x8_basic.h Conversion is done via following procedure: - + for (int code = 0; code < 128; code++) { uint8_t trans[8]; for (int w = 0; w < 8; w++) { @@ -28,7 +28,7 @@ trans[w] |= ((font8x8_basic[code][b] & (1 << w)) >> w) << b; } } - + for (int w = 0; w < 8; w++) { if (w == 0) { printf(" { "); } printf("0x%.2X", trans[w]); @@ -170,5 +170,3 @@ static uint8_t font8x8_basic_tr[128][8] = { }; #endif /* MAIN_FONT8X8_BASIC_H_ */ - - diff --git a/ports/espressif/components/ssd1306/ssd1306.c b/ports/espressif/components/ssd1306/ssd1306.c index f5d97f329..770da896d 100644 --- a/ports/espressif/components/ssd1306/ssd1306.c +++ b/ports/espressif/components/ssd1306/ssd1306.c @@ -112,7 +112,7 @@ void ssd1306_display_text(SSD1306_t * dev, int page, char * text, int text_len, } // by Coert Vonk -void +void ssd1306_display_text_x3(SSD1306_t * dev, int page, char * text, int text_len, bool invert) { if (page >= dev->_pages) return; @@ -148,8 +148,8 @@ ssd1306_display_text_x3(SSD1306_t * dev, int page, char * text, int text_len, bo uint8_t image[24]; for (uint8_t xx = 0; xx < 8; xx++) { // for each column (x-direction) - image[xx*3+0] = - image[xx*3+1] = + image[xx*3+0] = + image[xx*3+1] = image[xx*3+2] = out_columns[xx].u8[yy]; } if (invert) ssd1306_invert(image, 24); @@ -230,10 +230,10 @@ void ssd1306_scroll_text(SSD1306_t * dev, char * text, int text_len, bool invert if (srcIndex == dev->_scStart) break; srcIndex = srcIndex - dev->_scDirection; } - + int _text_len = text_len; if (_text_len > 16) _text_len = 16; - + ssd1306_display_text(dev, srcIndex, text, text_len, invert); } @@ -616,4 +616,3 @@ void ssd1306_dump_page(SSD1306_t * dev, int page, int seg) { ESP_LOGI(TAG, "dev->_page[%d]._segs[%d]=%02x", page, seg, dev->_page[page]._segs[seg]); } - diff --git a/ports/espressif/components/ssd1306/ssd1306.h b/ports/espressif/components/ssd1306/ssd1306.h index 71809e4b6..5e614da30 100644 --- a/ports/espressif/components/ssd1306/ssd1306.h +++ b/ports/espressif/components/ssd1306/ssd1306.h @@ -3,21 +3,21 @@ #include "driver/spi_master.h" -// Following definitions are bollowed from +// Following definitions are bollowed from // http://robotcantalk.blogspot.com/2015/03/interfacing-arduino-with-ssd1306-driven.html /* Control byte for i2c -Co : bit 8 : Continuation Bit - * 1 = no-continuation (only one byte to follow) - * 0 = the controller should expect a stream of bytes. -D/C# : bit 7 : Data/Command Select bit - * 1 = the next byte or byte stream will be Data. - * 0 = a Command byte or byte stream will be coming up next. - Bits 6-0 will be all zeros. -Usage: -0x80 : Single Command byte -0x00 : Command Stream -0xC0 : Single Data byte +Co : bit 8 : Continuation Bit + * 1 = no-continuation (only one byte to follow) + * 0 = the controller should expect a stream of bytes. +D/C# : bit 7 : Data/Command Select bit + * 1 = the next byte or byte stream will be Data. + * 0 = a Command byte or byte stream will be coming up next. + Bits 6-0 will be all zeros. +Usage: +0x80 : Single Command byte +0x00 : Command Stream +0xC0 : Single Data byte 0x40 : Data Stream */ #define OLED_CONTROL_BYTE_CMD_SINGLE 0x80 @@ -44,10 +44,10 @@ D/C# : bit 7 : Data/Command Select bit // Hardware Config (pg.31) #define OLED_CMD_SET_DISPLAY_START_LINE 0x40 -#define OLED_CMD_SET_SEGMENT_REMAP_0 0xA0 -#define OLED_CMD_SET_SEGMENT_REMAP_1 0xA1 +#define OLED_CMD_SET_SEGMENT_REMAP_0 0xA0 +#define OLED_CMD_SET_SEGMENT_REMAP_1 0xA1 #define OLED_CMD_SET_MUX_RATIO 0xA8 // follow with 0x3F = 64 MUX -#define OLED_CMD_SET_COM_SCAN_MODE 0xC8 +#define OLED_CMD_SET_COM_SCAN_MODE 0xC8 #define OLED_CMD_SET_DISPLAY_OFFSET 0xD3 // follow with 0x00 #define OLED_CMD_SET_COM_PIN_MAP 0xDA // follow with 0x12 #define OLED_CMD_NOP 0xE3 // NOP @@ -155,4 +155,3 @@ void spi_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll); #endif #endif /* MAIN_SSD1306_H_ */ - diff --git a/ports/espressif/components/ssd1306/ssd1306_i2c.c b/ports/espressif/components/ssd1306/ssd1306_i2c.c index f8579c877..d362ffbc5 100644 --- a/ports/espressif/components/ssd1306/ssd1306_i2c.c +++ b/ports/espressif/components/ssd1306/ssd1306_i2c.c @@ -47,7 +47,7 @@ void i2c_init(SSD1306_t * dev, int width, int height) { dev->_height = height; dev->_pages = 8; if (dev->_height == 32) dev->_pages = 4; - + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); i2c_master_start(cmd); @@ -182,7 +182,7 @@ void i2c_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) { i2c_master_write_byte(cmd, 0x00, true); // i2c_master_write_byte(cmd, 0xFF, true); // i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F - } + } if (scroll == SCROLL_LEFT) { i2c_master_write_byte(cmd, OLED_CMD_HORIZONTAL_LEFT, true); // 27 @@ -193,7 +193,7 @@ void i2c_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) { i2c_master_write_byte(cmd, 0x00, true); // i2c_master_write_byte(cmd, 0xFF, true); // i2c_master_write_byte(cmd, OLED_CMD_ACTIVE_SCROLL, true); // 2F - } + } if (scroll == SCROLL_DOWN) { i2c_master_write_byte(cmd, OLED_CMD_CONTINUOUS_SCROLL, true); // 29 @@ -247,4 +247,3 @@ void i2c_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) { i2c_cmd_link_delete(cmd); } - diff --git a/ports/espressif/components/ssd1306/ssd1306_spi.c b/ports/espressif/components/ssd1306/ssd1306_spi.c index 78ffbd2fb..431066c04 100644 --- a/ports/espressif/components/ssd1306/ssd1306_spi.c +++ b/ports/espressif/components/ssd1306/ssd1306_spi.c @@ -200,7 +200,7 @@ void spi_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) spi_master_write_command(dev, 0x00); // spi_master_write_command(dev, 0xFF); // spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F - } + } if (scroll == SCROLL_LEFT) { spi_master_write_command(dev, OLED_CMD_HORIZONTAL_LEFT); // 27 @@ -211,7 +211,7 @@ void spi_hardware_scroll(SSD1306_t * dev, ssd1306_scroll_type_t scroll) spi_master_write_command(dev, 0x00); // spi_master_write_command(dev, 0xFF); // spi_master_write_command(dev, OLED_CMD_ACTIVE_SCROLL); // 2F - } + } if (scroll == SCROLL_DOWN) { spi_master_write_command(dev, OLED_CMD_CONTINUOUS_SCROLL); // 29 diff --git a/ports/espressif/components/tinyusb_src/CMakeLists.txt b/ports/espressif/components/tinyusb_src/CMakeLists.txt new file mode 100644 index 000000000..6006ba9bb --- /dev/null +++ b/ports/espressif/components/tinyusb_src/CMakeLists.txt @@ -0,0 +1,56 @@ +idf_build_get_property(target IDF_TARGET) + +set(srcs) +set(includes_public) +set(compile_options) +set(tusb_src "${CMAKE_CURRENT_SOURCE_DIR}/../../../../lib/tinyusb/src") + +if(target STREQUAL "esp32s3") + set(tusb_mcu "OPT_MCU_ESP32S3") +elseif(target STREQUAL "esp32s2") + set(tusb_mcu "OPT_MCU_ESP32S2") +else() + # CONFIG_TINYUSB dependency has been guaranteed by Kconfig logic, + # So it's not possible that cmake goes here + message(FATAL_ERROR "TinyUSB is not support on ${target}.") + return() +endif() + +# Already defined in tusb_config.h +#list(APPEND compile_definitions +# CFG_TUSB_MCU=${tusb_mcu} +# CFG_TUSB_OS=OPT_OS_FREERTOS +# ) + +list(APPEND srcs + # common + ${tusb_src}/tusb.c + ${tusb_src}/common/tusb_fifo.c + # device + ${tusb_src}/device/usbd.c + ${tusb_src}/device/usbd_control.c + ${tusb_src}/class/cdc/cdc_device.c +# ${tusb_src}/class/dfu/dfu_device.c +# ${tusb_src}/class/dfu/dfu_rt_device.c + ${tusb_src}/class/hid/hid_device.c + ${tusb_src}/class/msc/msc_device.c +# ${tusb_src}/class/vendor/vendor_device.c + ${tusb_src}/portable/espressif/esp32sx/dcd_esp32sx.c + #${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c + ) + +if (DEFINED LOG) + list(APPEND compile_definitions CFG_TUSB_DEBUG=${LOG}) + if (LOG STREQUAL "4") + # no inline for debug level 4 + list(APPEND compile_definitions TU_ATTR_ALWAYS_INLINE=) + endif () +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${tusb_src} . + PRIV_REQUIRES main + ) + +target_compile_definitions(${COMPONENT_LIB} PUBLIC ${compile_definitions}) +target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-error=format) diff --git a/ports/espressif/tusb_config.h b/ports/espressif/components/tinyusb_src/tusb_config.h similarity index 96% rename from ports/espressif/tusb_config.h rename to ports/espressif/components/tinyusb_src/tusb_config.h index c23b8f92e..fa90c72a4 100644 --- a/ports/espressif/tusb_config.h +++ b/ports/espressif/components/tinyusb_src/tusb_config.h @@ -1,98 +1,101 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - */ - -#ifndef _TUSB_CONFIG_H_ -#define _TUSB_CONFIG_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "sdkconfig.h" - -//-------------------------------------------------------------------- -// COMMON CONFIGURATION -//-------------------------------------------------------------------- - -#if CONFIG_IDF_TARGET_ESP32S2 - #define CFG_TUSB_MCU OPT_MCU_ESP32S2 -#elif CONFIG_IDF_TARGET_ESP32S3 - #define CFG_TUSB_MCU OPT_MCU_ESP32S3 -#endif - -#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE -#define CFG_TUSB_OS OPT_OS_FREERTOS - -// can be defined by compiler in DEBUG build -#ifndef CFG_TUSB_DEBUG - #define CFG_TUSB_DEBUG 0 -#endif - -/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. - * Tinyusb use follows macros to declare transferring memory so that they can be put - * into those specific section. - * e.g - * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) - * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) - */ -#ifndef CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_SECTION -#endif - -#ifndef CFG_TUSB_MEM_ALIGN -#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) -#endif - -//-------------------------------------------------------------------- -// DEVICE CONFIGURATION -//-------------------------------------------------------------------- - -#ifndef CFG_TUD_ENDPOINT0_SIZE -#define CFG_TUD_ENDPOINT0_SIZE 64 -#endif - -//------------- CLASS -------------// -#define CFG_TUD_CDC 0 -#define CFG_TUD_MSC 1 -#define CFG_TUD_HID 1 -#define CFG_TUD_MIDI 0 -#define CFG_TUD_VENDOR 0 - -// MSC Buffer size of Device Mass storage -#define CFG_TUD_MSC_BUFSIZE 4096 - -// HID buffer size Should be sufficient to hold ID (if any) + Data -#define CFG_TUD_HID_BUFSIZE 64 - -// Vendor FIFO size of TX and RX -// If not configured vendor endpoints will not be buffered -#define CFG_TUD_VENDOR_RX_BUFSIZE 64 -#define CFG_TUD_VENDOR_TX_BUFSIZE 64 - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_CONFIG_H_ */ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#ifndef _TUSB_CONFIG_H_ +#define _TUSB_CONFIG_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +#include "sdkconfig.h" + +//-------------------------------------------------------------------- +// COMMON CONFIGURATION +//-------------------------------------------------------------------- + +#if CONFIG_IDF_TARGET_ESP32S2 + #define CFG_TUSB_MCU OPT_MCU_ESP32S2 +#elif CONFIG_IDF_TARGET_ESP32S3 + #define CFG_TUSB_MCU OPT_MCU_ESP32S3 +#endif + +#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE +#define CFG_TUSB_OS OPT_OS_FREERTOS + +// Espressif IDF requires "freertos/" prefix in include path +#define CFG_TUSB_OS_INC_PATH freertos/ + +// can be defined by compiler in DEBUG build +#ifndef CFG_TUSB_DEBUG + #define CFG_TUSB_DEBUG 0 +#endif + +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. + * Tinyusb use follows macros to declare transferring memory so that they can be put + * into those specific section. + * e.g + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) + */ +#ifndef CFG_TUSB_MEM_SECTION +#define CFG_TUSB_MEM_SECTION +#endif + +#ifndef CFG_TUSB_MEM_ALIGN +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#endif + +//-------------------------------------------------------------------- +// DEVICE CONFIGURATION +//-------------------------------------------------------------------- + +#ifndef CFG_TUD_ENDPOINT0_SIZE +#define CFG_TUD_ENDPOINT0_SIZE 64 +#endif + +//------------- CLASS -------------// +#define CFG_TUD_CDC 0 +#define CFG_TUD_MSC 1 +#define CFG_TUD_HID 1 +#define CFG_TUD_MIDI 0 +#define CFG_TUD_VENDOR 0 + +// MSC Buffer size of Device Mass storage +#define CFG_TUD_MSC_BUFSIZE 4096 + +// HID buffer size Should be sufficient to hold ID (if any) + Data +#define CFG_TUD_HID_BUFSIZE 64 + +// Vendor FIFO size of TX and RX +// If not configured vendor endpoints will not be buffered +#define CFG_TUD_VENDOR_RX_BUFSIZE 64 +#define CFG_TUD_VENDOR_TX_BUFSIZE 64 + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_CONFIG_H_ */ diff --git a/ports/espressif/family.cmake b/ports/espressif/family.cmake index 94456aba2..80b8dfbe9 100644 --- a/ports/espressif/family.cmake +++ b/ports/espressif/family.cmake @@ -1 +1,2 @@ -# intentionally left blank +set(UF2_FAMILY_ID_esp32s2 0xbfdd4eee) +set(UF2_FAMILY_ID_esp32s3 0xc47e5767) diff --git a/ports/espressif/main/CMakeLists.txt b/ports/espressif/main/CMakeLists.txt new file mode 100644 index 000000000..ea285ce87 --- /dev/null +++ b/ports/espressif/main/CMakeLists.txt @@ -0,0 +1,12 @@ +set(srcs + ${TOP}/src/ghostfat.c + ${TOP}/src/images.c + ${TOP}/src/main.c + ${TOP}/src/msc.c + ${TOP}/src/screen.c + ${TOP}/src/usb_descriptors.c + ) + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS ${TOP}/src ${TOP}/src/favicon + REQUIRES boards tinyusb_src) diff --git a/ports/family_support.cmake b/ports/family_support.cmake index 6629ce3f2..f96671492 100644 --- a/ports/family_support.cmake +++ b/ports/family_support.cmake @@ -20,9 +20,9 @@ endif () if (NOT DEFINED FAMILY) # Find path contains BOARD file(GLOB BOARD_PATH LIST_DIRECTORIES true - RELATIVE ${TOP}/ports - ${TOP}/ports/*/boards/${BOARD} - ) + RELATIVE ${TOP}/ports + ${TOP}/ports/*/boards/${BOARD} + ) if (NOT BOARD_PATH) message(FATAL_ERROR "Could not detect FAMILY from BOARD=${BOARD}") endif () diff --git a/ports/k32l2/Makefile b/ports/k32l2/Makefile index a551883f9..543948cfd 100644 --- a/ports/k32l2/Makefile +++ b/ports/k32l2/Makefile @@ -15,7 +15,7 @@ CFLAGS += \ -flto \ -mthumb \ -mabi=aapcs \ - -mcpu=cortex-m0plus + -mcpu=cortex-m0plus # suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter @@ -32,7 +32,7 @@ SRC_C += \ $(SDK_DIR)/drivers/lpuart/fsl_lpuart.c \ $(PORT_DIR)/clock_config.c \ $(PORT_DIR)/boards.c \ - $(PORT_DIR)/board_flash.c + $(PORT_DIR)/board_flash.c ifndef BUILD_NO_TINYUSB SRC_C += lib/tinyusb/src/portable/nxp/khci/dcd_khci.c @@ -53,7 +53,7 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/gpio \ $(TOP)/$(SDK_DIR)/drivers/port \ $(TOP)/$(SDK_DIR)/drivers/lpuart \ - $(TOP)/$(SDK_DIR)/drivers/flash + $(TOP)/$(SDK_DIR)/drivers/flash LD_FILES ?= $(MCU_DIR)/gcc/$(LD_FNAME) diff --git a/ports/k32l2/board_flash.c b/ports/k32l2/board_flash.c index 2639a696e..054a7a155 100644 --- a/ports/k32l2/board_flash.c +++ b/ports/k32l2/board_flash.c @@ -68,7 +68,7 @@ void board_flash_init(void) FLASH_GetProperty(&bf_flash_config, kFLASH_PropertyPflash0TotalSize, &pflashTotalSize); FLASH_GetProperty(&bf_flash_config, kFLASH_PropertyPflash0SectorSize, &pflashSectorSize); - TU_LOG1("Base: 0x%08lX, Total: 0x%08lX, Sector: 0x%08lX\r\n", + TU_LOG1("Base: 0x%08lX, Total: 0x%08lX, Sector: 0x%08lX\r\n", pflashBlockBase, pflashTotalSize, pflashSectorSize); } @@ -95,7 +95,7 @@ void board_flash_flush(void) // skip matching contents if ( memcmp(bf_flash_cache, (void*) bf_flash_page_addr, FLASH_PAGE_SIZE) ) { TU_LOG1("Clear cache prefetch speculation for flush operation.\r\n"); - + /* Pre-preparation work about flash Cache/Prefetch/Speculation. */ FTFx_CACHE_ClearCachePrefetchSpeculation(&bf_cache_config, true); @@ -125,7 +125,7 @@ void board_flash_write (uint32_t addr, void const *data, uint32_t len) { uint32_t newAddr = addr & ~(FLASH_PAGE_SIZE - 1); // int32_t result; - + if (newAddr != bf_flash_page_addr) { board_flash_flush(); bf_flash_page_addr = newAddr; @@ -138,7 +138,7 @@ void board_flash_write (uint32_t addr, void const *data, uint32_t len) memcpy(bf_flash_cache + (addr & (FLASH_PAGE_SIZE - 1)), data, len); } - + void board_flash_erase_app(void) { // TODO implement later diff --git a/ports/k32l2/boards.c b/ports/k32l2/boards.c index 0c8c8ce80..8aa5cc9ab 100644 --- a/ports/k32l2/boards.c +++ b/ports/k32l2/boards.c @@ -47,7 +47,7 @@ void board_init(void) CLOCK_EnableClock(LED_CLK_PORT); gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 }; GPIO_PinInit(LED_GPIO, LED_PIN, &led_config); - PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); + PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio); #endif #ifdef KUIIC_RGB_LED @@ -59,10 +59,10 @@ void board_init(void) gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 }; GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config); const port_pin_config_t BUTTON_CFG = { - kPORT_PullUp, - kPORT_FastSlewRate, - kPORT_PassiveFilterDisable, - kPORT_LowDriveStrength, + kPORT_PullUp, + kPORT_FastSlewRate, + kPORT_PassiveFilterDisable, + kPORT_LowDriveStrength, kPORT_MuxAsGpio }; PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG); diff --git a/ports/k32l2/boards.h b/ports/k32l2/boards.h index 7ecbb89a1..ac2bb5572 100644 --- a/ports/k32l2/boards.h +++ b/ports/k32l2/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -34,7 +34,7 @@ #define TINYUF2_DFU_DOUBLE_TAP 1 #define DBL_TAP_REG RTC->TAR -#define BOARD_FLASH_APP_START 0x8000 +#define BOARD_FLASH_APP_START 0x8000 //#define BOARD_FLASH_SIZE (BOARD_FLASH_TOTAL - BOARD_FLASH_APP_START) #ifdef __cplusplus diff --git a/ports/k32l2/boards/kuiic/board.h b/ports/k32l2/boards/kuiic/board.h index a88729009..88edf580f 100644 --- a/ports/k32l2/boards/kuiic/board.h +++ b/ports/k32l2/boards/kuiic/board.h @@ -71,7 +71,7 @@ #define UART_PIN_PORT PORTE #define UART_TX_PIN 0 #define UART_TX_MUX kPORT_MuxAlt3 -// PTE1 is not connected in this package +// PTE1 is not connected in this package // but RX is not needed to output log messages #define UART_RX_PIN 1 #define UART_RX_MUX kPORT_MuxAlt3 diff --git a/ports/k32l2/boards/kuiic/kuiic_rgb.c b/ports/k32l2/boards/kuiic/kuiic_rgb.c index f61876fed..581aaa1de 100644 --- a/ports/k32l2/boards/kuiic/kuiic_rgb.c +++ b/ports/k32l2/boards/kuiic/kuiic_rgb.c @@ -47,7 +47,7 @@ void kuiic_rgb_init(void) { uint8_t rgb[3] = {0,0,0x80}; /* Select timer output for LED pins */ - CLOCK_EnableClock(KUIIC_RGB_CLK_PORT); + CLOCK_EnableClock(KUIIC_RGB_CLK_PORT); PORT_SetPinMux(KUIIC_RGB_BR_PORT, KUIIC_RGB_BR_PIN, KUIIC_RGB_BR_MUX); PORT_SetPinMux(KUIIC_RGB_GB_PORT, KUIIC_RGB_GB_PIN, KUIIC_RGB_GB_MUX); @@ -101,7 +101,7 @@ void kuiic_rgb_init(void) { // KUIIC RGB write function void kuiic_rgb_write(uint8_t const rgb[]) { if ((rgb[0]==0)&&(rgb[1]==0)&&(rgb[2]==0)) { - kuiic_rgb_on = false; + kuiic_rgb_on = false; } else { kuiic_rgb_on = true; uint32_t r = rgb[0] << KUIIC_RGB_BRIGHT_SHIFT; diff --git a/ports/k32l2/boards/kuiic/kuiic_rgb.h b/ports/k32l2/boards/kuiic/kuiic_rgb.h index a5a8c660a..fb6d9e9c2 100644 --- a/ports/k32l2/boards/kuiic/kuiic_rgb.h +++ b/ports/k32l2/boards/kuiic/kuiic_rgb.h @@ -60,7 +60,7 @@ void kuiic_rgb_init(void); void kuiic_rgb_write(uint8_t const rgb[]); /*! @brief KUIIC RGB tick handler - * @note This should be called in the systick handler to + * @note This should be called in the systick handler to * initiate the next pulses */ void kuiic_rgb_tick(void); diff --git a/ports/k32l2/boards/kuiic/kuiic_rgb.md b/ports/k32l2/boards/kuiic/kuiic_rgb.md index 2b864a78d..c79030bb4 100644 --- a/ports/k32l2/boards/kuiic/kuiic_rgb.md +++ b/ports/k32l2/boards/kuiic/kuiic_rgb.md @@ -7,7 +7,7 @@ The KUIIC board uses two timer capable pins to drive an RGB LED. This was done The three LEDS are connected in the following order: ``` - red B/R# blue G/B# green + red B/R# blue G/B# green 3V3 - 2k ->|- PTA1 - 1k ->|- PTA2 - 2k ->|- GND ``` @@ -36,5 +36,4 @@ To implement this with the timer: ## Clocking -This library utilizes the 48MHz clock that is required for USB operation. It sets the prescaler to divide by 1 for the highest resolution. KUIIC_RGB_BRIGHT_SHIFT is provided to allow for maximum brightness addjustments. The three color counts need to be completed within the 1ms SysTick interval which is 48,000 clocks when running at 48MHz, therefor the maximum count needs to be less than 16,000 for each color and KUIIC_RGB_BRIGHT_SHIFT should not be set above 5 (255 * 2^5 = 8160). - +This library utilizes the 48MHz clock that is required for USB operation. It sets the prescaler to divide by 1 for the highest resolution. KUIIC_RGB_BRIGHT_SHIFT is provided to allow for maximum brightness addjustments. The three color counts need to be completed within the 1ms SysTick interval which is 48,000 clocks when running at 48MHz, therefore the maximum count needs to be less than 16,000 for each color and KUIIC_RGB_BRIGHT_SHIFT should not be set above 5 (255 * 2^5 = 8160). diff --git a/ports/k32l2/tusb_config.h b/ports/k32l2/tusb_config.h index b80805714..8792e800a 100644 --- a/ports/k32l2/tusb_config.h +++ b/ports/k32l2/tusb_config.h @@ -41,7 +41,7 @@ #define BOARD_DEVICE_RHPORT_NUM 0 #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_FULL_SPEED -#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) +#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE | BOARD_DEVICE_RHPORT_SPEED) #define CFG_TUSB_OS OPT_OS_NONE // can be defined by compiler in DEBUG build diff --git a/ports/lpc55/boards.c b/ports/lpc55/boards.c index 562a8b8e8..5f65e9b6a 100644 --- a/ports/lpc55/boards.c +++ b/ports/lpc55/boards.c @@ -138,7 +138,7 @@ void board_flash_write (uint32_t addr, void const *data, uint32_t len) { uint32_t newAddr = addr & ~(FLASH_PAGE_SIZE - 1); int32_t status; - + if (newAddr != _flash_page_addr) { board_flash_flush(); _flash_page_addr = newAddr; @@ -280,7 +280,7 @@ void board_dfu_init(void) CLOCK_EnableClock(kCLOCK_Usbh1); /* Put PHY powerdown under software control */ USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; - /* According to reference mannual, device mode setting has to be set by access usb host register */ + /* According to reference manual, device mode setting has to be set by access usb host register */ USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK; /* enable usb1 host clock */ CLOCK_DisableClock(kCLOCK_Usbh1); @@ -293,7 +293,7 @@ void board_dfu_init(void) CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); /* enable usb0 host clock */ CLOCK_EnableClock(kCLOCK_Usbhsl0); - /*According to reference mannual, device mode setting has to be set by access usb host register */ + /*According to reference manual, device mode setting has to be set by access usb host register */ USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; /* disable usb0 host clock */ CLOCK_DisableClock(kCLOCK_Usbhsl0); diff --git a/ports/lpc55/boards.h b/ports/lpc55/boards.h index 467015fe2..990617dcb 100644 --- a/ports/lpc55/boards.h +++ b/ports/lpc55/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -33,7 +33,7 @@ #include "fsl_rtc.h" // Flash Start Address of Application -#define BOARD_FLASH_APP_START 0x10000 +#define BOARD_FLASH_APP_START 0x10000 #define TINYUF2_DFU_DOUBLE_TAP 1 #define DBL_TAP_REG RTC->GPREG[7] diff --git a/ports/lpc55/port.mk b/ports/lpc55/port.mk index c77df2674..37c1faabc 100644 --- a/ports/lpc55/port.mk +++ b/ports/lpc55/port.mk @@ -50,4 +50,3 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/lpc_iocon \ $(TOP)/$(SDK_DIR)/drivers/lpc_rtc \ $(TOP)/$(SDK_DIR)/drivers/sctimer - diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 66e6f8eb4..f25a4d6d7 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -34,9 +34,9 @@ include ../rules.mk # - "SDP Jump Address" must equal _ivt_origin # # TinyUF2 will copy itself to the correct location in flash. -# "UF2 Write Address" shows where the image will reside in flash if you +# "UF2 Write Address" shows where the image will reside in flash if you # want to use a tool like pyocd to write the binary into flash through SWD -# Note: The .elf file cannot be written directly to flash since the target +# Note: The .elf file cannot be written directly to flash since the target # is RAM and the addresses need to be translated. #--------------------------------------------------------- SDP_MIMXRT1011_PID = 0x0145 diff --git a/ports/mimxrt10xx/README.md b/ports/mimxrt10xx/README.md index c009376b2..34d518b4c 100644 --- a/ports/mimxrt10xx/README.md +++ b/ports/mimxrt10xx/README.md @@ -4,7 +4,7 @@ TinyUF2 port of iMXRT runs entirely on SRAM which is not only super fast but als ## Initial Flash -To initially flash TinyUF2 on your blank board or board that is shipped with other bootlaoder. You could either use external debugger or BootROM +To initially flash TinyUF2 on your blank board or board that is shipped with other bootloader. You could either use external debugger or BootROM ### External Debugger @@ -18,7 +18,7 @@ make BOARD=metro_m7_1011 flash-jlink-bin iMXRT has built-in BootROM that implements the Serial Download Protocol (SDP), which can be used to load & execute TinyUF2 to SRAM with `spdhost` tool via USB. You need to -1. Instal the NXP SPSDK with `pip install spsdk` more details is described in the [SPSDK Installation Guide](https://spsdk.readthedocs.io/en/latest/usage/installation.html).If you are running Linux, make sure your user has permission for accessing `hidraw` (more details below) +1. Install the NXP SPSDK with `pip install spsdk` more details is described in the [SPSDK Installation Guide](https://spsdk.readthedocs.io/en/latest/usage/installation.html).If you are running Linux, make sure your user has permission for accessing `hidraw` (more details below) 2. Power up your board with the Boot Mode switch set to `BOOT_MODE[1:0]=01` to enter Serial Download mode. Note: Serial Download mode also automatically run with blank flash, therefore you don't have to manual change it in your production run. diff --git a/ports/mimxrt10xx/apps/erase_firmware/Makefile b/ports/mimxrt10xx/apps/erase_firmware/Makefile index f6b91fdcc..4080f9f5f 100644 --- a/ports/mimxrt10xx/apps/erase_firmware/Makefile +++ b/ports/mimxrt10xx/apps/erase_firmware/Makefile @@ -9,4 +9,4 @@ SRC_C += \ INC += $(TOP)/src -include ../app.mk \ No newline at end of file +include ../app.mk diff --git a/ports/mimxrt10xx/apps/esp32programmer/Makefile b/ports/mimxrt10xx/apps/esp32programmer/Makefile index 985695d24..d4ffdffcf 100644 --- a/ports/mimxrt10xx/apps/esp32programmer/Makefile +++ b/ports/mimxrt10xx/apps/esp32programmer/Makefile @@ -18,4 +18,3 @@ all: @echo This board does not have ESP32 co-processor endif - diff --git a/ports/mimxrt10xx/apps/esp32programmer/main.c b/ports/mimxrt10xx/apps/esp32programmer/main.c index 4847f8e44..3ae05d1ef 100644 --- a/ports/mimxrt10xx/apps/esp32programmer/main.c +++ b/ports/mimxrt10xx/apps/esp32programmer/main.c @@ -226,4 +226,3 @@ void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) esp32_set_en(en); } #endif - diff --git a/ports/mimxrt10xx/apps/esp32programmer/usb_descriptors.c b/ports/mimxrt10xx/apps/esp32programmer/usb_descriptors.c index d609cffdf..c82000b0f 100644 --- a/ports/mimxrt10xx/apps/esp32programmer/usb_descriptors.c +++ b/ports/mimxrt10xx/apps/esp32programmer/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/ports/mimxrt10xx/apps/factory_test/Makefile b/ports/mimxrt10xx/apps/factory_test/Makefile index f892e74fd..02e674a98 100644 --- a/ports/mimxrt10xx/apps/factory_test/Makefile +++ b/ports/mimxrt10xx/apps/factory_test/Makefile @@ -21,4 +21,3 @@ all: @echo This app is only board only built for metro_m7_1011 endif - diff --git a/ports/mimxrt10xx/apps/factory_test/usb_descriptors.c b/ports/mimxrt10xx/apps/factory_test/usb_descriptors.c index d0f6010fe..7352af6fc 100644 --- a/ports/mimxrt10xx/apps/factory_test/usb_descriptors.c +++ b/ports/mimxrt10xx/apps/factory_test/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/Makefile b/ports/mimxrt10xx/apps/factory_test_metro_sd/Makefile index e0f201f24..9b99aeba1 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/Makefile +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/Makefile @@ -24,4 +24,3 @@ all: @echo This app is only board only built for metro_m7_1011_sd endif - diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/CMakeLists.txt b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/CMakeLists.txt index b575a5b09..05b6bb0bc 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/CMakeLists.txt +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/CMakeLists.txt @@ -9,4 +9,4 @@ function(add_sdmmc TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/sdspi ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common ) -endfunction() \ No newline at end of file +endfunction() diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/common/fsl_sdmmc_spec.h b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/common/fsl_sdmmc_spec.h index f2e602c30..fc2b0d234 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/common/fsl_sdmmc_spec.h +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/common/fsl_sdmmc_spec.h @@ -205,7 +205,7 @@ typedef enum _sd_application_command kSD_ApplicationSendNumberWriteBlocks = 22U, /*!< Send Number Of Written Blocks */ kSD_ApplicationSetWriteBlockEraseCount = 23U, /*!< Set Write Block Erase Count */ kSD_ApplicationSendOperationCondition = 41U, /*!< Send Operation Condition */ - kSD_ApplicationSetClearCardDetect = 42U, /*!< Set Connnect/Disconnect pull up on detect pin */ + kSD_ApplicationSetClearCardDetect = 42U, /*!< Set Connect/Disconnect pull up on detect pin */ kSD_ApplicationSendScr = 51U, /*!< Send Scr */ } sd_application_command_t; @@ -308,7 +308,7 @@ enum */ enum { - kSD_GroupTimingMode = 0U, /*!< acess mode group*/ + kSD_GroupTimingMode = 0U, /*!< access mode group*/ kSD_GroupCommandSystem = 1U, /*!< command system group*/ kSD_GroupDriverStrength = 2U, /*!< driver strength group*/ kSD_GroupCurrentLimit = 3U, /*!< current limit group*/ @@ -489,7 +489,7 @@ enum /*! @brief sdio ocr voltage window mask */ #define SDIO_OCR_VOLTAGE_WINDOW_MASK (0xFFFFU << 8U) -/*! @brief sdio ocr reigster IO NUMBER mask */ +/*! @brief sdio ocr register IO NUMBER mask */ #define SDIO_OCR_IO_NUM_MASK (7U << kSDIO_OcrIONumber) /*! @brief sdio capability flag @@ -657,7 +657,7 @@ typedef enum _mmc_specification_version /*! @brief Read the value of FREQUENCY UNIT in TRANSFER SPEED. */ #define READ_MMC_TRANSFER_SPEED_FREQUENCY_UNIT(CSD) \ ((((CSD).transferSpeed) & MMC_TRANSFER_SPEED_FREQUENCY_UNIT_MASK) >> MMC_TRANSFER_SPEED_FREQUENCY_UNIT_SHIFT) -/*! @brief Read the value of MULTIPLER filed in TRANSFER SPEED. */ +/*! @brief Read the value of MULTIPLIER filed in TRANSFER SPEED. */ #define READ_MMC_TRANSFER_SPEED_MULTIPLIER(CSD) \ ((((CSD).transferSpeed) & MMC_TRANSFER_SPEED_MULTIPLIER_MASK) >> MMC_TRANSFER_SPEED_MULTIPLIER_SHIFT) @@ -741,7 +741,7 @@ typedef enum _mmc_boot_partition_enable */ typedef enum _mmc_boot_timing_mode { - kMMC_BootModeSDRWithDefaultTiming = 0U, /*!< boot mode single data rate with backward compatiable timings */ + kMMC_BootModeSDRWithDefaultTiming = 0U, /*!< boot mode single data rate with backward compatible timings */ kMMC_BootModeSDRWithHighSpeedTiming = 1U, /*!< boot mode single data rate with high speed timing */ kMMC_BootModeDDRTiming = 2U, /*!< boot mode dual date rate */ } mmc_boot_timing_mode_t; @@ -942,7 +942,7 @@ typedef struct _sdio_func_cis uint8_t funcInfo; /*!< function info */ uint8_t ioVersion; /*!< level of application specification this io support */ uint32_t cardPSN; /*!< product serial number */ - uint32_t ioCSASize; /*!< avaliable CSA size for io */ + uint32_t ioCSASize; /*!< available CSA size for io */ uint8_t ioCSAProperty; /*!< CSA property */ uint16_t ioMaxBlockSize; /*!< io max transfer data size */ uint32_t ioOCR; /*!< io ioeration condition */ @@ -955,7 +955,7 @@ typedef struct _sdio_func_cis uint16_t ioMinBandWidth; /*!< io min transfer bandwidth */ uint16_t ioOptimumBandWidth; /*!< io optimum transfer bandwidth */ - uint16_t ioReadyTimeout; /*!< timeout value from enalbe to ready */ + uint16_t ioReadyTimeout; /*!< timeout value from enable to ready */ uint16_t ioHighCurrentAvgCurrent; /*!< the average peak current (mA) when IO operating in high current mode */ uint16_t ioHighCurrentMaxCurrent; /*!< the max peak current (mA) @@ -1107,7 +1107,7 @@ typedef struct _mmc_extended_csd /*uint8_t packedCmdFailIndex;*/ /*!< packed cmd fail index [35]*/ /*uint8_t packedCmdStatus;*/ /*!< packed cmd status[36]*/ /*uint32_t contextConfig[4U];*/ /*!< context configuration[51-37]*/ - /*uint16_t extPartitionAttr;*/ /*!< extended partitions attribut[53-52]*/ + /*uint16_t extPartitionAttr;*/ /*!< extended partitions attribute[53-52]*/ /*uint16_t exceptEventStatus;*/ /*!< exception events status[55-54]*/ /*uint16_t exceptEventControl;*/ /*!< exception events control[57-56]*/ /*uint8_t toReleaseAddressedGroup;*/ /*!< number of group to be released[58]*/ diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.c b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.c index d5def3391..572d66934 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.c +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.c @@ -17,7 +17,7 @@ #endif /******************************************************************************* - * Definitons + * Definitions ******************************************************************************/ /*! @brief Card command maximum retry times value */ #define SDSPI_TRANSFER_RETRY_TIMES (20000U) @@ -49,7 +49,7 @@ static status_t SDSPI_WaitReady(sdspi_host_t *host); * * @param buffer Data buffer. * @param length Data length. - * @param crc The orginal crc value. + * @param crc The original crc value. * @return Generated CRC7. */ static uint32_t SDSPI_GenerateCRC7(uint8_t *buffer, uint32_t length, uint32_t crc); @@ -233,7 +233,7 @@ static status_t SDSPI_SelectFunction(sdspi_card_t *card, uint32_t group, uint32_ * @param mode 0 to check function group, 1 to switch function group. * @param group function group. * @param number function name. - * @status buffer to recieve function status. + * @status buffer to receive function status. */ static status_t SDSPI_SwitchFunction( sdspi_card_t *card, uint32_t mode, uint32_t group, uint32_t number, uint32_t *status); @@ -361,7 +361,7 @@ static status_t SDSPI_SendCommand(sdspi_host_t *host, uint32_t command, uint32_t return kStatus_SDSPI_ExchangeFailed; } - /* Wait for the response coming, the left most bit which is transfered first in first response byte is 0 */ + /* Wait for the response coming, the left most bit which is transferred first in first response byte is 0 */ for (i = 0U; i < 9U; i++) { if (kStatus_Success != host->exchange(&timingByte, &response[0U], 1U)) @@ -376,7 +376,7 @@ static status_t SDSPI_SendCommand(sdspi_host_t *host, uint32_t command, uint32_t } } - if ((response[0U] & 0x80U) != 0U) /* Max index byte is high means response comming. */ + if ((response[0U] & 0x80U) != 0U) /* Max index byte is high means response coming. */ { return kStatus_SDSPI_ResponseError; } @@ -492,7 +492,7 @@ static status_t SDSPI_SendInterfaceCondition(sdspi_card_t *card, uint32_t *flags *flags |= SDMMC_MASK(kSD_OcrHostCapacitySupportFlag); return kStatus_Success; } - /* if VCA in the reponse not set, then the card not support current voltage, return fail */ + /* if VCA in the response not set, then the card not support current voltage, return fail */ else if (response[3U] == 0U) { return kStatus_SDSPI_InvalidVoltage; @@ -640,7 +640,7 @@ static void SDSPI_DecodeCsd(sdspi_card_t *card, uint8_t *rawCsd) csd->flags |= (uint16_t)kSD_CsdDsrImplementedFlag; } - /* Some fileds is different when csdStructure is different. */ + /* Some fields is different when csdStructure is different. */ if (csd->csdStructure == 0U) /* Decode the bits when CSD structure is version 1.0 */ { csd->deviceSize = @@ -918,7 +918,7 @@ static status_t SDSPI_Read(sdspi_host_t *host, uint8_t *buffer, uint32_t size) (void)memset(buffer, 0xFF, size); - /* Wait data token comming */ + /* Wait data token coming */ do { if (kStatus_Success != host->exchange((uint8_t *)&timingByte, &response, 1U)) diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.h b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.h index 2c2df6541..8636afbff 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.h +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/middleware-sdmmc/sdspi/fsl_sdspi.h @@ -39,8 +39,8 @@ #endif /*! @brief This macro is used to enable or disable the CRC protection for SD card - * command. The SPI interface is intialized in the CRC off mode by default.However, the - * RESET command(cmd0) that is used to switch the card to SPI mode, is recieved by by the card + * command. The SPI interface is initialized in the CRC off mode by default.However, the + * RESET command(cmd0) that is used to switch the card to SPI mode, is received by by the card * while in SD mode and therefore, shall have a valid CRC filed, after the card put into SPI mode * , CRC check for all command include CMD0 will be done according to CMD59 setting, host can turn * CRC option on and off using the CMD59, this command should be call before ACMD41. @@ -77,7 +77,7 @@ enum kStatus_SDSPI_StopTransmissionFailed = MAKE_STATUS(kStatusGroup_SDSPI, 15U), /*!< Stop transmission failed */ kStatus_SDSPI_SendApplicationCommandFailed = MAKE_STATUS(kStatusGroup_SDSPI, 16U), /*!< Send application command failed */ - kStatus_SDSPI_InvalidVoltage = MAKE_STATUS(kStatusGroup_SDSPI, 17U), /*!< invaild supply voltage */ + kStatus_SDSPI_InvalidVoltage = MAKE_STATUS(kStatusGroup_SDSPI, 17U), /*!< invalid supply voltage */ kStatus_SDSPI_SwitchCmdFail = MAKE_STATUS(kStatusGroup_SDSPI, 18U), /*!< switch command crc protection on/off */ kStatus_SDSPI_NotSupportYet = MAKE_STATUS(kStatusGroup_SDSPI, 19U), /*!< not support */ @@ -276,13 +276,13 @@ status_t SDSPI_SendCid(sdspi_card_t *card); #if SDSPI_CARD_CRC_PROTECTION_ENABLE /*! * @brief Command CRC protection on/off. - * The SPI interface is intialized in the CRC off mode in default.However, the - * RESET command(cmd0) that is used to switch the card to SPI mode, is recieved by by the card + * The SPI interface is initialized in the CRC off mode in default.However, the + * RESET command(cmd0) that is used to switch the card to SPI mode, is received by by the card * while in SD mode and therefore, shall have a valid CRC filed, after the card put into SPI mode * , CRC check for all command include CMD0 will be done according to CMD59 setting, host can turn * CRC option on and off using the CMD59, this command should be call before ACMD41. * @param card Card descriptor. - * @param enable true is enable command crc protection, false is diable command crc protection. + * @param enable true is enable command crc protection, false is disable command crc protection. * @retval kStatus_SDSPI_SendCommandFailed Send command failed. * @retval kStatus_Success Operate successfully. */ diff --git a/ports/mimxrt10xx/apps/factory_test_metro_sd/usb_descriptors.c b/ports/mimxrt10xx/apps/factory_test_metro_sd/usb_descriptors.c index d0f6010fe..7352af6fc 100644 --- a/ports/mimxrt10xx/apps/factory_test_metro_sd/usb_descriptors.c +++ b/ports/mimxrt10xx/apps/factory_test_metro_sd/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/ports/mimxrt10xx/bl_flexspi.h b/ports/mimxrt10xx/bl_flexspi.h index f44e9d107..bad085e26 100644 --- a/ports/mimxrt10xx/bl_flexspi.h +++ b/ports/mimxrt10xx/bl_flexspi.h @@ -28,7 +28,7 @@ /* IP TX BUF depth, in longwords */ #define FlexSPI_IP_TX_BUF_DEPTH (256U) -/* FLEXSPI memory config block related defintions */ +/* FLEXSPI memory config block related definitions */ #define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian #define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0 #define FLEXSPI_CFG_BLK_SIZE (512) @@ -36,7 +36,7 @@ /* FLEXSPI Feature related definitions */ #define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1 -/* Lookup table related defintions */ +/* Lookup table related definitions */ #define CMD_INDEX_READ 0 #define CMD_INDEX_READSTATUS 1 #define CMD_INDEX_WRITEENABLE 2 @@ -108,7 +108,7 @@ typedef enum _FlexSpiSerialClockFreq #endif } flexspi_serial_clk_freq_t; -//!@brief Defintions for FlexSPI Serial Clock Frequency +//!@brief Definitions for FlexSPI Serial Clock Frequency typedef enum _FlexSpiSerialClockSafeFreq { kFlexSpiSerialClk_SafeFreq = 1, @@ -175,7 +175,7 @@ enum kFlexSpiDeviceType_SerialNAND = 2, //!< Flash devices are Serial NAND kFlexSpiDeviceType_SerialRAM = 3, //!< Flash devices are Serial RAM/HyperFLASH kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND - kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs + kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs }; //!@brief Flash Pad Definitions @@ -242,7 +242,7 @@ typedef struct _FlexSPIConfig //! details uint8_t deviceType; //!< [0x044-0x044] Device Type: See Flash Type Definition for more details uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal - uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot + uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequency, device specific definitions, See System Boot //! Chapter for more details uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH diff --git a/ports/mimxrt10xx/board_flash.c b/ports/mimxrt10xx/board_flash.c index 867a0343a..51d49b360 100644 --- a/ports/mimxrt10xx/board_flash.c +++ b/ports/mimxrt10xx/board_flash.c @@ -53,7 +53,7 @@ extern uint32_t _fcfb_length[]; #define FCFB_START_ADDRESS (FLEXSPI_FLASH_BASE + (((uint32_t) &qspiflash_config) & 0xFFFUL)) #define FCFB_LENGTH ((uint32_t) _fcfb_length) -// Flash Configuration Structure +// Flash Configuration Structure extern flexspi_nor_config_t const qspiflash_config; static flexspi_nor_config_t* flash_cfg = (flexspi_nor_config_t*)(uintptr_t) &qspiflash_config; diff --git a/ports/mimxrt10xx/boards.c b/ports/mimxrt10xx/boards.c index 85a46efc1..1501fa656 100644 --- a/ports/mimxrt10xx/boards.c +++ b/ports/mimxrt10xx/boards.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2018 Ha Thach for Adafruit Industries @@ -320,7 +320,7 @@ void board_rgb_write(uint8_t const rgb[]) __disable_irq(); - // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + // Enable DWT in debug core. Usable when interrupts disabled, as opposed to Systick->VAL CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; DWT->CYCCNT = 0; diff --git a/ports/mimxrt10xx/boards.h b/ports/mimxrt10xx/boards.h index 048c52f6d..567670fd1 100644 --- a/ports/mimxrt10xx/boards.h +++ b/ports/mimxrt10xx/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.h b/ports/mimxrt10xx/boards/imxrt1010_evk/board.h index 36b9d63e6..2923d72bd 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1015_evk/board.h b/ports/mimxrt10xx/boards/imxrt1015_evk/board.h index 0f5c4ad2c..a3d58fc23 100644 --- a/ports/mimxrt10xx/boards/imxrt1015_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1015_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1015_evk/clock_config.h b/ports/mimxrt10xx/boards/imxrt1015_evk/clock_config.h index 06b0696f1..20985c2b5 100644 --- a/ports/mimxrt10xx/boards/imxrt1015_evk/clock_config.h +++ b/ports/mimxrt10xx/boards/imxrt1015_evk/clock_config.h @@ -105,4 +105,3 @@ void BOARD_BootClockRUN(void); #endif /* __cplusplus*/ #endif /* _CLOCK_CONFIG_H_ */ - diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/board.h b/ports/mimxrt10xx/boards/imxrt1020_evk/board.h index 110489054..2b66d5086 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.c index 8d921a85d..68cd97f6a 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.c +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.c @@ -362,4 +362,3 @@ void BOARD_BootClockRUN(void) /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; } - diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.h b/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.h index f406c5923..8f136bbcb 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.h +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/clock_config.h @@ -110,4 +110,3 @@ void BOARD_BootClockRUN(void); #endif /* __cplusplus*/ #endif /* _CLOCK_CONFIG_H_ */ - diff --git a/ports/mimxrt10xx/boards/imxrt1024_evk/board.h b/ports/mimxrt10xx/boards/imxrt1024_evk/board.h index c88fc5738..1cf320f15 100644 --- a/ports/mimxrt10xx/boards/imxrt1024_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1024_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1040_evk/board.h b/ports/mimxrt10xx/boards/imxrt1040_evk/board.h index 759a4eba1..c7610b7f7 100644 --- a/ports/mimxrt10xx/boards/imxrt1040_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1040_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1050_evkb/board.h b/ports/mimxrt10xx/boards/imxrt1050_evkb/board.h index 11f6312be..562a81518 100644 --- a/ports/mimxrt10xx/boards/imxrt1050_evkb/board.h +++ b/ports/mimxrt10xx/boards/imxrt1050_evkb/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.c b/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.c index 282cd058e..a9246fc02 100644 --- a/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.c +++ b/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.c @@ -932,4 +932,3 @@ void BOARD_BootClockRUN_528M(void) /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_528M_CORE_CLOCK; } - diff --git a/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.h b/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.h index 7c6fc2971..3e4009634 100644 --- a/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.h +++ b/ports/mimxrt10xx/boards/imxrt1050_evkb/clock_config.h @@ -207,4 +207,3 @@ void BOARD_BootClockRUN_528M(void); #endif /* __cplusplus*/ #endif /* _CLOCK_CONFIG_H_ */ - diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/board.h b/ports/mimxrt10xx/boards/imxrt1060_evk/board.h index 7212873e2..85fae6184 100644 --- a/ports/mimxrt10xx/boards/imxrt1060_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/imxrt1064_evk/board.h b/ports/mimxrt10xx/boards/imxrt1064_evk/board.h index 8498d8d2a..84ff8e7df 100644 --- a/ports/mimxrt10xx/boards/imxrt1064_evk/board.h +++ b/ports/mimxrt10xx/boards/imxrt1064_evk/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/board.cmake b/ports/mimxrt10xx/boards/metro_m7_1011/board.cmake index 04f150ef3..975ddb0c7 100644 --- a/ports/mimxrt10xx/boards/metro_m7_1011/board.cmake +++ b/ports/mimxrt10xx/boards/metro_m7_1011/board.cmake @@ -12,4 +12,4 @@ function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC CPU_MIMXRT1011DAE5A ) -endfunction() \ No newline at end of file +endfunction() diff --git a/ports/mimxrt10xx/boards/metro_m7_1011_sd/board.cmake b/ports/mimxrt10xx/boards/metro_m7_1011_sd/board.cmake index 04f150ef3..975ddb0c7 100644 --- a/ports/mimxrt10xx/boards/metro_m7_1011_sd/board.cmake +++ b/ports/mimxrt10xx/boards/metro_m7_1011_sd/board.cmake @@ -12,4 +12,4 @@ function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC CPU_MIMXRT1011DAE5A ) -endfunction() \ No newline at end of file +endfunction() diff --git a/ports/mimxrt10xx/boards/teensy40/board.h b/ports/mimxrt10xx/boards/teensy40/board.h index 794290a8f..eeb9f0148 100644 --- a/ports/mimxrt10xx/boards/teensy40/board.h +++ b/ports/mimxrt10xx/boards/teensy40/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/boards/teensy41/board.h b/ports/mimxrt10xx/boards/teensy41/board.h index f0c44b7a5..fc027ac1b 100644 --- a/ports/mimxrt10xx/boards/teensy41/board.h +++ b/ports/mimxrt10xx/boards/teensy41/board.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach for Adafruit Industries diff --git a/ports/mimxrt10xx/flexspi_nor_flash.h b/ports/mimxrt10xx/flexspi_nor_flash.h index e50e06b59..b55c7326c 100644 --- a/ports/mimxrt10xx/flexspi_nor_flash.h +++ b/ports/mimxrt10xx/flexspi_nor_flash.h @@ -46,7 +46,7 @@ enum _flexspi_nor_status kStatus_FLEXSPINOR_EraseAllFail = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 2), //!< Status for Chip Erase failure kStatus_FLEXSPINOR_WaitTimeout = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 3), //!< Status for timeout kStatus_FlexSPINOR_NotSupported = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 4), // Status for PageSize overflow - kStatus_FlexSPINOR_WriteAlignmentError = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 5), //!< Status for Alignement error + kStatus_FlexSPINOR_WriteAlignmentError = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 5), //!< Status for Alignment error kStatus_FlexSPINOR_CommandFailure = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 6), //!< Status for Erase/Program Verify Error kStatus_FlexSPINOR_SFDP_NotFound = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 7), //!< Status for SFDP read failure kStatus_FLEXSPINOR_Unsupported_SFDP_Version = MAKE_STATUS(kStatusGroup_FLEXSPINOR, 8), //!< Status for Unrecognized SFDP version @@ -185,7 +185,7 @@ typedef struct _flexspi_nor_config uint8_t serialNorType; //!< Serial NOR Flash type: 0/1/2/3 uint8_t needExitNoCmdMode; //!< Need to exit NoCmd mode before other IP command uint8_t halfClkForNonReadCmd; //!< Half the Serial Clock for non-read command: true/false - uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP commmand execution + uint8_t needRestoreNoCmdMode; //!< Need to Restore NoCmd mode after IP command execution uint32_t blockSize; //!< Block size uint32_t reserve2[11]; //!< Reserved for future use } flexspi_nor_config_t; diff --git a/ports/mimxrt10xx/linker/MIMXRT1021_ram.ld b/ports/mimxrt10xx/linker/MIMXRT1021_ram.ld index 9803f61b4..ab1d198d5 100644 --- a/ports/mimxrt10xx/linker/MIMXRT1021_ram.ld +++ b/ports/mimxrt10xx/linker/MIMXRT1021_ram.ld @@ -11,10 +11,9 @@ _ocram_size = 128K; /* The default FlexRAM config has 64k ITCM so use it. */ -/* Avoid ITCM address 0x0, start at 4K +/* Avoid ITCM address 0x0, start at 4K See note in RT1020 Reference Manual section 9.6.1.2 FlexSPI Serial NOR Flash Boot Operation */ _fcfb_origin = 0x1000; /* must be 4K aligned */ _ivt_origin = 0x2000; - \ No newline at end of file diff --git a/ports/mimxrt10xx/linker/MIMXRT1052_ram.ld b/ports/mimxrt10xx/linker/MIMXRT1052_ram.ld index c8a35ad2e..54bafb613 100644 --- a/ports/mimxrt10xx/linker/MIMXRT1052_ram.ld +++ b/ports/mimxrt10xx/linker/MIMXRT1052_ram.ld @@ -11,7 +11,7 @@ _ocram_size = 256K; /* The default FlexRAM config has 128k ITCM so use it. */ -/* Reference Manual suggests avoiding addresses 0x0 through 0x3 */ +/* Reference Manual suggests avoiding addresses 0x0 through 0x3 */ /* in section 9.6.1.2, so start at 0x1000 */ _fcfb_origin = 0x1000; diff --git a/ports/mimxrt10xx/linker/MIMXRT1062_ram.ld b/ports/mimxrt10xx/linker/MIMXRT1062_ram.ld index c8a35ad2e..54bafb613 100644 --- a/ports/mimxrt10xx/linker/MIMXRT1062_ram.ld +++ b/ports/mimxrt10xx/linker/MIMXRT1062_ram.ld @@ -11,7 +11,7 @@ _ocram_size = 256K; /* The default FlexRAM config has 128k ITCM so use it. */ -/* Reference Manual suggests avoiding addresses 0x0 through 0x3 */ +/* Reference Manual suggests avoiding addresses 0x0 through 0x3 */ /* in section 9.6.1.2, so start at 0x1000 */ _fcfb_origin = 0x1000; diff --git a/ports/mimxrt10xx/linker/MIMXRT1064_ram.ld b/ports/mimxrt10xx/linker/MIMXRT1064_ram.ld index 257cf62b2..f7c2b390f 100644 --- a/ports/mimxrt10xx/linker/MIMXRT1064_ram.ld +++ b/ports/mimxrt10xx/linker/MIMXRT1064_ram.ld @@ -12,4 +12,4 @@ _ocram_size = 256K; _fcfb_origin = 0x1000; /* must be 4K aligned */ -_ivt_origin = 0x2000; \ No newline at end of file +_ivt_origin = 0x2000; diff --git a/ports/mimxrt10xx/linker/memory.ld b/ports/mimxrt10xx/linker/memory.ld index 78455f792..300875810 100644 --- a/ports/mimxrt10xx/linker/memory.ld +++ b/ports/mimxrt10xx/linker/memory.ld @@ -27,7 +27,7 @@ MEMORY m_interrupts (RX) : ORIGIN = _interrupts_origin , LENGTH = _interrupts_length m_text (RX) : ORIGIN = _text_origin , LENGTH = _text_length - m_data (RW) : ORIGIN = _dtcm_base , LENGTH = _dtcm_size + m_data (RW) : ORIGIN = _dtcm_base , LENGTH = _dtcm_size m_data2 (RW) : ORIGIN = _ocram_base , LENGTH = _ocram_size } diff --git a/ports/mimxrt10xx/port.mk b/ports/mimxrt10xx/port.mk index e1040d40d..b50341879 100644 --- a/ports/mimxrt10xx/port.mk +++ b/ports/mimxrt10xx/port.mk @@ -35,7 +35,7 @@ SRC_C += \ $(SDK_DIR)/drivers/ocotp/fsl_ocotp.c \ $(SDK_DIR)/drivers/pwm/fsl_pwm.c \ $(SDK_DIR)/drivers/xbara/fsl_xbara.c \ - $(BOARD_DIR)/clock_config.c + $(BOARD_DIR)/clock_config.c ifeq ($(MCU),MIMXRT1176) SRC_C += $(MCU_DIR)/system_$(MCU)_cm7.c diff --git a/ports/mimxrt10xx/romapi_flash.h b/ports/mimxrt10xx/romapi_flash.h index a0474916f..d1650d95c 100644 --- a/ports/mimxrt10xx/romapi_flash.h +++ b/ports/mimxrt10xx/romapi_flash.h @@ -42,4 +42,3 @@ status_t ROM_FLEXSPI_NorFlash_ProgramPage(uint32_t instance, flexspi_nor_config_ #if !( defined(FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL) && FSL_ROM_FLEXSPINOR_API_HAS_FEATURE_ERASE_ALL ) status_t ROM_FLEXSPI_NorFlash_EraseAll(uint32_t instance, flexspi_nor_config_t *config); #endif - diff --git a/ports/mimxrt10xx/sdphost/sdphost.md b/ports/mimxrt10xx/sdphost/sdphost.md index b5794951a..b39bbf4c9 100644 --- a/ports/mimxrt10xx/sdphost/sdphost.md +++ b/ports/mimxrt10xx/sdphost/sdphost.md @@ -1,3 +1,3 @@ # SDPHOST -The local binaries of sdphost will be depricated in a future release in favor of the [NXP SPSDK utilities available through PyPI](https://pypi.org/project/spsdk/). [Documentation for the NXP SPSDK is provided online](https://spsdk.readthedocs.io/en/latest/index.html). \ No newline at end of file +The local binaries of sdphost will be deprecated in a future release in favor of the [NXP SPSDK utilities available through PyPI](https://pypi.org/project/spsdk/). [Documentation for the NXP SPSDK is provided online](https://spsdk.readthedocs.io/en/latest/index.html). diff --git a/ports/stm32f3/CMakeLists.txt b/ports/stm32f3/CMakeLists.txt index 2bdfb1d31..c090328f7 100644 --- a/ports/stm32f3/CMakeLists.txt +++ b/ports/stm32f3/CMakeLists.txt @@ -26,4 +26,3 @@ family_flash_jlink(tinyuf2) # Self Update add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/apps/self_update) - diff --git a/ports/stm32f3/apps/self_update/CMakeLists.txt b/ports/stm32f3/apps/self_update/CMakeLists.txt index 81ae59cf6..f53b010a3 100644 --- a/ports/stm32f3/apps/self_update/CMakeLists.txt +++ b/ports/stm32f3/apps/self_update/CMakeLists.txt @@ -32,4 +32,4 @@ target_link_options(self_update PUBLIC family_configure_common(self_update) target_link_libraries(self_update board_${BOARD}) family_add_bin_hex(self_update) -family_add_uf2(self_update ${UF2_FAMILY_ID}) \ No newline at end of file +family_add_uf2(self_update ${UF2_FAMILY_ID}) diff --git a/ports/stm32f3/board_flash.c b/ports/stm32f3/board_flash.c index 8e798309b..65676b417 100644 --- a/ports/stm32f3/board_flash.c +++ b/ports/stm32f3/board_flash.c @@ -182,7 +182,7 @@ void board_flash_erase_app(void) bool board_flash_protect_bootloader(bool protect) { - // F3 reset everytime Option Bytes is programmed + // F3 reset every time Option Bytes is programmed // skip protecting bootloader if we just reset by option byte changes // since we want to disable protect mode for e.g self-updating if ( board_reset_by_option_bytes() ) { diff --git a/ports/stm32f3/boards.c b/ports/stm32f3/boards.c index 0efe2acac..608e9f3b4 100644 --- a/ports/stm32f3/boards.c +++ b/ports/stm32f3/boards.c @@ -261,7 +261,7 @@ void board_rgb_write(uint8_t const rgb[]) __disable_irq(); - // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + // Enable DWT in debug core. Usable when interrupts disabled, as opposed to Systick->VAL CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; DWT->CYCCNT = 0; diff --git a/ports/stm32f3/family.cmake b/ports/stm32f3/family.cmake index 9ab63bcf1..98dacb934 100644 --- a/ports/stm32f3/family.cmake +++ b/ports/stm32f3/family.cmake @@ -90,4 +90,4 @@ function(family_configure_tinyuf2 TARGET) add_tinyuf2(${TARGET}) target_link_libraries(${TARGET} PUBLIC board_${BOARD}) -endfunction() \ No newline at end of file +endfunction() diff --git a/ports/stm32f3/linker/stm32f3_app.ld b/ports/stm32f3/linker/stm32f3_app.ld index 018da5711..1b5336483 100644 --- a/ports/stm32f3/linker/stm32f3_app.ld +++ b/ports/stm32f3/linker/stm32f3_app.ld @@ -151,7 +151,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/ports/stm32f3/linker/stm32f3_boot.ld b/ports/stm32f3/linker/stm32f3_boot.ld index 1518486b5..403af02c5 100644 --- a/ports/stm32f3/linker/stm32f3_boot.ld +++ b/ports/stm32f3/linker/stm32f3_boot.ld @@ -151,7 +151,7 @@ SECTIONS . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) diff --git a/ports/stm32f4/boards.c b/ports/stm32f4/boards.c index 0e4efd07e..f0723e863 100644 --- a/ports/stm32f4/boards.c +++ b/ports/stm32f4/boards.c @@ -299,7 +299,7 @@ void board_rgb_write(uint8_t const rgb[]) { uint32_t start; uint32_t cyc; - // Enable DWT in debug core. Useable when interrupts disabled, as opposed to + // Enable DWT in debug core. Usable when interrupts disabled, as opposed to // Systick->VAL CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; diff --git a/ports/stm32f4/boards.h b/ports/stm32f4/boards.h index d07ba41d4..0af82cd59 100644 --- a/ports/stm32f4/boards.h +++ b/ports/stm32f4/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/stm32f4/linker/stm32f4_app.ld b/ports/stm32f4/linker/stm32f4_app.ld index 585402ba9..b9fd6ecf7 100644 --- a/ports/stm32f4/linker/stm32f4_app.ld +++ b/ports/stm32f4/linker/stm32f4_app.ld @@ -112,19 +112,19 @@ SECTIONS KEEP (*(.fini_array*)) PROVIDE_HIDDEN (__fini_array_end = .); } >FLASH - + /* CF2 config */ . = ORIGIN(CONFIG); - .config : + .config : { KEEP (*(.config)) - } >CONFIG + } >CONFIG /* used by the startup to initialize data */ _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -134,12 +134,12 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) @@ -162,7 +162,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/ports/stm32f4/linker/stm32f4_boot.ld b/ports/stm32f4/linker/stm32f4_boot.ld index ce66e13ff..292aecd0a 100644 --- a/ports/stm32f4/linker/stm32f4_boot.ld +++ b/ports/stm32f4/linker/stm32f4_boot.ld @@ -112,19 +112,19 @@ SECTIONS KEEP (*(.fini_array*)) PROVIDE_HIDDEN (__fini_array_end = .); } >FLASH - + /* CF2 config */ . = ORIGIN(CONFIG); - .config : + .config : { KEEP (*(.config)) - } >CONFIG + } >CONFIG /* used by the startup to initialize data */ _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -134,12 +134,12 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) @@ -162,7 +162,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/ports/stm32h7/Makefile b/ports/stm32h7/Makefile index 9f4611d17..e3bd25b7a 100644 --- a/ports/stm32h7/Makefile +++ b/ports/stm32h7/Makefile @@ -7,7 +7,7 @@ include port.mk LD_FILES ?= \ $(PORT_DIR)/linker/memory.ld \ $(PORT_DIR)/linker/common.ld \ - $(PORT_DIR)/linker/$(MCU).ld + $(PORT_DIR)/linker/$(MCU).ld SRC_C += \ $(TOP)/$(PORT_DIR)/boards.c \ @@ -17,7 +17,7 @@ SRC_C += \ include ../rules.mk -#---------- Self udpate ---------- +#---------- Self update ---------- # Compile apps/self_update/self_update.c # This uf2 will be loaded into RAM # TODO: this needs to build the actual uf2 binary first @@ -31,9 +31,8 @@ self-update-clean: #---------- Erase app ---------- # Compile apps/erase_firmware/erase_firmware.c # This uf2 will be loaded into RAM -erase-app: +erase-app: $(MAKE) -C $(TOP)/$(PORT_DIR)/apps/erase_firmware uf2 -erase-app-clean: +erase-app-clean: $(MAKE) -C $(TOP)/$(PORT_DIR)/apps/erase_firmware clean - diff --git a/ports/stm32h7/README.md b/ports/stm32h7/README.md index 6799a39b8..8269659e8 100644 --- a/ports/stm32h7/README.md +++ b/ports/stm32h7/README.md @@ -1,3 +1,3 @@ # TinyUF2 for STM32H7 -TinyUF2 reserves 64KB like the F4 port to be compatible with existing application. +TinyUF2 reserves 64KB like the F4 port to be compatible with existing application. diff --git a/ports/stm32h7/apps/app.mk b/ports/stm32h7/apps/app.mk index ae6ed444f..4af7454f6 100644 --- a/ports/stm32h7/apps/app.mk +++ b/ports/stm32h7/apps/app.mk @@ -9,7 +9,7 @@ include $(TOP)/$(PORT_DIR)/port.mk LD_FILES ?= \ $(PORT_DIR)/linker/memory.ld \ $(PORT_DIR)/linker/common.ld \ - $(PORT_DIR)/linker/$(MCU).ld + $(PORT_DIR)/linker/$(MCU).ld CFLAGS += \ -DVECT_TAB_SRAM \ @@ -29,4 +29,4 @@ $(BUILD)/$(OUTNAME).uf2: $(BUILD)/$(OUTNAME)-ram.bin $(BUILD)/$(OUTNAME)-ram.bin: $(BUILD)/$(OUTNAME).elf @echo CREATE $@ - @$(OBJCOPY) -O binary $^ $@ \ No newline at end of file + @$(OBJCOPY) -O binary $^ $@ diff --git a/ports/stm32h7/board_flash.c b/ports/stm32h7/board_flash.c index fb4f4ef82..d101a2fb5 100644 --- a/ports/stm32h7/board_flash.c +++ b/ports/stm32h7/board_flash.c @@ -55,11 +55,11 @@ extern volatile uint32_t _board_tmp_boot_magic[]; uint32_t board_get_app_start_address(void) { - if (TMP_BOOT_MAGIC == 0xDEADBEEFU) + if (TMP_BOOT_MAGIC == 0xDEADBEEFU) { return TMP_BOOT_ADDR; } - else + else { return BOARD_QSPI_APP_ADDR; } @@ -172,7 +172,7 @@ void board_flash_write(uint32_t addr, void const * data, uint32_t len) { // SET_BOOT_ADDR(BOARD_AXISRAM_APP_ADDR); // handles erasing internally - if (W25qxx_Write((uint8_t *)data, (addr - QSPI_BASE_ADDR), len) != w25qxx_OK) + if (W25qxx_Write((uint8_t *)data, (addr - QSPI_BASE_ADDR), len) != w25qxx_OK) { __asm("bkpt #9"); } diff --git a/ports/stm32h7/board_hmi.c b/ports/stm32h7/board_hmi.c index 5bb4cdb86..11881803a 100644 --- a/ports/stm32h7/board_hmi.c +++ b/ports/stm32h7/board_hmi.c @@ -59,7 +59,7 @@ void board_led_write(uint32_t state) uint32_t board_button_read(void) { #if defined(BUTTON_PIN) - return (BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) ? 1: 0; + return (BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) ? 1: 0; #endif // defined(BUTTON_PIN) } diff --git a/ports/stm32h7/board_irq.c b/ports/stm32h7/board_irq.c index b313e436a..36404f5fb 100644 --- a/ports/stm32h7/board_irq.c +++ b/ports/stm32h7/board_irq.c @@ -64,7 +64,7 @@ typedef struct __attribute__((packed)) CtxFrame { #define R ": %lx" #define EXC_FMT "r0" R "r1" R "r2" R "r3" R "r12" R "lr" R "ret" R "xpsr" R "\n" -#define EXC_DET(x) x->r0, x->r1, x->r2, x->r3, x->r12, x->lr, x->ret, x->xpsr +#define EXC_DET(x) x->r0, x->r1, x->r2, x->r3, x->r12, x->lr, x->ret, x->xpsr __attribute__((optimize("O0"))) void fault_handler(sFrame *fr) @@ -78,4 +78,4 @@ void HardFault_Handler(void) { HARDFAULT_HANDLER(); } -#endif // defined(TRAP_EXC) \ No newline at end of file +#endif // defined(TRAP_EXC) diff --git a/ports/stm32h7/boards.c b/ports/stm32h7/boards.c index 20273fe2f..d09824363 100644 --- a/ports/stm32h7/boards.c +++ b/ports/stm32h7/boards.c @@ -46,7 +46,7 @@ void board_init(void) #ifndef TINYUF2_SELF_UPDATE board_flash_early_init(); -#endif // TINYUF2_SELF_UPDATE +#endif // TINYUF2_SELF_UPDATE } // Configure USB for DFU diff --git a/ports/stm32h7/boards.h b/ports/stm32h7/boards.h index ea9e15837..90878f9ca 100644 --- a/ports/stm32h7/boards.h +++ b/ports/stm32h7/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries @@ -66,7 +66,7 @@ #define PFLASH_OFFS 64*1024 // 64Kbyte offset #define AXISRAM_OFFS 0U -#define IS_SPI_ADDR(x) (((x) >= SPI_BASE_ADDR) && ((x) < (SPI_BASE_ADDR + SPI_FLASH_SIZE))) +#define IS_SPI_ADDR(x) (((x) >= SPI_BASE_ADDR) && ((x) < (SPI_BASE_ADDR + SPI_FLASH_SIZE))) #define IS_QSPI_ADDR(x) (((x) >= QSPI_BASE_ADDR) && ((x) < (QSPI_BASE_ADDR + QSPI_FLASH_SIZE))) #define IS_PFLASH_ADDR(x) (((x) >= (PFLASH_BASE_ADDR + PFLASH_SIZE/2)) && ((x) < (PFLASH_BASE_ADDR + PFLASH_SIZE))) #define IS_AXISRAM_ADDR(x) (((x) >= (AXISRAM_BASE_ADDR + AXISRAM_OFFS)) && ((x) < (AXISRAM_BASE_ADDR + AXISRAM_SIZE))) diff --git a/ports/stm32h7/boards/mini_stm32h750_v11/board.h b/ports/stm32h7/boards/mini_stm32h750_v11/board.h index bac989d74..6ae09bbff 100644 --- a/ports/stm32h7/boards/mini_stm32h750_v11/board.h +++ b/ports/stm32h7/boards/mini_stm32h750_v11/board.h @@ -107,8 +107,8 @@ extern "C" { #define DISPLAY_CTRL_PIN GPIO_PIN_13 #define DISPLAY_MOSI_PIN GPIO_PIN_14 #define DISPLAY_PORT GPIOE -// The display is 160x80 but the code expects a larger frambuffer -// The display is misconfigured, to make the existing frambuffer look pretty +// The display is 160x80 but the code expects a larger framebuffer +// The display is misconfigured, to make the existing framebuffer look pretty // on the screen. The complete framebuffer is not displayed #define DISPLAY_HEIGHT 128 #define DISPLAY_WIDTH 161 @@ -124,17 +124,17 @@ static inline void clock_init(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - // Supply configuration update enable + // Supply configuration update enable HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); - - // Configure the main internal regulator output voltage + + // Configure the main internal regulator output voltage __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - // Configure the PLL clock source + // Configure the PLL clock source __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB busses clocks RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.LSIState = RCC_LSI_ON; @@ -150,7 +150,7 @@ static inline void clock_init(void) RCC_OscInitStruct.PLL.PLLFRACN = 0; HAL_RCC_OscConfig(&RCC_OscInitStruct); - // Initializes the CPU, AHB and APB busses clocks + // Initializes the CPU, AHB and APB busses clocks RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; @@ -181,7 +181,7 @@ static inline void clock_init(void) PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - // Enable USB Voltage detector + // Enable USB Voltage detector HAL_PWREx_EnableUSBVoltageDetector(); } @@ -318,7 +318,7 @@ static inline void spi_flash_init(SPI_HandleTypeDef * pspi) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - + __HAL_RCC_SPI1_CLK_ENABLE(); pspi->Instance = SPI1; pspi->Init.Mode = SPI_MODE_MASTER; diff --git a/ports/stm32h7/boards/mini_stm32h750_v11/board.mk b/ports/stm32h7/boards/mini_stm32h750_v11/board.mk index 94db9fc8d..2dfef29ad 100644 --- a/ports/stm32h7/boards/mini_stm32h750_v11/board.mk +++ b/ports/stm32h7/boards/mini_stm32h750_v11/board.mk @@ -19,4 +19,4 @@ CFLAGS += \ MCU = h750xx SRC_S += \ - $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s \ No newline at end of file + $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s diff --git a/ports/stm32h7/components/st7735/fonts.c b/ports/stm32h7/components/st7735/fonts.c index 918a7741f..094d339d0 100644 --- a/ports/stm32h7/components/st7735/fonts.c +++ b/ports/stm32h7/components/st7735/fonts.c @@ -1,17 +1,17 @@ // MIT License -// +// // Copyright (c) 2018 Aleksander Alekseev -// +// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: -// +// // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. -// +// // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -319,4 +319,4 @@ static const uint16_t Font16x26 [] = { FontDef Font_7x10 = {7,10,Font7x10}; FontDef Font_11x18 = {11,18,Font11x18}; -FontDef Font_16x26 = {16,26,Font16x26}; \ No newline at end of file +FontDef Font_16x26 = {16,26,Font16x26}; diff --git a/ports/stm32h7/components/st7735/fonts.h b/ports/stm32h7/components/st7735/fonts.h index ead30248c..da39d5756 100644 --- a/ports/stm32h7/components/st7735/fonts.h +++ b/ports/stm32h7/components/st7735/fonts.h @@ -1,17 +1,17 @@ // MIT License -// +// // Copyright (c) 2018 Aleksander Alekseev -// +// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: -// +// // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. -// +// // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -36,4 +36,4 @@ extern FontDef Font_7x10; extern FontDef Font_11x18; extern FontDef Font_16x26; -#endif // __FONTS_H__ \ No newline at end of file +#endif // __FONTS_H__ diff --git a/ports/stm32h7/components/st7735/st7735.c b/ports/stm32h7/components/st7735/st7735.c index a14657464..706b6e2a5 100644 --- a/ports/stm32h7/components/st7735/st7735.c +++ b/ports/stm32h7/components/st7735/st7735.c @@ -1,17 +1,17 @@ // MIT License -// +// // Copyright (c) 2018 Aleksander Alekseev -// +// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: -// +// // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. -// +// // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -52,7 +52,7 @@ static const uint8_t 0x00, // Boost frequency ST7735_PWCTR4 , 2 , // 10: Power control, 2 args, no delay: 0x8A, // BCLK/2, Opamp current small & Medium low - 0x2A, + 0x2A, ST7735_PWCTR5 , 2 , // 11: Power control, 2 args, no delay: 0x8A, 0xEE, ST7735_VMCTR1 , 1 , // 12: Power control, 1 arg, no delay: @@ -217,7 +217,7 @@ static void ST7735_WriteChar(uint16_t x, uint16_t y, char ch, FontDef font, uint for(j = 0; j < font.width; j++) { if((b << j) & 0x8000) { ST7735_DrawPixel(x + j, y + i, color); - } + } } } } @@ -288,4 +288,4 @@ void ST7735_InvertColors(bool invert) { DISPLAY_EN; ST7735_WriteCommand(invert ? ST7735_INVON : ST7735_INVOFF); DISPLAY_DIS; -} \ No newline at end of file +} diff --git a/ports/stm32h7/components/st7735/st7735.h b/ports/stm32h7/components/st7735/st7735.h index 4c326ab89..a5a0a751a 100644 --- a/ports/stm32h7/components/st7735/st7735.h +++ b/ports/stm32h7/components/st7735/st7735.h @@ -1,17 +1,17 @@ // MIT License -// +// // Copyright (c) 2018 Aleksander Alekseev -// +// // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rights // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the Software is // furnished to do so, subject to the following conditions: -// +// // The above copyright notice and this permission notice shall be included in all // copies or substantial portions of the Software. -// +// // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -173,7 +173,7 @@ extern SPI_HandleTypeDef ST7735_SPI_PORT; #define ST7735_XSTART 26 #define ST7735_YSTART 1 #define ST7735_WIDTH 80 -#define ST7735_HEIGHT 160 +#define ST7735_HEIGHT 160 #define ST7735_ROTATION (ST7735_MADCTL_MX | ST7735_MADCTL_MY | ST7735_MADCTL_BGR) */ @@ -187,7 +187,7 @@ extern SPI_HandleTypeDef ST7735_SPI_PORT; #define ST7735_ROTATION (ST7735_MADCTL_MX | ST7735_MADCTL_MV | ST7735_MADCTL_BGR) */ -// mini 160x80, rotate right +// mini 160x80, rotate right /* #define ST7735_IS_160X80 1 #define ST7735_XSTART 1 @@ -268,4 +268,4 @@ void ST7735_FillScreen(uint16_t color); void ST7735_DrawImage(uint16_t x, uint16_t y, uint16_t w, uint16_t h, const uint16_t* data); void ST7735_InvertColors(bool invert); -#endif // __ST7735_H__ \ No newline at end of file +#endif // __ST7735_H__ diff --git a/ports/stm32h7/components/w25qxx/w25qxx.c b/ports/stm32h7/components/w25qxx/w25qxx.c index bc47f2828..e685a7064 100644 --- a/ports/stm32h7/components/w25qxx/w25qxx.c +++ b/ports/stm32h7/components/w25qxx/w25qxx.c @@ -26,10 +26,10 @@ uint8_t W25Qx_Init(void) static void W25Qx_Reset(void) { uint8_t cmd[2] = {RESET_ENABLE_CMD,RESET_MEMORY_CMD}; - + SPI_FLASH_EN(); /* Send the reset command */ - W25Qx_SPI_Transmit(cmd, 2, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 2, W25QXXXX_TIMEOUT_VALUE); SPI_FLASH_DIS(); } @@ -42,15 +42,15 @@ static uint8_t W25Qx_GetStatus(void) { uint8_t cmd[] = {READ_STATUS_REG1_CMD}; uint8_t status; - + SPI_FLASH_EN(); - + /* Send the read status command */ - W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); /* Reception of the data */ W25Qx_SPI_Receive(&status, 1, W25QXXXX_TIMEOUT_VALUE); SPI_FLASH_DIS(); - + /* Check the value of the register */ if((status & W25QXXXX_FSR_BUSY) != 0) { @@ -59,7 +59,7 @@ static uint8_t W25Qx_GetStatus(void) else { return W25Qx_OK; - } + } } /** @@ -74,50 +74,50 @@ uint8_t W25Qx_WriteEnable(void) /*Select the FLASH: Chip Select low */ SPI_FLASH_EN(); /* Send the read ID command */ - W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); /*Deselect the FLASH: Chip Select high */ SPI_FLASH_DIS(); - + /* Wait the end of Flash writing */ while(W25Qx_GetStatus() == W25Qx_BUSY) { /* Check for the Timeout */ if((W25Qx_GetTick() - tickstart) > W25QXXXX_TIMEOUT_VALUE) - { + { return W25Qx_TIMEOUT; } W25Qx_Delay(1); } - + return W25Qx_OK; } /** * @brief Read Manufacture/Device ID. * @param return value address -/ 返回值如下: -/ 0XEF13,表示芯片型号为W25Q80 -/ 0XEF14,表示芯片型号为W25Q16 -/ 0XEF15,表示芯片型号为W25Q32 -/ 0XEF16,表示芯片型号为W25Q64 +/ 返回值如下: +/ 0XEF13,表示芯片型号为W25Q80 +/ 0XEF14,表示芯片型号为W25Q16 +/ 0XEF15,表示芯片型号为W25Q32 +/ 0XEF16,表示芯片型号为W25Q64 * @retval None */ void W25Qx_Read_ID(uint16_t *ID) { uint8_t idt[2]; - + uint8_t cmd[4] = {READ_ID_CMD,0x00,0x00,0x00}; - + SPI_FLASH_EN(); /* Send the read ID command */ - W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); /* Reception of the data */ W25Qx_SPI_Receive(idt, 2, W25QXXXX_TIMEOUT_VALUE); - - *ID = (idt[0] << 8) + idt[1]; - + + *ID = (idt[0] << 8) + idt[1]; + SPI_FLASH_DIS(); - + } #include @@ -131,28 +131,28 @@ uint8_t W25Qx_Get_Parameter(W25Qx_Parameter *Para) { uint16_t id; uint32_t size; - + Para->PAGE_SIZE = 256; Para->SUBSECTOR_SIZE = 4096; Para->SECTOR_SIZE = 0x10000; - + W25Qx_Read_ID(&id); if(id < W25Q80 || id > W25Q128) return W25Qx_ERROR; - + size = (uint32_t) powf(2,(id - 0xEF13)) * 1024 * 1024; - + Para->FLASH_Id = id; Para->FLASH_Size = size; Para->SUBSECTOR_COUNT = Para->FLASH_Size / Para->SUBSECTOR_SIZE; Para->SECTOR_COUNT = Para->FLASH_Size / Para->SECTOR_SIZE; - + return W25Qx_OK; } /** * @brief Reads an amount of data from the QSPI memory. * @param pData: Pointer to data to be read * @param ReadAddr: Read start address - * @param Size: Size of data to read + * @param Size: Size of data to read * @retval QSPI memory status */ uint8_t W25Qx_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size) @@ -164,10 +164,10 @@ uint8_t W25Qx_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size) cmd[1] = (uint8_t)(ReadAddr >> 16); cmd[2] = (uint8_t)(ReadAddr >> 8); cmd[3] = (uint8_t)(ReadAddr); - + SPI_FLASH_EN(); /* Send the read ID command */ - W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); /* Reception of the data */ if (W25Qx_SPI_Receive(pData,Size,W25QXXXX_TIMEOUT_VALUE) != 0U) { @@ -181,7 +181,7 @@ uint8_t W25Qx_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size) * @brief Writes an amount of data to the SPI memory. * @param pData: Pointer to data to be written * @param WriteAddr: Write start address - * @param Size: Size of data to write,No more than 256byte. + * @param Size: Size of data to write,No more than 256byte. * @retval SPI memory status */ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) @@ -189,7 +189,7 @@ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) uint8_t cmd[4]; uint32_t end_addr, current_size, current_addr; uint32_t tickstart = W25Qx_GetTick(); - + /* Calculation of the size between the write address and the end of the page */ current_addr = 0; @@ -205,10 +205,10 @@ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) current_size = Size; } - /* Initialize the adress variables */ + /* Initialize the address variables */ current_addr = WriteAddr; end_addr = WriteAddr + Size; - + /* Perform the write page by page */ do { @@ -220,14 +220,14 @@ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) /* Enable write operations */ W25Qx_WriteEnable(); - + SPI_FLASH_EN(); /* Send the command */ if (W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE) != 0U) { return W25Qx_ERROR; } - + /* Transmission of the data */ if (W25Qx_SPI_Transmit(pData,current_size, W25QXXXX_TIMEOUT_VALUE) != 0U) { @@ -239,19 +239,19 @@ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) { /* Check for the Timeout */ if((W25Qx_GetTick() - tickstart) > W25QXXXX_TIMEOUT_VALUE) - { + { return W25Qx_TIMEOUT; } //delay(1); } - + /* Update the address and size variables for next page programming */ current_addr += current_size; pData += current_size; current_size = ((current_addr + W25QXXXX_PAGE_SIZE) > end_addr) ? (end_addr - current_addr) : W25QXXXX_PAGE_SIZE; } while (current_addr < end_addr); - + return W25Qx_OK; } @@ -259,7 +259,7 @@ uint8_t W25Qx_WriteNoCheck(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) * @brief Erases and Writes an amount of data to the SPI memory. * @param pData: Pointer to data to be written * @param WriteAddr: Write start address - * @param Size: Size of data to write,No more than 256byte. + * @param Size: Size of data to write,No more than 256byte. * @retval QSPI memory status */ uint8_t W25Qx_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) @@ -315,13 +315,13 @@ uint8_t W25Qx_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) sector_avl = (Size > 4096) ? 4096 : Size; } } - + return W25Qx_OK; } /** - * @brief Erases the specified block of the QSPI memory. - * @param BlockAddress: Block address to erase + * @brief Erases the specified block of the QSPI memory. + * @param BlockAddress: Block address to erase * @retval QSPI memory status */ uint8_t W25Qx_Erase_Block(uint32_t Address) @@ -332,23 +332,23 @@ uint8_t W25Qx_Erase_Block(uint32_t Address) cmd[1] = (uint8_t)(Address >> 16); cmd[2] = (uint8_t)(Address >> 8); cmd[3] = (uint8_t)(Address); - + /* Enable write operations */ W25Qx_WriteEnable(); - + /*Select the FLASH: Chip Select low */ SPI_FLASH_EN(); /* Send the read ID command */ - W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 4, W25QXXXX_TIMEOUT_VALUE); /*Deselect the FLASH: Chip Select high */ SPI_FLASH_DIS(); - + /* Wait the end of Flash writing */ while(W25Qx_GetStatus() == W25Qx_BUSY) { /* Check for the Timeout */ if((W25Qx_GetTick() - tickstart) > W25QXXXX_SECTOR_ERASE_MAX_TIME) - { + { return W25Qx_TIMEOUT; } //delay(1); @@ -365,26 +365,26 @@ uint8_t W25Qx_Erase_Chip(void) uint8_t cmd[4]; uint32_t tickstart = W25Qx_GetTick(); cmd[0] = CHIP_ERASE_CMD; - + /* Enable write operations */ W25Qx_WriteEnable(); - + /*Select the FLASH: Chip Select low */ SPI_FLASH_EN(); /* Send the read ID command */ - W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); + W25Qx_SPI_Transmit(cmd, 1, W25QXXXX_TIMEOUT_VALUE); /*Deselect the FLASH: Chip Select high */ SPI_FLASH_DIS(); - + /* Wait the end of Flash writing */ while(W25Qx_GetStatus() == W25Qx_BUSY) { /* Check for the Timeout */ if((W25Qx_GetTick() - tickstart) > W25QXXXX_BULK_ERASE_MAX_TIME) - { + { return W25Qx_TIMEOUT; } //delay(1); } return W25Qx_OK; -} \ No newline at end of file +} diff --git a/ports/stm32h7/components/w25qxx/w25qxx.h b/ports/stm32h7/components/w25qxx/w25qxx.h index 634c2bd50..546b6467d 100644 --- a/ports/stm32h7/components/w25qxx/w25qxx.h +++ b/ports/stm32h7/components/w25qxx/w25qxx.h @@ -5,7 +5,7 @@ #ifdef __cplusplus extern "C" { -#endif +#endif /* W25Q32 */ #define W25QXXXX_FLASH_SIZE 0x0400000 /* 32 MBits => 4MBytes */ @@ -29,7 +29,7 @@ #define W25QXXXX_SUBSECTOR_ERASE_MAX_TIME 800 #define W25QXXXX_TIMEOUT_VALUE 1000 -// W25QXX Commands +// W25QXX Commands /* Reset Operations */ #define RESET_ENABLE_CMD 0x66 #define RESET_MEMORY_CMD 0x99 @@ -119,4 +119,4 @@ uint8_t W25Qx_Get_Parameter(W25Qx_Parameter *Para); } #endif -#endif /* __W25QXX_H */ \ No newline at end of file +#endif /* __W25QXX_H */ diff --git a/ports/stm32h7/components/w25qxx/w25qxx_qspi.c b/ports/stm32h7/components/w25qxx/w25qxx_qspi.c index 5cdd23d60..a609d2734 100644 --- a/ports/stm32h7/components/w25qxx/w25qxx_qspi.c +++ b/ports/stm32h7/components/w25qxx/w25qxx_qspi.c @@ -10,7 +10,7 @@ static uint32_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Tim static uint32_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi); static uint32_t QSPI_EnterFourBytesAddress(QSPI_HandleTypeDef *hqspi); -static uint8_t QSPI_Send_CMD(QSPI_HandleTypeDef *hqspi,uint32_t instruction, uint32_t address,uint32_t addressSize,uint32_t dummyCycles, +static uint8_t QSPI_Send_CMD(QSPI_HandleTypeDef *hqspi,uint32_t instruction, uint32_t address,uint32_t addressSize,uint32_t dummyCycles, uint32_t instructionMode,uint32_t addressMode, uint32_t dataMode, uint32_t dataSize); w25qxx_StatusTypeDef w25qxx_Mode = w25qxx_SPIMode; @@ -55,7 +55,7 @@ uint8_t w25qxx_ReadSR(uint8_t SR) if (HAL_QSPI_Receive(&_qspi_flash,&byte,HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { - + } return byte; } @@ -104,7 +104,7 @@ uint8_t w25qxx_EnterQPI(void) { return w25qxx_ERROR; } - + return w25qxx_SetReadParameters(8,8); } @@ -183,19 +183,19 @@ uint8_t W25qxx_EraseBlock(uint32_t BlockAddress) uint8_t W25qxx_EraseChip(void) { uint8_t result; - + W25qxx_WriteEnable(); W25QXX_Wait_Busy(); - + if(w25qxx_Mode == w25qxx_SPIMode) result = QSPI_Send_CMD(&_qspi_flash,W25X_ChipErase,0x00,QSPI_ADDRESS_8_BITS,0,QSPI_INSTRUCTION_1_LINE,QSPI_ADDRESS_NONE,QSPI_DATA_NONE,0); else result = QSPI_Send_CMD(&_qspi_flash,W25X_ChipErase,0x00,QSPI_ADDRESS_8_BITS,0,QSPI_INSTRUCTION_4_LINES,QSPI_ADDRESS_NONE,QSPI_DATA_NONE,0); - + /* 等待擦除完成 */ if(result == w25qxx_OK) W25QXX_Wait_Busy(); - + return result; } @@ -209,21 +209,21 @@ uint8_t W25qxx_EraseChip(void) uint8_t W25qxx_PageProgram(uint8_t *pData, uint32_t WriteAddr, uint32_t Size) { uint8_t result; - + W25qxx_WriteEnable(); - + if(w25qxx_Mode == w25qxx_SPIMode) result = QSPI_Send_CMD(&_qspi_flash,W25X_QUAD_INPUT_PAGE_PROG_CMD,WriteAddr,QSPI_ADDRESS_24_BITS,0,QSPI_INSTRUCTION_1_LINE,QSPI_ADDRESS_1_LINE,QSPI_DATA_4_LINES,Size); else result = QSPI_Send_CMD(&_qspi_flash,W25X_PageProgram,WriteAddr,QSPI_ADDRESS_24_BITS,0,QSPI_INSTRUCTION_4_LINES,QSPI_ADDRESS_4_LINES,QSPI_DATA_4_LINES,Size); - + if(result == w25qxx_OK) result = HAL_QSPI_Transmit(&_qspi_flash,pData,HAL_QPSI_TIMEOUT_DEFAULT_VALUE); - + /* 等待写入完成 */ if(result == w25qxx_OK) W25QXX_Wait_Busy(); - + return result; } @@ -235,24 +235,24 @@ uint8_t W25qxx_PageProgram(uint8_t *pData, uint32_t WriteAddr, uint32_t Size) uint8_t W25qxx_Read(uint8_t *pData, uint32_t ReadAddr, uint32_t Size) { uint8_t result; - + QSPI_CommandTypeDef s_command; /* Configure the command for the read instruction */ - + if(w25qxx_Mode == w25qxx_QPIMode) { s_command.Instruction = W25X_QUAD_INOUT_FAST_READ_CMD; s_command.InstructionMode = QSPI_INSTRUCTION_4_LINES; s_command.DummyCycles = W25X_DUMMY_CYCLES_READ_QUAD; } - else + else { s_command.Instruction = W25X_QUAD_INOUT_FAST_READ_CMD; s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE; s_command.DummyCycles = W25X_DUMMY_CYCLES_READ_QUAD-2; } - + s_command.Address = ReadAddr; s_command.AddressMode = QSPI_ADDRESS_4_LINES; s_command.AddressSize = QSPI_ADDRESS_24_BITS; @@ -261,19 +261,19 @@ uint8_t W25qxx_Read(uint8_t *pData, uint32_t ReadAddr, uint32_t Size) s_command.AlternateBytes = 0xFF; s_command.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS; - s_command.DataMode = QSPI_DATA_4_LINES; + s_command.DataMode = QSPI_DATA_4_LINES; s_command.NbData = Size; - + s_command.DdrMode = QSPI_DDR_MODE_DISABLE; s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY; s_command.SIOOMode = QSPI_SIOO_INST_EVERY_CMD; - + result = HAL_QSPI_Command(&_qspi_flash, &s_command, HAL_QPSI_TIMEOUT_DEFAULT_VALUE); - + if(result == w25qxx_OK) result = HAL_QSPI_Receive(&_qspi_flash,pData,HAL_QPSI_TIMEOUT_DEFAULT_VALUE); - + return result; } @@ -287,7 +287,7 @@ uint8_t W25qxx_Read(uint8_t *pData, uint32_t ReadAddr, uint32_t Size) //CHECK OK void W25qxx_WriteNoCheck(uint8_t *pBuffer,uint32_t WriteAddr,uint32_t NumByteToWrite) { - uint16_t pageremain; + uint16_t pageremain; pageremain = 256 - WriteAddr % 256; //单页剩余的字节数 if (NumByteToWrite <= pageremain) { @@ -392,37 +392,37 @@ static uint32_t QSPI_EnableMemoryMappedMode(QSPI_HandleTypeDef *hqspi,uint8_t DT /* Configure the command for the read instruction */ if(w25qxx_Mode == w25qxx_QPIMode) s_command.InstructionMode = QSPI_INSTRUCTION_4_LINES; - else + else s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE; - + s_command.AddressMode = QSPI_ADDRESS_4_LINES; s_command.Address = 0; s_command.AddressSize = QSPI_ADDRESS_24_BITS; - + s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_4_LINES; s_command.AlternateBytes = 0xEF; s_command.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS; - s_command.DataMode = QSPI_DATA_4_LINES; - + s_command.DataMode = QSPI_DATA_4_LINES; + if(DTRMode == w25qxx_DTRMode) { - s_command.Instruction = W25X_QUAD_INOUT_FAST_READ_DTR_CMD; + s_command.Instruction = W25X_QUAD_INOUT_FAST_READ_DTR_CMD; s_command.DummyCycles = W25X_DUMMY_CYCLES_READ_QUAD_DTR; s_command.DdrMode = QSPI_DDR_MODE_ENABLE; } else { s_command.Instruction = W25X_QUAD_INOUT_FAST_READ_CMD; - + if(w25qxx_Mode == w25qxx_QPIMode) s_command.DummyCycles = W25X_DUMMY_CYCLES_READ_QUAD; else s_command.DummyCycles = W25X_DUMMY_CYCLES_READ_QUAD-2; - + s_command.DdrMode = QSPI_DDR_MODE_DISABLE; } - + s_command.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY; s_command.SIOOMode = QSPI_SIOO_INST_ONLY_FIRST_CMD; @@ -485,7 +485,7 @@ static uint32_t QSPI_ResetDevice(QSPI_HandleTypeDef *hqspi) { return w25qxx_ERROR; } - + w25qxx_Mode = w25qxx_SPIMode; return w25qxx_OK; } @@ -505,27 +505,27 @@ static uint32_t QSPI_ResetDevice(QSPI_HandleTypeDef *hqspi) * @return uint8_t w25qxx_OK:正常 * w25qxx_ERROR:错误 */ -static uint8_t QSPI_Send_CMD(QSPI_HandleTypeDef *hqspi,uint32_t instruction, uint32_t address,uint32_t addressSize,uint32_t dummyCycles, +static uint8_t QSPI_Send_CMD(QSPI_HandleTypeDef *hqspi,uint32_t instruction, uint32_t address,uint32_t addressSize,uint32_t dummyCycles, uint32_t instructionMode,uint32_t addressMode, uint32_t dataMode, uint32_t dataSize) { QSPI_CommandTypeDef Cmdhandler; - Cmdhandler.Instruction = instruction; - Cmdhandler.InstructionMode = instructionMode; - + Cmdhandler.Instruction = instruction; + Cmdhandler.InstructionMode = instructionMode; + Cmdhandler.Address = address; Cmdhandler.AddressSize = addressSize; Cmdhandler.AddressMode = addressMode; - + Cmdhandler.AlternateBytes = 0x00; Cmdhandler.AlternateBytesSize = QSPI_ALTERNATE_BYTES_8_BITS; - Cmdhandler.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE; - Cmdhandler.DummyCycles = dummyCycles; - + Cmdhandler.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE; + Cmdhandler.DummyCycles = dummyCycles; + Cmdhandler.DataMode = dataMode; - Cmdhandler.NbData = dataSize; - - Cmdhandler.DdrMode = QSPI_DDR_MODE_DISABLE; + Cmdhandler.NbData = dataSize; + + Cmdhandler.DdrMode = QSPI_DDR_MODE_DISABLE; Cmdhandler.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY; Cmdhandler.SIOOMode = QSPI_SIOO_INST_EVERY_CMD; @@ -589,7 +589,7 @@ static uint32_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi) /* Enable write operations */ if(w25qxx_Mode == w25qxx_QPIMode) s_command.InstructionMode = QSPI_INSTRUCTION_4_LINES; - else + else s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE; s_command.Instruction = W25X_WriteEnable; @@ -615,12 +615,12 @@ static uint32_t QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi) s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE; s_command.Instruction = W25X_ReadStatusReg1; - + if(w25qxx_Mode == w25qxx_QPIMode) s_command.DataMode = QSPI_DATA_4_LINES; - else + else s_command.DataMode = QSPI_DATA_1_LINE; - + if (HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { return w25qxx_ERROR; @@ -641,19 +641,19 @@ static uint32_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Tim QSPI_AutoPollingTypeDef s_config; /* Configure automatic polling mode to wait for memory ready */ - + if(w25qxx_Mode == w25qxx_SPIMode) s_command.InstructionMode = QSPI_INSTRUCTION_1_LINE; else s_command.InstructionMode = QSPI_INSTRUCTION_4_LINES; - + s_command.Instruction = W25X_ReadStatusReg1; - + s_command.AddressMode = QSPI_ADDRESS_NONE; s_command.Address = 0x00; s_command.AddressSize = QSPI_ADDRESS_8_BITS; s_command.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE; - + if(w25qxx_Mode == w25qxx_SPIMode) s_command.DataMode = QSPI_DATA_1_LINE; else @@ -669,14 +669,14 @@ static uint32_t QSPI_AutoPollingMemReady(QSPI_HandleTypeDef *hqspi, uint32_t Tim s_config.Interval = 0x10; s_config.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE; s_config.StatusBytesSize = 1; - + return HAL_QSPI_AutoPolling(hqspi, &s_command, &s_config, Timeout); } /** * @brief This function enter the QSPI memory in QPI mode - * @param hqspi QSPI handle + * @param hqspi QSPI handle * @retval QSPI status */ static uint8_t QSPI_EnterQPI(QSPI_HandleTypeDef *hqspi) @@ -690,14 +690,14 @@ static uint8_t QSPI_EnterQPI(QSPI_HandleTypeDef *hqspi) w25qxx_WriteSR(W25X_WriteStatusReg2,stareg2); } QSPI_Send_CMD(hqspi,W25X_EnterQSPIMode,0x00,QSPI_ADDRESS_8_BITS,0,QSPI_INSTRUCTION_1_LINE,QSPI_ADDRESS_NONE,QSPI_DATA_NONE,0); - + /* Configure automatic polling mode to wait the memory is ready */ if (QSPI_AutoPollingMemReady(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != w25qxx_OK) { return w25qxx_ERROR; } - + w25qxx_Mode = w25qxx_QPIMode; - + return w25qxx_OK; -} \ No newline at end of file +} diff --git a/ports/stm32h7/components/w25qxx/w25qxx_qspi.h b/ports/stm32h7/components/w25qxx/w25qxx_qspi.h index 7612ba92e..57c63e4d7 100644 --- a/ports/stm32h7/components/w25qxx/w25qxx_qspi.h +++ b/ports/stm32h7/components/w25qxx/w25qxx_qspi.h @@ -23,29 +23,29 @@ typedef enum } w25qxx_StatusTypeDef; /* =============== W25Qxx CMD ================ */ -#define W25X_WriteEnable 0x06 -#define W25X_WriteDisable 0x04 -#define W25X_ReadStatusReg1 0x05 -#define W25X_ReadStatusReg2 0x35 -#define W25X_ReadStatusReg3 0x15 -#define W25X_WriteStatusReg1 0x01 -#define W25X_WriteStatusReg2 0x31 -#define W25X_WriteStatusReg3 0x11 -#define W25X_ReadData 0x03 -#define W25X_FastReadData 0x0B -#define W25X_FastReadDual 0x3B -#define W25X_PageProgram 0x02 -#define W25X_BlockErase 0xD8 -#define W25X_SectorErase 0x20 -#define W25X_ChipErase 0xC7 -#define W25X_PowerDown 0xB9 -#define W25X_ReleasePowerDown 0xAB -#define W25X_DeviceID 0xAB -#define W25X_ManufactDeviceID 0x90 -#define W25X_JedecDeviceID 0x9F +#define W25X_WriteEnable 0x06 +#define W25X_WriteDisable 0x04 +#define W25X_ReadStatusReg1 0x05 +#define W25X_ReadStatusReg2 0x35 +#define W25X_ReadStatusReg3 0x15 +#define W25X_WriteStatusReg1 0x01 +#define W25X_WriteStatusReg2 0x31 +#define W25X_WriteStatusReg3 0x11 +#define W25X_ReadData 0x03 +#define W25X_FastReadData 0x0B +#define W25X_FastReadDual 0x3B +#define W25X_PageProgram 0x02 +#define W25X_BlockErase 0xD8 +#define W25X_SectorErase 0x20 +#define W25X_ChipErase 0xC7 +#define W25X_PowerDown 0xB9 +#define W25X_ReleasePowerDown 0xAB +#define W25X_DeviceID 0xAB +#define W25X_ManufactDeviceID 0x90 +#define W25X_JedecDeviceID 0x9F #define W25X_Enable4ByteAddr 0xB7 #define W25X_Exit4ByteAddr 0xE9 -#define W25X_SetReadParam 0xC0 +#define W25X_SetReadParam 0xC0 #define W25X_EnterQSPIMode 0x38 #define W25X_ExitQSPIMode 0xFF @@ -97,4 +97,4 @@ uint8_t W25qxx_Write(uint8_t* pBuffer, uint32_t WriteAddr, uint16_t NumByteT } #endif -#endif \ No newline at end of file +#endif diff --git a/ports/stm32h7/linker/common.ld b/ports/stm32h7/linker/common.ld index 1d1512a5c..d0bafed5d 100644 --- a/ports/stm32h7/linker/common.ld +++ b/ports/stm32h7/linker/common.ld @@ -7,7 +7,7 @@ _Min_Stack_Size = 0x4000; /* Stack */ HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : _Min_Heap_Size; STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : _Min_Stack_Size; -/* Initialze stack on end of memory */ +/* Initialize stack on end of memory */ _estack = ORIGIN(RAM) + LENGTH(RAM); /* Generate a link error if heap and stack don't fit into RAM */ _stack_limit = _estack - STACK_SIZE; @@ -89,7 +89,7 @@ SECTIONS _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -100,12 +100,12 @@ SECTIONS _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) @@ -138,4 +138,4 @@ SECTIONS } .ARM.attributes 0 : { *(.ARM.attributes) } -} \ No newline at end of file +} diff --git a/ports/stm32h7/linker/memory.ld b/ports/stm32h7/linker/memory.ld index 1a08cbf88..95b35edb9 100644 --- a/ports/stm32h7/linker/memory.ld +++ b/ports/stm32h7/linker/memory.ld @@ -1,8 +1,8 @@ -/* Need atleast 12 bytes of noinit memory */ +/* Need at least 12 bytes of noinit memory */ /* _board_dfu_dbl_tap - 4 bytes */ /* _board_tmp_boot_addr - 4 bytes */ /* _board_tmp_boot_magic - 4 bytes */ -ASSERT(_noinit_size >= 0xC, "Need atleast 12 bytes of no-init") +ASSERT(_noinit_size >= 0xC, "Need at least 12 bytes of no-init") MEMORY { diff --git a/ports/stm32h7/port.mk b/ports/stm32h7/port.mk index 4000cb580..bd0f4fa22 100644 --- a/ports/stm32h7/port.mk +++ b/ports/stm32h7/port.mk @@ -1,6 +1,6 @@ include $(TOP)/$(PORT_DIR)/boards/$(BOARD)/board.mk -UF2_FAMILY_ID = 0x6db66082 +UF2_FAMILY_ID = 0x6db66082 CROSS_COMPILE = arm-none-eabi- ST_HAL_DRIVER = lib/st/stm32h7xx_hal_driver diff --git a/ports/stm32h7/stm32h7xx_hal_conf.h b/ports/stm32h7/stm32h7xx_hal_conf.h index d6a574bac..4f9f65f8f 100644 --- a/ports/stm32h7/stm32h7xx_hal_conf.h +++ b/ports/stm32h7/stm32h7xx_hal_conf.h @@ -172,7 +172,7 @@ #define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ #define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ #define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ -#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ #define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ #define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ #define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ @@ -182,7 +182,7 @@ #define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */ #define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ #define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ -#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ #define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ #define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ #define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ diff --git a/ports/stm32l4/boards.c b/ports/stm32l4/boards.c index deb42fff3..d85c9ca59 100644 --- a/ports/stm32l4/boards.c +++ b/ports/stm32l4/boards.c @@ -106,7 +106,7 @@ void board_dfu_init(void) #ifdef PWR_CR2_USV HAL_PWREx_EnableVddUSB(); #endif - + GPIO_InitTypeDef GPIO_InitStruct; // USB Pin Init @@ -294,7 +294,7 @@ void board_rgb_write(uint8_t const rgb[]) { uint32_t start; uint32_t cyc; - // Enable DWT in debug core. Useable when interrupts disabled, as opposed to + // Enable DWT in debug core. Usable when interrupts disabled, as opposed to // Systick->VAL CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; diff --git a/ports/stm32l4/boards.h b/ports/stm32l4/boards.h index 913e817e0..f98754101 100644 --- a/ports/stm32l4/boards.h +++ b/ports/stm32l4/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/stm32l4/linker/stm32l4.ld b/ports/stm32l4/linker/stm32l4.ld index 3bc670c87..792e26a38 100644 --- a/ports/stm32l4/linker/stm32l4.ld +++ b/ports/stm32l4/linker/stm32l4.ld @@ -112,19 +112,19 @@ SECTIONS KEEP (*(.fini_array*)) PROVIDE_HIDDEN (__fini_array_end = .); } >FLASH - + /* CF2 config */ . = ORIGIN(CONFIG); - .config : + .config : { KEEP (*(.config)) - } >CONFIG + } >CONFIG /* used by the startup to initialize data */ _sidata = LOADADDR(.data); /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : + .data : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ @@ -134,12 +134,12 @@ SECTIONS . = ALIGN(4); _edata = .; /* define a global symbol at data end */ } >RAM AT> FLASH - + /* Uninitialized data section */ . = ALIGN(4); .bss : { - /* This is used by the startup in order to initialize the .bss secion */ + /* This is used by the startup in order to initialize the .bss section */ _sbss = .; /* define a global symbol at bss start */ __bss_start__ = _sbss; *(.bss) @@ -162,7 +162,7 @@ SECTIONS . = ALIGN(8); } >RAM - + /* Remove information from the standard libraries */ /DISCARD/ : diff --git a/ports/template_port/boards.h b/ports/template_port/boards.h index 758043a5a..8a0edf69b 100644 --- a/ports/template_port/boards.h +++ b/ports/template_port/boards.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2020 Ha Thach (tinyusb.org) for Adafruit Industries diff --git a/ports/test_ghostfat/CMakeLists.txt b/ports/test_ghostfat/CMakeLists.txt index c65e49c6f..0cd2bb80a 100644 --- a/ports/test_ghostfat/CMakeLists.txt +++ b/ports/test_ghostfat/CMakeLists.txt @@ -43,4 +43,4 @@ add_custom_target(mk-knowngood COMMAND gzip ${CMAKE_BINARY_DIR}/knowngood.img COMMAND gzip --force --best ${CMAKE_BINARY_DIR}/knowngood.img.gz COMMAND ${CMAKE_COMMAND} -E copy ${CMAKE_BINARY_DIR}/knowngood.img.gz.gz ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/knowngood.img.gz.gz - ) \ No newline at end of file + ) diff --git a/ports/test_ghostfat/Makefile b/ports/test_ghostfat/Makefile index cd9fa2769..fe88f0d99 100644 --- a/ports/test_ghostfat/Makefile +++ b/ports/test_ghostfat/Makefile @@ -3,7 +3,7 @@ UF2_FAMILY_ID = 0x00000000 # This should *NOT* cross-compile, because the goal is to run the # resulting executable on the build machine, as a method of validating # the generated ghostfat image. -CROSS_COMPILE = +CROSS_COMPILE = # List of git submodules that is included as part of the UF2 version GIT_VERSION = 0.0.0-selftest diff --git a/ports/test_ghostfat/boards/4k/board.cmake b/ports/test_ghostfat/boards/4k/board.cmake index 948015829..428f36c4f 100644 --- a/ports/test_ghostfat/boards/4k/board.cmake +++ b/ports/test_ghostfat/boards/4k/board.cmake @@ -2,4 +2,4 @@ function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC CFG_UF2_SECTORS_PER_CLUSTER=8 ) -endfunction() \ No newline at end of file +endfunction() diff --git a/ports/test_ghostfat/main.c b/ports/test_ghostfat/main.c index 2e82c6b3e..5034d450f 100644 --- a/ports/test_ghostfat/main.c +++ b/ports/test_ghostfat/main.c @@ -9,7 +9,7 @@ #error "Reproducible build requirement - COMPILE_TIME" #endif -// If the sector size changes, such as to support 4kn sectors in the generated FAT filesystem, +// If the sector size changes, such as to support 4kn sectors in the generated FAT filesystem, // then this will need to change also. #define GHOSTFAT_SECTOR_SIZE 512 @@ -291,7 +291,7 @@ int CompareDiskImages(void) { i, fileOffset ); // once get to mismatched INFO_UF2.TXT files, - // cannot later have mismatched directory entries + // cannot later have mismatched directory entries mismatchedDirectoryEntry = -2; mismatchedInfoUF2Contents = i; } else { @@ -371,7 +371,3 @@ int main(void) printf("FAIL: (%d) %s\n", r, GetErrorString(r)); return r; } - - - - diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt deleted file mode 100644 index 489b33423..000000000 --- a/src/CMakeLists.txt +++ /dev/null @@ -1,18 +0,0 @@ -idf_component_register(SRCS ghostfat.c images.c main.c msc.c screen.c usb_descriptors.c - INCLUDE_DIRS "." "favicon" - REQUIRES boards) - -target_sources(${COMPONENT_TARGET} PUBLIC - "${TOP}/lib/tinyusb/src/tusb.c" - "${TOP}/lib/tinyusb/src/common/tusb_fifo.c" - "${TOP}/lib/tinyusb/src/device/usbd.c" - "${TOP}/lib/tinyusb/src/device/usbd_control.c" - "${TOP}/lib/tinyusb/src/class/cdc/cdc_device.c" - "${TOP}/lib/tinyusb/src/class/dfu/dfu_rt_device.c" - "${TOP}/lib/tinyusb/src/class/hid/hid_device.c" - "${TOP}/lib/tinyusb/src/class/midi/midi_device.c" - "${TOP}/lib/tinyusb/src/class/msc/msc_device.c" - "${TOP}/lib/tinyusb/src/class/usbtmc/usbtmc_device.c" - "${TOP}/lib/tinyusb/src/class/vendor/vendor_device.c" - "${TOP}/lib/tinyusb/src/portable/espressif/esp32sx/dcd_esp32sx.c" -) \ No newline at end of file diff --git a/src/board_api.h b/src/board_api.h index 11b654734..6e6969393 100644 --- a/src/board_api.h +++ b/src/board_api.h @@ -98,7 +98,7 @@ void board_init2(void) __attribute__ ((weak)); // TODO force this API in the future void board_teardown(void) __attribute__ ((weak)); -// board_teardown2() is called immeidately after board_init() +// board_teardown2() is called immediately after board_init() void board_teardown2(void) __attribute__ ((weak)); // Reset board, not return @@ -172,7 +172,7 @@ void board_flash_erase_app(void); bool board_flash_protect_bootloader(bool protect); //--------------------------------------------------------------------+ -// Dispaly API +// Display API //--------------------------------------------------------------------+ #if TINYUF2_DISPLAY diff --git a/src/compile_date.h b/src/compile_date.h index cd024bef4..a3600c8c0 100644 --- a/src/compile_date.h +++ b/src/compile_date.h @@ -63,7 +63,7 @@ ) // __TIME__ expands to an eight-character string constant -// "23:59:01", or (if cannot determine time) "??:??:??" +// "23:59:01", or (if cannot determine time) "??:??:??" #define COMPILE_HOUR_INT ( \ (COMPILE_TIME [0u] == '?' ? 0 : COMPILE_TIME [0u] - '0') * 10u \ + (COMPILE_TIME [1u] == '?' ? 0 : COMPILE_TIME [1u] - '0') ) @@ -88,4 +88,3 @@ ( COMPILE_SECONDS_INT << 0u) ) #endif // COMPILE_DATE_H - diff --git a/src/favicon/favicon_adafruit_256.h b/src/favicon/favicon_adafruit_256.h index 86da7c50a..6108fe8d6 100644 --- a/src/favicon/favicon_adafruit_256.h +++ b/src/favicon/favicon_adafruit_256.h @@ -3,488 +3,488 @@ const unsigned long favicon_len = 7705; const unsigned char favicon_data[] __attribute__((aligned(16))) = { -0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x20, 0x00, 0x03, 0x1e, -0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x89, 0x50, 0x4e, 0x47, 0x0d, 0x0a, 0x1a, 0x0a, 0x00, 0x00, -0x00, 0x0d, 0x49, 0x48, 0x44, 0x52, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x08, 0x04, -0x00, 0x00, 0x00, 0xf6, 0x7b, 0x60, 0xed, 0x00, 0x00, 0x1d, 0xca, 0x49, 0x44, 0x41, 0x54, 0x78, -0xda, 0xed, 0x9d, 0x77, 0x7c, 0x95, 0xd5, 0xdd, 0xc0, 0xbf, 0xf7, 0x66, 0xef, 0x84, 0x24, 0x8c, -0x10, 0x32, 0x20, 0x0c, 0x09, 0x33, 0x40, 0x00, 0x95, 0xe1, 0xc2, 0x89, 0x82, 0x56, 0xaa, 0x6f, -0xa5, 0x56, 0x41, 0xab, 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//--------------------------------------------------------------------+ -// ota0 partition size +// ota0 partition size static uint32_t _flash_size; #define STATIC_ASSERT(_exp) _Static_assert(_exp, "static assert failed") @@ -367,7 +367,7 @@ void uf2_read_block (uint32_t block_no, uint8_t *data) // EXCEPTIONS: // 1. Clusters 0 and 1 require special handling // 2. Final cluster of each file must be set to END_OF_CHAIN - // + // // Set default FAT values first. for (uint16_t i = 0; i < FAT_ENTRIES_PER_SECTOR; i++) @@ -461,7 +461,7 @@ void uf2_read_block (uint32_t block_no, uint8_t *data) FileContent_t const * inf = &info[fid]; uint32_t fileRelativeSector = sectionRelativeSector - (info[fid].cluster_start-2) * BPB_SECTORS_PER_CLUSTER; - + if ( fid != FID_UF2 ) { // Handle all files other than CURRENT.UF2 diff --git a/src/images.c b/src/images.c index ad25a816c..2a7512648 100644 --- a/src/images.c +++ b/src/images.c @@ -19,100 +19,100 @@ const uint8_t arrowLogo[] = { }; const uint8_t font8[] = { -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x5e, 0x00, 0x00, 0x00, -0x00, 0x0e, 0x00, 0x0e, 0x00, 0x00, -0x28, 0xfe, 0x28, 0xfe, 0x28, 0x00, -0x4c, 0x92, 0xff, 0x92, 0x64, 0x00, -0x02, 0x65, 0x12, 0x48, 0xa6, 0x40, -0x6c, 0x92, 0x92, 0x6c, 0xa0, 0x00, -0x00, 0x00, 0x0e, 0x00, 0x00, 0x00, -0x00, 0x00, 0x7c, 0x82, 0x00, 0x00, -0x00, 0x00, 0x82, 0x7c, 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0x3c, 0x00, -0x00, 0x7e, 0x4a, 0x4a, 0x42, 0x00, -0x00, 0x7e, 0x0a, 0x0a, 0x02, 0x00, -0x00, 0x3c, 0x42, 0x52, 0x34, 0x00, -0x00, 0x7e, 0x08, 0x08, 0x7e, 0x00, -0x00, 0x42, 0x7e, 0x42, 0x00, 0x00, -0x20, 0x40, 0x42, 0x3e, 0x02, 0x00, -0x00, 0x7e, 0x08, 0x14, 0x62, 0x00, -0x00, 0x7e, 0x40, 0x40, 0x40, 0x00, -0x7e, 0x04, 0x18, 0x04, 0x7e, 0x00, -0x00, 0x7e, 0x04, 0x08, 0x7e, 0x00, -0x3c, 0x42, 0x42, 0x42, 0x3c, 0x00, -0x00, 0x7e, 0x12, 0x12, 0x0c, 0x00, -0x00, 0x3c, 0x52, 0x62, 0xbc, 0x00, -0x00, 0x7e, 0x12, 0x12, 0x6c, 0x00, -0x00, 0x24, 0x4a, 0x52, 0x24, 0x00, -0x02, 0x02, 0x7e, 0x02, 0x02, 0x00, -0x00, 0x3e, 0x40, 0x40, 0x3e, 0x00, -0x00, 0x1e, 0x70, 0x70, 0x1e, 0x00, -0x7e, 0x20, 0x18, 0x20, 0x7e, 0x00, -0x42, 0x24, 0x18, 0x24, 0x42, 0x00, -0x06, 0x08, 0x70, 0x08, 0x06, 0x00, -0x00, 0x62, 0x52, 0x4a, 0x46, 0x00, -0x00, 0x7e, 0x42, 0x42, 0x00, 0x00, -0x00, 0x06, 0x08, 0x10, 0x60, 0x00, -0x00, 0x42, 0x42, 0x7e, 0x00, 0x00, -0x08, 0x04, 0x02, 0x04, 0x08, 0x00, -0x80, 0x80, 0x80, 0x80, 0x80, 0x00, -0x00, 0x00, 0x02, 0x04, 0x00, 0x00, -0x00, 0x30, 0x48, 0x48, 0x78, 0x00, -0x00, 0x7e, 0x48, 0x48, 0x30, 0x00, -0x00, 0x30, 0x48, 0x48, 0x48, 0x00, -0x00, 0x30, 0x48, 0x48, 0x7e, 0x00, -0x00, 0x30, 0x68, 0x58, 0x50, 0x00, -0x00, 0x10, 0x7c, 0x12, 0x04, 0x00, -0x00, 0x18, 0xa4, 0xa4, 0x78, 0x00, -0x00, 0x7e, 0x08, 0x08, 0x70, 0x00, -0x00, 0x48, 0x7a, 0x40, 0x00, 0x00, -0x00, 0x40, 0x84, 0x7d, 0x00, 0x00, -0x00, 0x7e, 0x10, 0x28, 0x40, 0x00, -0x00, 0x42, 0x7e, 0x40, 0x00, 0x00, -0x78, 0x08, 0x30, 0x08, 0x70, 0x00, -0x00, 0x78, 0x08, 0x08, 0x70, 0x00, -0x00, 0x30, 0x48, 0x48, 0x30, 0x00, -0x00, 0xfc, 0x24, 0x24, 0x18, 0x00, -0x00, 0x18, 0x24, 0x24, 0xfc, 0x00, -0x00, 0x78, 0x10, 0x08, 0x10, 0x00, -0x00, 0x50, 0x58, 0x68, 0x28, 0x00, -0x00, 0x08, 0x3e, 0x48, 0x20, 0x00, -0x00, 0x38, 0x40, 0x40, 0x78, 0x00, -0x00, 0x18, 0x60, 0x60, 0x18, 0x00, -0x38, 0x40, 0x30, 0x40, 0x38, 0x00, -0x00, 0x48, 0x30, 0x30, 0x48, 0x00, -0x00, 0x5c, 0xa0, 0xa0, 0x7c, 0x00, -0x00, 0x48, 0x68, 0x58, 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b/src/tinyuf2.cmake index d9ff46bc0..233d7efb7 100644 --- a/src/tinyuf2.cmake +++ b/src/tinyuf2.cmake @@ -36,4 +36,4 @@ function (add_tinyuf2 TARGET) UF2_VERSION_BASE="${GIT_VERSION}" UF2_VERSION="${GIT_VERSION} - ${GIT_SUBMODULE_VERSIONS}" ) -endfunction() \ No newline at end of file +endfunction() diff --git a/src/usb_descriptors.c b/src/usb_descriptors.c index 95d4d8bdc..26c99c1de 100644 --- a/src/usb_descriptors.c +++ b/src/usb_descriptors.c @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) diff --git a/tools/codespell/exclude-file.txt b/tools/codespell/exclude-file.txt new file mode 100644 index 000000000..e69de29bb diff --git a/tools/codespell/ignore-words.txt b/tools/codespell/ignore-words.txt new file mode 100644 index 000000000..c997ec0ab --- /dev/null +++ b/tools/codespell/ignore-words.txt @@ -0,0 +1,14 @@ +synopsys +sie +tre +thre +hsi +fro +dout +mot +te +attch +endianess +pris +busses +linar