| Topic | Description |
| What are Variable-Size Signals? | All you need to know about Variable-Size Signals in Simulink. |
| How to properly set the Signal Size property on AI Engine kernel blocks with stream or cascade outputs? | Setting the signal size property for AI Engine kernels with stream and cascade outputs. |
| Connecting AI Engine blocks with HDL blocks | Setting the properties of the AIE to HDL and HDL to AIE blocks can be tricky. This tutorial explains how to set these parameters. |
| Debugging C/C++ Source Code | This guide will show how to debug C/C++ source code (AI Engine or HLS kernels) that has been imported into a Vitis Model Composer model. |
| Monitoring Cascade Signals | When monitoring cascade signals in an AI Engine design, not all of the samples displayed may be valid. Read this Quick Guide to learn why this is and how to determine which samples are valid. |
| Running on Hardware | Follow these instructions to move the Validate on Hardware baremetal or SD card image into the hardware and run the application. |