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chore: fpga22: add u280 floorplan directive
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+384
-2
lines changed

2 files changed

+384
-2
lines changed

‎CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -31,10 +31,9 @@ find_package(SDx)
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if(SDx_FOUND)
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add_tapa_target(
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sssp-hw-xo
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--enable-synth-util
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INPUT src/sssp.cpp
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TOP SSSP
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CONNECTIVITY ${CMAKE_CURRENT_SOURCE_DIR}/link_config.ini
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DIRECTIVE ${CMAKE_CURRENT_SOURCE_DIR}/directive.json
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CONSTRAINT ${CMAKE_CURRENT_BINARY_DIR}/constraint.tcl
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CLOCK_PERIOD 6.250
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PLATFORM xilinx_u280_xdma_201920_3)

‎directive.json

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,383 @@
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{
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"pblock_X0Y4_X3Y7": [
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"CgpqBucketGen_0",
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"CgpqBucketGen_1",
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"CgpqBucketGen_2",
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"CgpqBucketGen_3",
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"CgpqBucketGen_4",
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"CgpqBucketGen_5",
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"CgpqBucketGen_6",
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"CgpqBucketGen_7",
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"CgpqBucketGen_8",
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"CgpqBucketGen_9",
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"CgpqBucketGen_10",
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"CgpqBucketGen_11",
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"CgpqBucketGen_12",
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"CgpqBucketGen_13",
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"CgpqBucketGen_14",
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"CgpqBucketGen_15",
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"CgpqDuplicateDone_0",
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"CgpqHeap_9",
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"CgpqHeap_11",
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"CgpqHeap_13",
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"CgpqHeap_14",
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"CgpqHeap_15",
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"CgpqPushAdapter_0",
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"CgpqSwitchDemux_0",
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"CgpqSwitchDemux_1",
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"CgpqSwitchDemux_2",
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"CgpqSwitchDemux_3",
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"CgpqSwitchDemux_4",
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"CgpqSwitchDemux_5",
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"CgpqSwitchDemux_6",
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"CgpqSwitchDemux_7",
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"CgpqSwitchDemux_8",
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"CgpqSwitchDemux_9",
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"CgpqSwitchDemux_10",
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"CgpqSwitchDemux_11",
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"CgpqSwitchDemux_12",
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"CgpqSwitchDemux_13",
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"CgpqSwitchDemux_14",
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"CgpqSwitchDemux_15",
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"CgpqSwitchMux_0",
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"CgpqSwitchMux_1",
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"CgpqSwitchMux_2",
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"CgpqSwitchMux_3",
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"CgpqSwitchMux_4",
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"CgpqSwitchMux_5",
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"CgpqSwitchMux_6",
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"CgpqSwitchMux_7",
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"CgpqSwitchMux_8",
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"CgpqSwitchMux_9",
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"CgpqSwitchMux_10",
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"CgpqSwitchMux_11",
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"CgpqSwitchMux_12",
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"CgpqSwitchMux_13",
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"CgpqSwitchMux_14",
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"CgpqSwitchMux_15",
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"CgpqSwitchStage_0",
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"CgpqSwitchStage_1",
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"CgpqSwitchStage_2",
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"CgpqSwitchStage_3",
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"CgpqSwitchStage_4",
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"CgpqSwitchStage_5",
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"CgpqSwitchStage_6",
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"CgpqSwitchStage_7",
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"VertexCache_9",
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"VertexCache_10",
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"VertexCache_15",
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{
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"pblock_X4Y4_X7Y7": [],
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"pblock_X4Y8_X7Y11": [
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"pblock_X0Y8_X3Y11"
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],
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"pblock_X4Y0_X7Y3": [
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"pblock_X0Y0_X3Y3"
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],
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"pblock_X0Y8_X3Y11": [],
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"pblock_X0Y0_X3Y3": [],
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"tcl": "\ncreate_pblock pblock_X0Y4_X3Y7\nresize_pblock pblock_X0Y4_X3Y7 -add CLOCKREGION_X0Y4:CLOCKREGION_X3Y7\nresize_pblock pblock_X0Y4_X3Y7 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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],
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"pblock_X4Y8_X7Y11": [
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"CgpqCore_0",
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"CgpqCore_1",
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"CgpqCore_2",
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"CgpqCore_3",
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"CgpqCore_4",
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"CgpqCore_5",
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"CgpqCore_6",
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"CgpqCore_7",
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"CgpqCore_10",
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"CgpqHeap_0",
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"CgpqHeap_1",
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"CgpqHeap_2",
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"CgpqHeap_3",
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"CgpqHeap_4",
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"CgpqHeap_5",
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"CgpqHeap_6",
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"CgpqHeap_7",
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"CgpqHeap_8",
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"CgpqHeap_10",
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"CgpqHeap_12",
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"CgpqMinBucketFinder_0",
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"CgpqOutputArbiter_0",
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"CgpqReadAddrArbiter_0",
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"CgpqReadDataArbiter_0",
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"CgpqStatArbiter_0",
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"CgpqWriteReqArbiter_0",
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"CgpqWriteRespArbiter_0",
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{
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"pblock_X0Y8_X3Y11": [],
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"pblock_X0Y4_X3Y7": [
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"pblock_X4Y4_X7Y7"
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],
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"pblock_X0Y0_X3Y3": [
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"pblock_X4Y4_X7Y7",
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"pblock_X4Y0_X7Y3"
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],
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"pblock_X4Y4_X7Y7": [],
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"pblock_X4Y0_X7Y3": [
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"pblock_X4Y4_X7Y7"
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],
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"tcl": "\ncreate_pblock pblock_X4Y8_X7Y11\nresize_pblock pblock_X4Y8_X7Y11 -add CLOCKREGION_X4Y8:CLOCKREGION_X7Y11\nresize_pblock pblock_X4Y8_X7Y11 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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],
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"pblock_X0Y8_X3Y11": [
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"CgpqCore_8",
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"CgpqCore_9",
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"CgpqCore_11",
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"CgpqCore_12",
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"CgpqCore_13",
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"CgpqCore_14",
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"CgpqCore_15",
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"CgpqReadAddrArbiter_1",
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"CgpqReadDataArbiter_1",
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"CgpqWriteReqArbiter_1",
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"CgpqWriteRespArbiter_1",
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{
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"pblock_X4Y8_X7Y11": [],
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"pblock_X4Y4_X7Y7": [
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"pblock_X0Y4_X3Y7"
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],
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"pblock_X4Y0_X7Y3": [
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"pblock_X0Y4_X3Y7",
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"pblock_X0Y0_X3Y3"
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],
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"pblock_X0Y4_X3Y7": [],
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"pblock_X0Y0_X3Y3": [
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"pblock_X0Y4_X3Y7"
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],
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"tcl": "\ncreate_pblock pblock_X0Y8_X3Y11\nresize_pblock pblock_X0Y8_X3Y11 -add CLOCKREGION_X0Y8:CLOCKREGION_X3Y11\nresize_pblock pblock_X0Y8_X3Y11 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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],
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"pblock_X4Y4_X7Y7": [
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"CgpqPopAdapter_0",
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"PopSwitchStage_0",
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"PopSwitchStage_1",
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"PopSwitchStage_2",
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"PopSwitchStage_3",
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"PopSwitchStage_4",
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"PopSwitchStage_5",
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"PopSwitchStage_6",
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"PopSwitchStage_7",
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"SwitchDemux_0",
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"SwitchDemux_1",
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"SwitchDemux_2",
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"SwitchDemux_3",
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"SwitchDemux_4",
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"SwitchDemux_5",
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"SwitchDemux_6",
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"SwitchDemux_7",
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"SwitchDemux_8",
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"SwitchDemux_9",
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"SwitchDemux_10",
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"SwitchDemux_11",
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"SwitchDemux_12",
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"SwitchDemux_13",
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"SwitchDemux_14",
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"SwitchDemux_15",
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"SwitchMux_0",
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"SwitchMux_1",
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"SwitchMux_2",
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"SwitchMux_3",
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"SwitchMux_4",
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"SwitchMux_5",
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"SwitchMux_6",
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"SwitchMux_7",
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"SwitchMux_8",
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"SwitchMux_9",
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"SwitchMux_10",
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"SwitchMux_11",
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"SwitchMux_12",
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"SwitchMux_13",
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"SwitchMux_14",
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"SwitchMux_15",
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"VertexCache_1",
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"VertexCache_2",
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"VertexCache_4",
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"VertexCache_6",
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"VertexCache_13",
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{
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"pblock_X0Y4_X3Y7": [],
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"pblock_X0Y8_X3Y11": [
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"pblock_X4Y8_X7Y11"
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],
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"pblock_X0Y0_X3Y3": [
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"pblock_X4Y0_X7Y3"
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],
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"pblock_X4Y8_X7Y11": [],
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"pblock_X4Y0_X7Y3": [],
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"tcl": "\ncreate_pblock pblock_X4Y4_X7Y7\nresize_pblock pblock_X4Y4_X7Y7 -add CLOCKREGION_X4Y4:CLOCKREGION_X7Y7\nresize_pblock pblock_X4Y4_X7Y7 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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],
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"pblock_X4Y0_X7Y3": [
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"CgpqSpillMem_0",
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"CgpqSpillMem_1",
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"Dispatcher_0",
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"DistGen_0",
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"DistGen_1",
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"DistGen_2",
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"DistGen_3",
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"EdgeMem_0",
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"EdgeMem_1",
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"EdgeMem_2",
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"EdgeMem_3",
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"EdgeReqGen_0",
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"EdgeReqGen_1",
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"EdgeReqGen_2",
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"EdgeReqGen_3",
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"EdgeReqGen_4",
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"EdgeReqGen_5",
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"EdgeReqGen_6",
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"EdgeReqGen_7",
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"TaskArbiter_0",
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"TaskCountMerger_0",
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"VertexCache_0",
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"VertexCache_3",
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"VertexCache_5",
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"VertexCache_7",
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"VertexCache_11",
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"VertexMem_0",
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"VertexMem_1",
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"VertexMem_2",
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"VertexMem_3",
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"VertexMem_4",
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"VertexMem_5",
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"VertexMem_6",
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"VertexMem_7",
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"VertexNoopMerger_0",
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"VertexOutputAdapter_0",
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"VertexOutputArbiter_0",
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"VertexOutputArbiter_1",
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"VertexOutputArbiter_2",
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"VertexOutputArbiter_3",
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"VertexOutputArbiter_4",
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"VertexOutputArbiter_5",
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"VertexOutputArbiter_6",
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"VertexOutputArbiter_7",
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"cgpq_spill_0__m_axi",
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"cgpq_spill_1__m_axi",
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"edges_0__m_axi",
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"edges_1__m_axi",
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"edges_2__m_axi",
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"edges_3__m_axi",
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"vertices_0__m_axi",
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"vertices_1__m_axi",
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"vertices_2__m_axi",
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"vertices_3__m_axi",
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"vertices_4__m_axi",
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"vertices_5__m_axi",
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"vertices_6__m_axi",
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"vertices_7__m_axi",
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{
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"pblock_X0Y0_X3Y3": [],
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"pblock_X0Y4_X3Y7": [
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"pblock_X4Y4_X7Y7"
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],
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"pblock_X0Y8_X3Y11": [
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"pblock_X4Y4_X7Y7",
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"pblock_X4Y8_X7Y11"
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],
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"pblock_X4Y4_X7Y7": [],
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"pblock_X4Y8_X7Y11": [
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"pblock_X4Y4_X7Y7"
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],
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"tcl": "\ncreate_pblock pblock_X4Y0_X7Y3\nresize_pblock pblock_X4Y0_X7Y3 -add CLOCKREGION_X4Y0:CLOCKREGION_X7Y3\nresize_pblock pblock_X4Y0_X7Y3 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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],
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"pblock_X0Y0_X3Y3": [
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"CgpqSpillMem_2",
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"CgpqSpillMem_3",
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"DistGen_4",
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"DistGen_5",
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"DistGen_6",
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"DistGen_7",
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"EdgeMem_4",
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"EdgeMem_5",
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"EdgeMem_6",
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"EdgeMem_7",
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"PushAdapter_0",
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"SwitchDemux_16",
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"SwitchDemux_17",
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"SwitchDemux_18",
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"SwitchDemux_19",
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"SwitchDemux_20",
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"SwitchDemux_21",
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"SwitchDemux_22",
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"SwitchDemux_23",
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"SwitchDemux_24",
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"SwitchDemux_25",
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"SwitchDemux_26",
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"SwitchDemux_27",
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"SwitchDemux_28",
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"SwitchDemux_29",
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"SwitchDemux_30",
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"SwitchDemux_31",
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"SwitchMux_16",
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"SwitchMux_17",
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"SwitchMux_18",
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"SwitchMux_19",
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"SwitchMux_20",
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"SwitchMux_21",
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"SwitchMux_22",
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"SwitchMux_23",
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"SwitchMux_24",
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"SwitchMux_25",
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"SwitchMux_26",
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"SwitchMux_27",
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"SwitchMux_28",
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"SwitchMux_29",
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"SwitchMux_30",
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"SwitchMux_31",
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"SwitchStage_0",
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"SwitchStage_1",
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"SwitchStage_2",
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"SwitchStage_3",
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"SwitchStage_4",
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"SwitchStage_5",
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"SwitchStage_6",
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"SwitchStage_7",
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"VertexCache_8",
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"VertexCache_12",
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"VertexCache_14",
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"VertexMem_8",
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"VertexMem_9",
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"VertexMem_10",
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"VertexMem_11",
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"VertexMem_12",
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"VertexMem_13",
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"VertexMem_14",
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"VertexMem_15",
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"control_s_axi_U",
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"cgpq_spill_2__m_axi",
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"cgpq_spill_3__m_axi",
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"edges_4__m_axi",
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"edges_5__m_axi",
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"edges_6__m_axi",
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"edges_7__m_axi",
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"vertices_8__m_axi",
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"vertices_9__m_axi",
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"vertices_10__m_axi",
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"vertices_11__m_axi",
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"vertices_12__m_axi",
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"vertices_13__m_axi",
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"vertices_14__m_axi",
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"vertices_15__m_axi",
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{
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"pblock_X4Y0_X7Y3": [],
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"pblock_X4Y4_X7Y7": [
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"pblock_X0Y4_X3Y7"
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],
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"pblock_X4Y8_X7Y11": [
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"pblock_X0Y4_X3Y7",
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"pblock_X0Y8_X3Y11"
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],
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"pblock_X0Y4_X3Y7": [],
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"pblock_X0Y8_X3Y11": [
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"pblock_X0Y4_X3Y7"
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],
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"tcl": "\ncreate_pblock pblock_X0Y0_X3Y3\nresize_pblock pblock_X0Y0_X3Y3 -add CLOCKREGION_X0Y0:CLOCKREGION_X3Y3\nresize_pblock pblock_X0Y0_X3Y3 -remove {\n CLOCKREGION_X7Y0:CLOCKREGION_X7Y11\n}"
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}
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]
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}

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